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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-11 21:57:44 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-11 21:57:44 -0800 |
| commit | 5723e54fa9875dabe1a183ee59336cebe74d1516 (patch) | |
| tree | 947cf21c645c866069ca88ca1e13948a37790cc8 /src/target/etm.h | |
| parent | e740536568f5943748f2159f0ef8baa4ab37dcb9 (diff) | |
| download | openocd_libswd-5723e54fa9875dabe1a183ee59336cebe74d1516.tar.gz openocd_libswd-5723e54fa9875dabe1a183ee59336cebe74d1516.tar.bz2 openocd_libswd-5723e54fa9875dabe1a183ee59336cebe74d1516.tar.xz openocd_libswd-5723e54fa9875dabe1a183ee59336cebe74d1516.zip | |
ETM: remove old mid-level ETM handle
Now that nothing uses the old ETM handle any more, remove it.
Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
access ETM facilities.
Now ARM11 could support standard ETM (and ETB) access as soon as
it derives from "struct arm" ... its scanchain 6 is used access
the ETM, just like ARM7 and ARM9.
The Cortex parts (both M3 and A8) will need modified access methods
(via ETM init parameters), so they use the DAP. Our first A8 target
(OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
useful without SWO trace support (it's painfully stripped down), so
that support won't be worth adding for a while.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/etm.h')
| -rw-r--r-- | src/target/etm.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/target/etm.h b/src/target/etm.h index 2335c983..254db925 100644 --- a/src/target/etm.h +++ b/src/target/etm.h @@ -25,7 +25,6 @@ #include "trace.h" #include "arm_jtag.h" -#include "armv4_5.h" struct image_s; @@ -158,7 +157,7 @@ typedef struct etm uint32_t trace_depth; /* number of cycles to be analyzed, 0 if no data available */ etm_portmode_t portmode; /* normal, multiplexed or demultiplexed */ etmv1_tracemode_t tracemode; /* type of info trace contains */ - armv4_5_state_t core_state; /* current core state */ + int /*armv4_5_state_t*/ core_state; /* current core state */ struct image_s *image; /* source for target opcodes */ uint32_t pipe_index; /* current trace cycle */ uint32_t data_index; /* cycle holding next data packet */ |