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| author | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-04-14 07:26:13 +0000 |
|---|---|---|
| committer | ntfreak <ntfreak@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-04-14 07:26:13 +0000 |
| commit | 80d20326a7fafc0f6ed865df2211bc9e609265fb (patch) | |
| tree | a9ec00ca6d60b5832f6b42b35b27449bf33c15e4 /src/target/event | |
| parent | 53c41935cd72687ffb7f6b408a824f8e40f82ee9 (diff) | |
| download | openocd_libswd-80d20326a7fafc0f6ed865df2211bc9e609265fb.tar.gz openocd_libswd-80d20326a7fafc0f6ed865df2211bc9e609265fb.tar.bz2 openocd_libswd-80d20326a7fafc0f6ed865df2211bc9e609265fb.tar.xz openocd_libswd-80d20326a7fafc0f6ed865df2211bc9e609265fb.zip | |
- split str71x driver into banks
- support new str91x/str9xpec devices
- update target scripts and docs for changes
git-svn-id: svn://svn.berlios.de/openocd/trunk@577 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/event')
| -rw-r--r-- | src/target/event/str912_reset.script | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/src/target/event/str912_reset.script b/src/target/event/str912_reset.script index c3d68104..33c62047 100644 --- a/src/target/event/str912_reset.script +++ b/src/target/event/str912_reset.script @@ -1,22 +1,5 @@ -mww 0xFFFFFD44, 0x00008000 #Disable watchdog -mww 0xFFFFFC20, 0x00000601 #Enable Main oscillator -sleep 20 -mww 0xFFFFFC30, 0x00000001 #Switch master clock to CPU clock, write 1 to PMC_MCKR -sleep 20 - - -# -- Remap Flash Bank 0 at address 0x0 and Bank 1 at address 0x80000, -# when the bank 0 is the boot bank, then enable the Bank 1. */ - -mww 0x54000000, 0x4 #BOOT BANK Size = (2^4) * 32 = 512KB -mww 0x54000004, 0x2 #NON BOOT BANK Size = (2^2) * 8 = 32KB -mww 0x5400000C, 0x0 #BOOT BANK Address = 0x0 -mww 0x54000010, 0x20000 #NON BOOT BANK Address = 0x80000 -mww 0x54000018, 0x18 #Enable CS on both banks - # -- Enable 96K RAM */ mww 0x5C002034, 0x0191 # PFQBC enabled / DTCM & AHB wait-states disabled -arm966e cp15 15, 0x60000 #Set bits 17-18 (DTCM/ITCM order bits) of the Core Configuration Control Register str9x flash_config 0 4 2 0 0x80000 flash protect 0 0 7 off |