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| author | kc8apf <kc8apf@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-20 05:07:34 +0000 |
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| committer | kc8apf <kc8apf@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-05-20 05:07:34 +0000 |
| commit | 30268bc40fb5f238b056a10b465cb9c13f466672 (patch) | |
| tree | 50f095dc2498512d06a77045e503e1ec0f92881b /src/target/mips_m4k.c | |
| parent | b7b04525179001cd564117c5b0a38900d9f27cee (diff) | |
| download | openocd_libswd-30268bc40fb5f238b056a10b465cb9c13f466672.tar.gz openocd_libswd-30268bc40fb5f238b056a10b465cb9c13f466672.tar.bz2 openocd_libswd-30268bc40fb5f238b056a10b465cb9c13f466672.tar.xz openocd_libswd-30268bc40fb5f238b056a10b465cb9c13f466672.zip | |
Author: Spencer Oliver <spen@spen-soft.co.uk>
- Bring the mips step/resume interrupt handling inline with the
rest of openocd.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1850 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/mips_m4k.c')
| -rw-r--r-- | src/target/mips_m4k.c | 17 |
1 files changed, 13 insertions, 4 deletions
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index f29d8ec7..6d331d4e 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -344,8 +344,11 @@ int mips_m4k_single_step_core(target_t *target) /* configure single step mode */ mips_ejtag_config_step(ejtag_info, 1); + /* disable interrupts while stepping */ + mips32_enable_interrupts(target, 0); + /* exit debug mode */ - mips_ejtag_exit_debug(ejtag_info, 1); + mips_ejtag_exit_debug(ejtag_info); mips_m4k_debug_entry(target); @@ -397,8 +400,11 @@ int mips_m4k_resume(struct target_s *target, int current, u32 address, int handl } } - /* exit debug mode - enable interrupts if required */ - mips_ejtag_exit_debug(ejtag_info, !debug_execution); + /* enable interrupts if we are running */ + mips32_enable_interrupts(target, !debug_execution); + + /* exit debug mode */ + mips_ejtag_exit_debug(ejtag_info); target->debug_reason = DBG_REASON_NOTHALTED; /* registers are now invalid */ @@ -452,8 +458,11 @@ int mips_m4k_step(struct target_s *target, int current, u32 address, int handle_ target_call_event_callbacks(target, TARGET_EVENT_RESUMED); + /* disable interrupts while stepping */ + mips32_enable_interrupts(target, 0); + /* exit debug mode */ - mips_ejtag_exit_debug(ejtag_info, 1); + mips_ejtag_exit_debug(ejtag_info); /* registers are now invalid */ mips32_invalidate_core_regs(target); |