ARM: pass 'struct reg *' to register r/w routines

Implementations need to access the register struct they modify;
make it easier and less error-prone to identify the instance.
(This removes over 10% of the ARMV4_5_CORE_REG_MODE nastiness...)

Plus some minor fixes noted when making these updates:  ARM7/ARM9
accessor methods should be static; don't leave CPSR wrongly marked
"dirty"; note significant XScale omissions in register handling;
and have armv4_5_build_reg_cache() record its result.

Rename "struct armv4_5_core_reg" as "struct arm_reg"; it's used
for more than those older architecture generations.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>

1 files changed, 6 insertions, 5 deletions

diff --git a/src/target/xscale.c b/src/target/xscale.c
index f13366ac..c908fd70 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -1646,16 +1646,18 @@ static int xscale_deassert_reset(struct target *target)
 	return ERROR_OK;
 }
 
-static int xscale_read_core_reg(struct target *target, int num,
-		enum armv4_5_mode mode)
+static int xscale_read_core_reg(struct target *target, struct reg *r,
+		int num, enum armv4_5_mode mode)
 {
+	/** \todo add debug handler support for core register reads */
 	LOG_ERROR("not implemented");
 	return ERROR_OK;
 }
 
-static int xscale_write_core_reg(struct target *target, int num,
-		enum armv4_5_mode mode, uint32_t value)
+static int xscale_write_core_reg(struct target *target, struct reg *r,
+		int num, enum armv4_5_mode mode, uint32_t value)
 {
+	/** \todo add debug handler support for core register writes */
 	LOG_ERROR("not implemented");
 	return ERROR_OK;
 }
@@ -2829,7 +2831,6 @@ static void xscale_build_reg_cache(struct target *target)
 	int num_regs = sizeof(xscale_reg_arch_info) / sizeof(struct xscale_reg);
 
 	(*cache_p) = armv4_5_build_reg_cache(target, armv4_5);
-	armv4_5->core_cache = (*cache_p);
 
 	(*cache_p)->next = malloc(sizeof(struct reg_cache));
 	cache_p = &(*cache_p)->next;