summaryrefslogtreecommitdiff
path: root/src/target/xscale/build.sh
diff options
context:
space:
mode:
authorDavid Brownell <dbrownell@users.sourceforge.net>2009-11-24 01:27:16 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2009-11-24 01:27:16 -0800
commit5eb893ec41c8c6cf6499558b6fed826b65e18a16 (patch)
tree25b0c1c532fdbb77b0147e17718bcb414101df1c /src/target/xscale/build.sh
parent6ff33a4ee8db483e29bc78b8c35e50342ca60850 (diff)
downloadopenocd_libswd-5eb893ec41c8c6cf6499558b6fed826b65e18a16.tar.gz
openocd_libswd-5eb893ec41c8c6cf6499558b6fed826b65e18a16.tar.bz2
openocd_libswd-5eb893ec41c8c6cf6499558b6fed826b65e18a16.tar.xz
openocd_libswd-5eb893ec41c8c6cf6499558b6fed826b65e18a16.zip
ARM11: partial support for standard ARM register interfaces.
This provides "standard" ARM register support -- with twenty or more shadow registers on top of what this code now handles, but properly associated with the various core modes -- parallel to the current register code. That is, the current code is stilil managing the "current" registers; the new code shadows them. You can see all the registers with "arm reg", modify the shadows like "r8_fiq" or "sp_abt" with "reg", and see them get properly written back when you step. (Just don't do that with any of the registers managed by the "old" code ...) It also switches to using more standard code, relying on those standard registers, in two places: (a) the poll status display, which now shows core state (ARM/Thumb/...) and mode (Supervisor, IRQ, etc); and (b) GDB register access. So it's not a full migration, there are warts -- every place that touches the old register cache is a potential bug -- but it's a small more-or-less-comprehensible step that's even somewhat useful. Later patches complete the migration. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/xscale/build.sh')
0 files changed, 0 insertions, 0 deletions