remove TAP_INVALID as argument to jtag_add_xxx() fn's

git-svn-id: svn://svn.berlios.de/openocd/trunk@2042 b42882b7-edfa-0310-969c-e2dbd0fdcd60

16 files changed, 65 insertions, 65 deletions

diff --git a/src/target/arm11.h b/src/target/arm11.h
index 53b2fe6b..b20b2cc6 100644
--- a/src/target/arm11.h
+++ b/src/target/arm11.h
@@ -47,7 +47,7 @@
 					 23 * ARM11_REGCACHE_MODEREGS +			\
 					  9 * ARM11_REGCACHE_FREGS)
 
-#define ARM11_TAP_DEFAULT			TAP_INVALID
+#define ARM11_TAP_DEFAULT			jtag_add_end_state(TAP_INVALID)
 
 
 #define CHECK_RETVAL(action)								\
diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index f99ba61b..dba725a8 100644
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -119,15 +119,15 @@ int arm720t_scan_cp15(target_t *target, u32 out, u32 *in, int instruction, int c
 	if (in)
 	{
 		fields[1].in_value = (u8 *)in;
-		jtag_add_dr_scan(2, fields, TAP_INVALID);
+		jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 		jtag_add_callback(arm7flip32, (u8 *)in);
 	} else
 	{
-		jtag_add_dr_scan(2, fields, TAP_INVALID);
+		jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 	}
 
 	if (clock)
-		jtag_add_runtest(0, TAP_INVALID);
+		jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 	if((retval = jtag_execute_queue()) != ERROR_OK)
diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c
index 69910f4c..1c672cc3 100644
--- a/src/target/arm7tdmi.c
+++ b/src/target/arm7tdmi.c
@@ -147,9 +147,9 @@ static __inline int arm7tdmi_clock_out_inner(arm_jtag_t *jtag_info, u32 out, int
 			2,
 			arm7tdmi_num_bits,
 			values,
-			TAP_INVALID);
+			jtag_add_end_state(TAP_INVALID));
 
-	jtag_add_runtest(0, TAP_INVALID);
+	jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
 
 	return ERROR_OK;
 }
@@ -187,11 +187,11 @@ int arm7tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 	fields[1].out_value = NULL;
 	fields[1].in_value = (u8 *)in;
 
-	jtag_add_dr_scan(2, fields, TAP_INVALID);
+	jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 
 	jtag_add_callback(arm7flip32, (u8 *)in);
 
-	jtag_add_runtest(0, TAP_INVALID);
+	jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 {
@@ -277,11 +277,11 @@ int arm7tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 	fields[1].out_value = NULL;
 	jtag_alloc_in_value32(&fields[1]);
 
-	jtag_add_dr_scan(2, fields, TAP_INVALID);
+	jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 
 	jtag_add_callback4(arm7endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[1].in_value);
 
-	jtag_add_runtest(0, TAP_INVALID);
+	jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 {
diff --git a/src/target/arm920t.c b/src/target/arm920t.c
index 15f6378f..741a0502 100644
--- a/src/target/arm920t.c
+++ b/src/target/arm920t.c
@@ -127,11 +127,11 @@ int arm920t_read_cp15_physical(target_t *target, int reg_addr, u32 *value)
 	fields[3].out_value = &nr_w_buf;
 	fields[3].in_value = NULL;
 
-	jtag_add_dr_scan(4, fields, TAP_INVALID);
+	jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
 
 	fields[1].in_value = (u8 *)value;
 
-	jtag_add_dr_scan(4, fields, TAP_INVALID);
+	jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
 
 	jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
 
@@ -180,7 +180,7 @@ int arm920t_write_cp15_physical(target_t *target, int reg_addr, u32 value)
 	fields[3].out_value = &nr_w_buf;
 	fields[3].in_value = NULL;
 
-	jtag_add_dr_scan(4, fields, TAP_INVALID);
+	jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 	LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
@@ -227,7 +227,7 @@ int arm920t_execute_cp15(target_t *target, u32 cp15_opcode, u32 arm_opcode)
 	fields[3].out_value = &nr_w_buf;
 	fields[3].in_value = NULL;
 
-	jtag_add_dr_scan(4, fields, TAP_INVALID);
+	jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
 
 	arm9tdmi_clock_out(jtag_info, arm_opcode, 0, NULL, 0);
 	arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 1);
diff --git a/src/target/arm926ejs.c b/src/target/arm926ejs.c
index 5996d089..03c92f18 100644
--- a/src/target/arm926ejs.c
+++ b/src/target/arm926ejs.c
@@ -157,7 +157,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
 	fields[3].out_value = &nr_w_buf;
 	fields[3].in_value = NULL;
 
-	jtag_add_dr_scan(4, fields, TAP_INVALID);
+	jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
 
 	/*TODO: add timeout*/
 	do
@@ -165,7 +165,7 @@ int arm926ejs_cp15_read(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u3
 		/* rescan with NOP, to wait for the access to complete */
 		access = 0;
 		nr_w_buf = 0;
-		jtag_add_dr_scan(4, fields, TAP_INVALID);
+		jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
 
 		jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
 
@@ -227,14 +227,14 @@ int arm926ejs_cp15_write(target_t *target, u32 op1, u32 op2, u32 CRn, u32 CRm, u
 	fields[3].out_value = &nr_w_buf;
 	fields[3].in_value = NULL;
 
-	jtag_add_dr_scan(4, fields, TAP_INVALID);
+	jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
 	/*TODO: add timeout*/
 	do
 	{
 		/* rescan with NOP, to wait for the access to complete */
 		access = 0;
 		nr_w_buf = 0;
-		jtag_add_dr_scan(4, fields, TAP_INVALID);
+		jtag_add_dr_scan(4, fields, jtag_add_end_state(TAP_INVALID));
 		if ((retval = jtag_execute_queue()) != ERROR_OK)
 		{
 			return retval;
diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index 425cf667..58c99c02 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -189,11 +189,11 @@ int arm966e_read_cp15(target_t *target, int reg_addr, u32 *value)
 	fields[2].out_value = &nr_w_buf;
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	fields[1].in_value = (u8 *)value;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	jtag_add_callback(arm_le_to_h_u32, (u8 *)value);
 
@@ -244,7 +244,7 @@ int arm966e_write_cp15(target_t *target, int reg_addr, u32 value)
 	fields[2].out_value = &nr_w_buf;
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 	LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr, value);
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index eb743b12..dba679aa 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -204,16 +204,16 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
 	if (in)
 	{
 		fields[0].in_value=(u8 *)in;
-		jtag_add_dr_scan(3, fields, TAP_INVALID);
+		jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 		jtag_add_callback(arm_le_to_h_u32, (u8 *)in);
 	}
 	else
 	{
-		jtag_add_dr_scan(3, fields, TAP_INVALID);
+		jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 	}
 
-	jtag_add_runtest(0, TAP_INVALID);
+	jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 	{
@@ -263,11 +263,11 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 	fields[2].out_value = NULL;
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	jtag_add_callback(arm_le_to_h_u32, (u8 *)in);
 
-	jtag_add_runtest(0, TAP_INVALID);
+	jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 	{
@@ -330,11 +330,11 @@ int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size,
 	fields[2].out_value = NULL;
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	jtag_add_callback4(arm9endianness, in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
 
-	jtag_add_runtest(0, TAP_INVALID);
+	jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID));
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
 	{
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index cfb845e6..5bfd4c76 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -83,7 +83,7 @@ int adi_jtag_dp_scan(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u8 *o
 	fields[1].out_value = outvalue;
 	fields[1].in_value = invalue;
 
-	jtag_add_dr_scan(2, fields, TAP_INVALID);
+	jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 
 	return ERROR_OK;
 }
@@ -118,13 +118,13 @@ int adi_jtag_dp_scan_u32(swjdp_common_t *swjdp, u8 instr, u8 reg_addr, u8 RnW, u
 	if (invalue)
 	{
 		fields[1].in_value = (u8 *)invalue;
-		jtag_add_dr_scan(2, fields, TAP_INVALID);
+		jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 
 		jtag_add_callback(arm_le_to_h_u32, (u8 *)invalue);
 	} else
 	{
 
-		jtag_add_dr_scan(2, fields, TAP_INVALID);
+		jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 	}
 
 	return ERROR_OK;
diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c
index 0c1c36c8..90437f29 100644
--- a/src/target/arm_jtag.c
+++ b/src/target/arm_jtag.c
@@ -53,13 +53,13 @@ int arm_jtag_set_instr(arm_jtag_t *jtag_info, u32 new_instr,  void *no_verify_ca
 
 		if (no_verify_capture==NULL)
 		{
-			jtag_add_ir_scan(1, &field, TAP_INVALID);
+			jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID));
 		} else
 		{
 			/* FIX!!!! this is a kludge!!! arm926ejs.c should reimplement this arm_jtag_set_instr to
 			 * have special verification code.
 			 */
-			jtag_add_ir_scan_noverify(1, &field, TAP_INVALID);
+			jtag_add_ir_scan_noverify(1, &field, jtag_add_end_state(TAP_INVALID));
 		}
 	}
 
@@ -86,7 +86,7 @@ int arm_jtag_scann(arm_jtag_t *jtag_info, u32 new_scan_chain)
 				1,
 				num_bits,
 				values,
-				TAP_INVALID);
+				jtag_add_end_state(TAP_INVALID));
 
 		jtag_info->cur_scan_chain = new_scan_chain;
 	}
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index e01a4499..0abcb733 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -266,7 +266,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 	fields[2].check_value = NULL;
 	fields[2].check_mask = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	fields[0].in_value = reg->value;
 	fields[0].check_value = check_value;
@@ -278,7 +278,7 @@ int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 	 */
 	buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
 
-	jtag_add_dr_scan_check(3, fields, TAP_INVALID);
+	jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	return ERROR_OK;
 }
@@ -314,7 +314,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
 	buf_set_u32(fields[2].out_value, 0, 1, 0);
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	while (size > 0)
 	{
@@ -325,7 +325,7 @@ int embeddedice_receive(arm_jtag_t *jtag_info, u32 *data, u32 size)
 			buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
 
 		fields[0].in_value = (u8 *)data;
-		jtag_add_dr_scan(3, fields, TAP_INVALID);
+		jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 		jtag_add_callback(arm_le_to_h_u32, (u8 *)data);
 
 		data++;
@@ -420,7 +420,7 @@ int embeddedice_send(arm_jtag_t *jtag_info, u32 *data, u32 size)
 	while (size > 0)
 	{
 		buf_set_u32(fields[0].out_value, 0, 32, *data);
-		jtag_add_dr_scan(3, fields, TAP_INVALID);
+		jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 		data++;
 		size--;
@@ -471,11 +471,11 @@ int embeddedice_handshake(arm_jtag_t *jtag_info, int hsbit, u32 timeout)
 	buf_set_u32(fields[2].out_value, 0, 1, 0);
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 	gettimeofday(&lap, NULL);
 	do
 	{
-		jtag_add_dr_scan(3, fields, TAP_INVALID);
+		jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 		if ((retval = jtag_execute_queue()) != ERROR_OK)
 			return retval;
 
diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 0c8329ee..ec23ec75 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -121,7 +121,7 @@ static __inline__ void embeddedice_write_reg_inner( jtag_tap_t *tap, int reg_add
 			3,
 			embeddedice_num_bits,
 			values,
-			TAP_INVALID);
+			jtag_add_end_state(TAP_INVALID));
 }
 
 void embeddedice_write_dcc(jtag_tap_t *tap, int reg_addr, u8 *buffer, int little, int count);
diff --git a/src/target/etb.c b/src/target/etb.c
index 9a265ad5..5d0d06be 100644
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -63,7 +63,7 @@ static int etb_set_instr(etb_t *etb, u32 new_instr)
 
 		field.in_value = NULL;
 
-		jtag_add_ir_scan(1, &field, TAP_INVALID);
+		jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID));
 
 		free(field.out_value);
 	}
@@ -86,7 +86,7 @@ static int etb_scann(etb_t *etb, u32 new_scan_chain)
 
 		/* select INTEST instruction */
 		etb_set_instr(etb, 0x2);
-		jtag_add_dr_scan(1, &field, TAP_INVALID);
+		jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
 
 		etb->cur_scan_chain = new_scan_chain;
 
@@ -190,7 +190,7 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
 	buf_set_u32(fields[2].out_value, 0, 1, 0);
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	for (i = 0; i < num_frames; i++)
 	{
@@ -204,7 +204,7 @@ static int etb_read_ram(etb_t *etb, u32 *data, int num_frames)
 			buf_set_u32(fields[1].out_value, 0, 7, 0);
 
 		fields[0].in_value = (u8 *)(data+i);
-		jtag_add_dr_scan(3, fields, TAP_INVALID);
+		jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 		jtag_add_callback(etb_getbuf, (u8 *)(data+i));
 	}
@@ -252,7 +252,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 	fields[2].check_value = NULL;
 	fields[2].check_mask = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	/* read the identification register in the second run, to make sure we
 	 * don't read the ETB data register twice, skipping every second entry
@@ -262,7 +262,7 @@ int etb_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 	fields[0].check_value = check_value;
 	fields[0].check_mask = check_mask;
 
-	jtag_add_dr_scan_check(3, fields, TAP_INVALID);
+	jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	free(fields[1].out_value);
 	free(fields[2].out_value);
diff --git a/src/target/etm.c b/src/target/etm.c
index 801fb8e0..50bfa159 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -347,13 +347,13 @@ int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask)
 	fields[2].check_value = NULL;
 	fields[2].check_mask = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	fields[0].in_value = reg->value;
 	fields[0].check_value = check_value;
 	fields[0].check_mask = check_mask;
 
-	jtag_add_dr_scan_check(3, fields, TAP_INVALID);
+	jtag_add_dr_scan_check(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	free(fields[1].out_value);
 	free(fields[2].out_value);
@@ -430,7 +430,7 @@ int etm_write_reg(reg_t *reg, u32 value)
 	buf_set_u32(fields[2].out_value, 0, 1, 1);
 	fields[2].in_value = NULL;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	return ERROR_OK;
 }
diff --git a/src/target/feroceon.c b/src/target/feroceon.c
index a6b02022..5a45f2fd 100644
--- a/src/target/feroceon.c
+++ b/src/target/feroceon.c
@@ -159,9 +159,9 @@ int feroceon_dummy_clock_out(arm_jtag_t *jtag_info, u32 instr)
 	
 	
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
-	/* no jtag_add_runtest(0, TAP_INVALID) here */
+	/* no jtag_add_runtest(0, jtag_add_end_state(TAP_INVALID)) here */
 
 	return ERROR_OK;
 }
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index c4b133e0..4e451ec7 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -50,7 +50,7 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, void *delete_m
 		
 		
 		
-		jtag_add_ir_scan(1, &field, TAP_INVALID);
+		jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID));
 	}
 
 	return ERROR_OK;
@@ -73,7 +73,7 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode)
 	
 	
 	
-	jtag_add_dr_scan(1, &field, TAP_INVALID);
+	jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
 
 	if (jtag_execute_queue() != ERROR_OK)
 	{
@@ -100,7 +100,7 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode)
 	
 	
 	
-	jtag_add_dr_scan(1, &field, TAP_INVALID);
+	jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
 
 	if (jtag_execute_queue() != ERROR_OK)
 	{
@@ -131,7 +131,7 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
 	
 	
 	
-	jtag_add_dr_scan(1, &field, TAP_INVALID);
+	jtag_add_dr_scan(1, &field, jtag_add_end_state(TAP_INVALID));
 
 	if ((retval = jtag_execute_queue()) != ERROR_OK)
 	{
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 7838e50e..1e0b7756 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -212,7 +212,7 @@ int xscale_jtag_set_instr(jtag_tap_t *tap, u32 new_instr)
 		u8 tmp[4];
 		field.in_value = tmp;
 
-		jtag_add_ir_scan(1, &field, TAP_INVALID);
+		jtag_add_ir_scan(1, &field, jtag_add_end_state(TAP_INVALID));
 
 		/* FIX!!!! isn't this check superfluous? verify_ircapture handles this? */
 		jtag_check_value_mask(&field, tap->expected, tap->expected_mask);
@@ -262,7 +262,7 @@ int xscale_read_dcsr(target_t *target)
 	u8 tmp2;
 	fields[2].in_value = &tmp2;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
 	jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
@@ -285,7 +285,7 @@ int xscale_read_dcsr(target_t *target)
 
 	jtag_add_end_state(TAP_IDLE);
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	/* DANGER!!! this must be here. It will make sure that the arguments
 	 * to jtag_set_check_value() does not go out of scope! */
@@ -347,7 +347,7 @@ int xscale_receive(target_t *target, u32 *buffer, int num_words)
 
 	jtag_add_end_state(TAP_IDLE);
 	xscale_jtag_set_instr(xscale->jtag_info.tap, xscale->jtag_info.dbgtx);
-	jtag_add_runtest(1, TAP_INVALID); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
+	jtag_add_runtest(1, jtag_add_end_state(TAP_INVALID)); /* ensures that we're in the TAP_IDLE state as the above could be a no-op */
 
 	/* repeat until all words have been collected */
 	int attempts=0;
@@ -725,7 +725,7 @@ int xscale_write_dcsr(target_t *target, int hold_rst, int ext_dbg_brk)
 	u8 tmp2;
 	fields[2].in_value = &tmp2;
 
-	jtag_add_dr_scan(3, fields, TAP_INVALID);
+	jtag_add_dr_scan(3, fields, jtag_add_end_state(TAP_INVALID));
 
 	jtag_check_value_mask(fields+0, &field0_check_value, &field0_check_mask);
 	jtag_check_value_mask(fields+2, &field2_check_value, &field2_check_mask);
@@ -800,7 +800,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
 
 
 
-	jtag_add_dr_scan(2, fields, TAP_INVALID);
+	jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 
 	fields[0].num_bits = 32;
 	fields[0].out_value = packet;
@@ -816,7 +816,7 @@ int xscale_load_ic(target_t *target, int mini, u32 va, u32 buffer[8])
 		memcpy(&value, packet, sizeof(u32));
 		cmd = parity(value);
 
-		jtag_add_dr_scan(2, fields, TAP_INVALID);
+		jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 	}
 
 	jtag_execute_queue();
@@ -862,7 +862,7 @@ int xscale_invalidate_ic_line(target_t *target, u32 va)
 
 
 
-	jtag_add_dr_scan(2, fields, TAP_INVALID);
+	jtag_add_dr_scan(2, fields, jtag_add_end_state(TAP_INVALID));
 
 	return ERROR_OK;
 }