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author | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-10-12 16:20:47 +0000 |
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committer | drath <drath@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2006-10-12 16:20:47 +0000 |
commit | 81294537cd61b0f0fb2c0ae93e4367c049bf497f (patch) | |
tree | affdfea773c0aca3c88596fc653c599c49f62ed1 /src/target | |
parent | 94ffacdd9309745c8f04b512426bb6d810f5456a (diff) | |
download | openocd_libswd-81294537cd61b0f0fb2c0ae93e4367c049bf497f.tar.gz openocd_libswd-81294537cd61b0f0fb2c0ae93e4367c049bf497f.tar.bz2 openocd_libswd-81294537cd61b0f0fb2c0ae93e4367c049bf497f.tar.xz openocd_libswd-81294537cd61b0f0fb2c0ae93e4367c049bf497f.zip |
- allow FT2232 devices to be opened by serial number instead of device description ('ft2232_serial <serial>' command)
- redirect output from target event scripts (currently only reset) to the daemon output (INFO:)
- some minor fixes and enhancements
git-svn-id: svn://svn.berlios.de/openocd/trunk@103 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/arm7_9_common.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index e5876587..c1a39b6b 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -1768,7 +1768,7 @@ int arm7_9_read_memory(struct target_s *target, u32 address, u32 size, u32 count if (((cpsr & 0x1f) == ARMV4_5_MODE_ABT) && (armv4_5->core_mode != ARMV4_5_MODE_ABT)) { - ERROR("memory read caused data abort"); + ERROR("memory read caused data abort (address: 0x%8.8x, size: 0x%x, count: 0x%x)", address, size, count); arm7_9->write_xpsr_im8(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & ~0x20, 0, 0); @@ -1933,7 +1933,7 @@ int arm7_9_write_memory(struct target_s *target, u32 address, u32 size, u32 coun if (((cpsr & 0x1f) == ARMV4_5_MODE_ABT) && (armv4_5->core_mode != ARMV4_5_MODE_ABT)) { - ERROR("memory write caused data abort"); + ERROR("memory write caused data abort (address: 0x%8.8x, size: 0x%x, count: 0x%x)", address, size, count); arm7_9->write_xpsr_im8(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 8) & ~0x20, 0, 0); |