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authorAaron Carroll <aaronc@cse.unsw.edu.au>2011-01-24 18:06:45 +1100
committerØyvind Harboe <oyvind.harboe@zylin.com>2011-01-31 08:53:53 +0100
commit8e60d4955f4a89da39bf9b91217c651b44052538 (patch)
tree37cb8645f9f451f84db67274cb59e4375697ce17 /src/target
parentaea22bdbd14ce3d3641884bde68e228882fbd546 (diff)
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arm_dpm: add some SCR/RCR macros
Signed-off-by: Aaron Carroll <aaronc@cse.unsw.edu.au>
Diffstat (limited to 'src/target')
-rw-r--r--src/target/arm_dpm.h10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h
index e180807f..b20184c8 100644
--- a/src/target/arm_dpm.h
+++ b/src/target/arm_dpm.h
@@ -143,14 +143,20 @@ void arm_dpm_report_wfar(struct arm_dpm *, uint32_t wfar);
#define DSCR_CORE_HALTED (1 << 0)
#define DSCR_CORE_RESTARTED (1 << 1)
#define DSCR_INT_DIS (1 << 11)
-#define DSCR_ITR_EN (1 << 13)
+#define DSCR_ITR_EN (1 << 13)
#define DSCR_HALT_DBG_MODE (1 << 14)
#define DSCR_MON_DBG_MODE (1 << 15)
#define DSCR_INSTR_COMP (1 << 24)
#define DSCR_DTR_TX_FULL (1 << 29)
#define DSCR_DTR_RX_FULL (1 << 30)
-#define DSCR_ENTRY(dscr) (((dscr) >> 2) & 0xf)
+#define DSCR_ENTRY(dscr) (((dscr) >> 2) & 0xf)
+#define DSCR_RUN_MODE(dscr) ((dscr) & (DSCR_CORE_HALTED | DSCR_CORE_RESTARTED))
+
+/* DRCR (debug run control register) bits */
+#define DRCR_HALT (1 << 0)
+#define DRCR_RESTART (1 << 1)
+#define DRCR_CLEAR_EXCEPTIONS (1 << 2)
void arm_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dcsr);