- str9x flash support (Thanks to Spencer Oliver)

- str75x flash support (Thanks to Spencer Oliver)
- correct reporting of T-Bit in CPSR (Thanks to John Hartman for reporting this)
- core-state (ARM/Thumb) can be switched by modifying CPSR
- fixed bug in gdb_server register handling
- register values > 32-bit should now be supported
- several minor fixes and enhancements



git-svn-id: svn://svn.berlios.de/openocd/trunk@100 b42882b7-edfa-0310-969c-e2dbd0fdcd60

10 files changed, 54 insertions, 17 deletions

diff --git a/src/target/arm966e.c b/src/target/arm966e.c
index b7cfea80..f5f4a209 100644
--- a/src/target/arm966e.c
+++ b/src/target/arm966e.c
@@ -70,6 +70,8 @@ target_type_t arm966e_target =
 	.write_memory = arm7_9_write_memory,
 	.bulk_write_memory = arm7_9_bulk_write_memory,
 
+	.run_algorithm = armv4_5_run_algorithm,
+	
 	.add_breakpoint = arm7_9_add_breakpoint,
 	.remove_breakpoint = arm7_9_remove_breakpoint,
 	.add_watchpoint = arm7_9_add_watchpoint,
diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 7584a8bb..ccd30312 100644
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -68,6 +68,8 @@ target_type_t arm9tdmi_target =
 	.write_memory = arm7_9_write_memory,
 	.bulk_write_memory = arm7_9_bulk_write_memory,
 
+	.run_algorithm = armv4_5_run_algorithm,
+	
 	.add_breakpoint = arm7_9_add_breakpoint,
 	.remove_breakpoint = arm7_9_remove_breakpoint,
 	.add_watchpoint = arm7_9_add_watchpoint,
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index 86d5dc89..00fb2f07 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -223,16 +223,42 @@ int armv4_5_get_core_reg(reg_t *reg)
 	return retval;
 }
 
-int armv4_5_set_core_reg(reg_t *reg, u32 value)
+int armv4_5_set_core_reg(reg_t *reg, u8 *buf)
 {
 	armv4_5_core_reg_t *armv4_5 = reg->arch_info;
 	target_t *target = armv4_5->target;
+	armv4_5_common_t *armv4_5_target = target->arch_info;
+	u32 value = buf_get_u32(buf, 0, 32);
 		
 	if (target->state != TARGET_HALTED)
 	{
 		return ERROR_TARGET_NOT_HALTED;
 	}
 	
+	if (reg == &armv4_5_target->core_cache->reg_list[ARMV4_5_CPSR])
+	{
+		if (value & 0x20)
+		{
+			/* T bit should be set */
+			if (armv4_5_target->core_state == ARMV4_5_STATE_ARM)
+			{
+				/* change state to Thumb */
+				DEBUG("changing to Thumb state");
+				armv4_5_target->core_state = ARMV4_5_STATE_THUMB;	
+			}
+		}
+		else
+		{
+			/* T bit should be cleared */
+			if (armv4_5_target->core_state == ARMV4_5_STATE_THUMB)
+			{
+				/* change state to ARM */
+				DEBUG("changing to ARM state");
+				armv4_5_target->core_state = ARMV4_5_STATE_ARM;	
+			}
+		}
+	}
+	
 	buf_set_u32(reg->value, 0, 32, value);
 	reg->dirty = 1;
 	reg->valid = 1;
@@ -518,7 +544,7 @@ int armv4_5_run_algorithm(struct target_s *target, int num_mem_params, mem_param
 			exit(-1);
 		}
 		
-		armv4_5_set_core_reg(reg, buf_get_u32(reg_params[i].value, 0, 32));
+		armv4_5_set_core_reg(reg, reg_params[i].value);
 	}
 	
 	armv4_5->core_state = armv4_5_algorithm_info->core_state;
diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c
index 0cb4e017..b063bd2c 100644
--- a/src/target/embeddedice.c
+++ b/src/target/embeddedice.c
@@ -78,6 +78,7 @@ int embeddedice_reg_arch_type = -1;
 
 int embeddedice_get_reg(reg_t *reg);
 int embeddedice_set_reg(reg_t *reg, u32 value);
+int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
 
 int embeddedice_write_reg(reg_t *reg, u32 value);
 int embeddedice_read_reg(reg_t *reg);
@@ -231,9 +232,9 @@ int embeddedice_set_reg(reg_t *reg, u32 value)
 	return ERROR_OK;
 }
 
-int embeddedice_set_reg_w_exec(reg_t *reg, u32 value)
+int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf)
 {
-	embeddedice_set_reg(reg, value);
+	embeddedice_set_reg(reg, buf_get_u32(buf, 0, reg->size));
 	
 	if (jtag_execute_queue() != ERROR_OK)
 	{
diff --git a/src/target/embeddedice.h b/src/target/embeddedice.h
index 8631e7b9..eedc2191 100644
--- a/src/target/embeddedice.h
+++ b/src/target/embeddedice.h
@@ -95,6 +95,6 @@ extern int embeddedice_write_reg(reg_t *reg, u32 value);
 extern int embeddedice_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);
 extern int embeddedice_store_reg(reg_t *reg);
 extern int embeddedice_set_reg(reg_t *reg, u32 value);
-extern int embeddedice_set_reg_w_exec(reg_t *reg, u32 value);
+extern int embeddedice_set_reg_w_exec(reg_t *reg, u8 *buf);
 
 #endif /* EMBEDDED_ICE_H */
diff --git a/src/target/etm.c b/src/target/etm.c
index a6b63451..9c82acc9 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -199,6 +199,7 @@ int etm_reg_arch_type = -1;
 
 int etm_get_reg(reg_t *reg);
 int etm_set_reg(reg_t *reg, u32 value);
+int etm_set_reg_w_exec(reg_t *reg, u8 *buf);
 
 int etm_write_reg(reg_t *reg, u32 value);
 int etm_read_reg(reg_t *reg);
@@ -338,9 +339,9 @@ int etm_set_reg(reg_t *reg, u32 value)
 	return ERROR_OK;
 }
 
-int etm_set_reg_w_exec(reg_t *reg, u32 value)
+int etm_set_reg_w_exec(reg_t *reg, u8 *buf)
 {
-	etm_set_reg(reg, value);
+	etm_set_reg(reg, buf_get_u32(buf, 0, reg->size));
 	
 	if (jtag_execute_queue() != ERROR_OK)
 	{
diff --git a/src/target/etm.h b/src/target/etm.h
index dbe78f35..4b24e5c8 100644
--- a/src/target/etm.h
+++ b/src/target/etm.h
@@ -71,6 +71,6 @@ extern int etm_write_reg(reg_t *reg, u32 value);
 extern int etm_read_reg_w_check(reg_t *reg, u8* check_value, u8* check_mask);

 extern int etm_store_reg(reg_t *reg);

 extern int etm_set_reg(reg_t *reg, u32 value);

-extern int etm_set_reg_w_exec(reg_t *reg, u32 value);

+extern int etm_set_reg_w_exec(reg_t *reg, u8 *buf);

 

 #endif /* ETM_H */

diff --git a/src/target/register.c b/src/target/register.c
index 182ff9a2..2adf73e7 100644
--- a/src/target/register.c
+++ b/src/target/register.c
@@ -66,7 +66,7 @@ reg_cache_t** register_get_last_cache_p(reg_cache_t **first)
 	return cache_p;
 }
 
-int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, u32 value))
+int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, u8 *buf))
 {
 	reg_arch_type_t** arch_type_p = &reg_arch_types;
 	int id = 0;
diff --git a/src/target/register.h b/src/target/register.h
index 8a903edd..456ab590 100644
--- a/src/target/register.h
+++ b/src/target/register.h
@@ -56,13 +56,13 @@ typedef struct reg_arch_type_s
 {
 	int id;
 	int (*get)(reg_t *reg);
-	int (*set)(reg_t *reg, u32 value);
+	int (*set)(reg_t *reg, u8 *buf);
 	struct reg_arch_type_s *next;
 } reg_arch_type_t;
 
 extern reg_t* register_get_by_name(reg_cache_t *first, char *name, int search_all);
 extern reg_cache_t** register_get_last_cache_p(reg_cache_t **first);
-extern int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, u32 value));
+extern int register_reg_arch_type(int (*get)(reg_t *reg), int (*set)(reg_t *reg, u8 *buf));
 extern reg_arch_type_t* register_get_arch_type(int id);
 
 #endif /* REGISTER_H */
diff --git a/src/target/target.c b/src/target/target.c
index f1229d86..531d632e 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -1085,7 +1085,7 @@ int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args
 			int i;
 			for (i = 0; i < cache->num_regs; i++)
 			{
-				value = buf_to_char(cache->reg_list[i].value, cache->reg_list[i].size);
+				value = buf_to_str(cache->reg_list[i].value, cache->reg_list[i].size, 16);
 				command_print(cmd_ctx, "(%i) %s (/%i): 0x%s (dirty: %i, valid: %i)", count++, cache->reg_list[i].name, cache->reg_list[i].size, value, cache->reg_list[i].dirty, cache->reg_list[i].valid);
 				free(value);
 			}
@@ -1150,7 +1150,7 @@ int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args
 			}
 			arch_type->get(reg);
 		}
-		value = buf_to_char(reg->value, reg->size);
+		value = buf_to_str(reg->value, reg->size, 16);
 		command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, reg->size, value);
 		free(value);
 		return ERROR_OK;
@@ -1159,7 +1159,9 @@ int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args
 	/* set register value */
 	if (argc == 2)
 	{
-		u32 new_value = strtoul(args[1], NULL, 0);
+		u8 *buf = malloc(CEIL(reg->size, 8));
+		str_to_buf(args[1], strlen(args[1]), buf, reg->size, 0);
+
 		reg_arch_type_t *arch_type = register_get_arch_type(reg->arch_type);
 		if (arch_type == NULL)
 		{
@@ -1167,11 +1169,14 @@ int handle_reg_command(struct command_context_s *cmd_ctx, char *cmd, char **args
 			return ERROR_OK;
 		}
 		
-		arch_type->set(reg, new_value);
-		value = buf_to_char(reg->value, reg->size);
+		arch_type->set(reg, buf);
+		
+		value = buf_to_str(reg->value, reg->size, 16);
 		command_print(cmd_ctx, "%s (/%i): 0x%s", reg->name, reg->size, value);
 		free(value);
 		
+		free(buf);
+		
 		return ERROR_OK;
 	}
 	
@@ -1684,7 +1689,7 @@ int handle_bp_command(struct command_context_s *cmd_ctx, char *cmd, char **args,
 		{
 			if (breakpoint->type == BKPT_SOFT)
 			{
-				char* buf = buf_to_char(breakpoint->orig_instr, breakpoint->length);
+				char* buf = buf_to_str(breakpoint->orig_instr, breakpoint->length, 16);
 				command_print(cmd_ctx, "0x%8.8x, 0x%x, %i, 0x%s", breakpoint->address, breakpoint->length, breakpoint->set, buf);
 				free(buf);
 			}