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authorDavid Brownell <dbrownell@users.sourceforge.net>2010-01-21 16:45:00 -0800
committerDavid Brownell <dbrownell@users.sourceforge.net>2010-01-21 16:45:00 -0800
commit4960c9018f2560b11ede91cde8a68dc56c690159 (patch)
treeaf4cb138b600efc869463ed4c08452bfb11ee9f7 /src
parent08b0be94b5fd13a8afe4f070bc7b471cc5c3423d (diff)
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Various doc/comment updates
Doxygen: don't be needlessly verbose; alphabetically sort members TODO: add random bits; clarify which manuals are referenced ARM disassembler: mention a few opcodes that still aren't handled Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src')
-rw-r--r--src/target/arm_disassembler.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c
index 587131bc..f02053fb 100644
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -50,6 +50,7 @@
* except as coprocessor 10/11 operations
* * Most ARM instructions through ARMv6 are decoded, but some
* of the post-ARMv4 opcodes may not be handled yet
+ * CPS, SDIV, UDIV, LDREX*, STREX*, QASX, ...
* * NEON instructions are not understood (ARMv7-A)
*
* - Thumb/Thumb2 decoding