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authorduane <duane@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2009-06-28 02:40:08 +0000
committerduane <duane@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2009-06-28 02:40:08 +0000
commit9ab9786f67f3a3532aa5db339c4c22b2ea843ad7 (patch)
tree84e69a7ba9e40c09e5b85f91cad3e1b36850a22c /src
parent78c0e873d2bc9928849c18f2c605a5f2382a3980 (diff)
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Refactor code, create target_state_name()
git-svn-id: svn://svn.berlios.de/openocd/trunk@2409 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src')
-rw-r--r--src/target/arm11.c8
-rw-r--r--src/target/arm7_9_common.c6
-rw-r--r--src/target/cortex_m3.c10
-rw-r--r--src/target/mips_m4k.c8
-rw-r--r--src/target/target.c21
-rw-r--r--src/target/target.h10
-rw-r--r--src/target/xscale.c4
7 files changed, 43 insertions, 24 deletions
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 57dcd2f8..97274a8a 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -732,7 +732,7 @@ int arm11_halt(struct target_s *target)
arm11_common_t * arm11 = target->arch_info;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
if (target->state == TARGET_UNKNOWN)
{
@@ -789,7 +789,7 @@ int arm11_resume(struct target_s *target, int current, uint32_t address, int han
arm11_common_t * arm11 = target->arch_info;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
if (target->state != TARGET_HALTED)
@@ -889,7 +889,7 @@ int arm11_step(struct target_s *target, int current, uint32_t address, int handl
FNC_INFO;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
if (target->state != TARGET_HALTED)
{
@@ -1035,7 +1035,7 @@ int arm11_deassert_reset(struct target_s *target)
#if 0
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
/* deassert reset lines */
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 5afc010f..ab9e9737 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -992,7 +992,7 @@ int arm7_9_assert_reset(target_t *target)
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name);
+ target_state_name(target));
enum reset_types jtag_reset_config = jtag_get_reset_config();
if (!(jtag_reset_config & RESET_HAS_SRST))
@@ -1062,7 +1062,7 @@ int arm7_9_deassert_reset(target_t *target)
{
int retval = ERROR_OK;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name);
+ target_state_name(target));
/* deassert reset lines */
jtag_add_reset(0, 0);
@@ -1275,7 +1275,7 @@ int arm7_9_halt(target_t *target)
reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name);
+ target_state_name(target));
if (target->state == TARGET_HALTED)
{
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index dffb0ce0..5789870f 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -444,7 +444,7 @@ int cortex_m3_debug_entry(target_t *target)
LOG_DEBUG("entered debug state in core mode: %s at PC 0x%" PRIx32 ", target->state: %s",
armv7m_mode_strings[armv7m->core_mode],
*(uint32_t*)(armv7m->core_cache->reg_list[15].value),
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
if (armv7m->post_debug_entry)
armv7m->post_debug_entry(target);
@@ -520,7 +520,7 @@ int cortex_m3_poll(target_t *target)
#if 0
/* Read Debug Fault Status Register, added to figure out the lockup when running flashtest.script */
mem_ap_read_atomic_u32(swjdp, NVIC_DFSR, &cortex_m3->nvic_dfsr);
- LOG_DEBUG("dcb_dhcsr 0x%x, nvic_dfsr 0x%x, target->state: %s", cortex_m3->dcb_dhcsr, cortex_m3->nvic_dfsr, Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ LOG_DEBUG("dcb_dhcsr 0x%x, nvic_dfsr 0x%x, target->state: %s", cortex_m3->dcb_dhcsr, cortex_m3->nvic_dfsr, target_state_name(target));
#endif
return ERROR_OK;
@@ -529,7 +529,7 @@ int cortex_m3_poll(target_t *target)
int cortex_m3_halt(target_t *target)
{
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
if (target->state == TARGET_HALTED)
{
@@ -753,7 +753,7 @@ int cortex_m3_assert_reset(target_t *target)
int assert_srst = 1;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
enum reset_types jtag_reset_config = jtag_get_reset_config();
if (!(jtag_reset_config & RESET_HAS_SRST))
@@ -864,7 +864,7 @@ int cortex_m3_assert_reset(target_t *target)
int cortex_m3_deassert_reset(target_t *target)
{
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
/* deassert reset lines */
jtag_add_reset(0, 0);
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index e1b98a2b..f8164ff0 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -148,7 +148,7 @@ int mips_m4k_debug_entry(target_t *target)
LOG_DEBUG("entered debug state at PC 0x%" PRIx32 ", target->state: %s",
*(uint32_t*)(mips32->core_cache->reg_list[MIPS32_PC].value),
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
return ERROR_OK;
}
@@ -220,7 +220,7 @@ int mips_m4k_halt(struct target_s *target)
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
if (target->state == TARGET_HALTED)
{
@@ -265,7 +265,7 @@ int mips_m4k_assert_reset(target_t *target)
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
enum reset_types jtag_reset_config = jtag_get_reset_config();
if (!(jtag_reset_config & RESET_HAS_SRST))
@@ -324,7 +324,7 @@ int mips_m4k_assert_reset(target_t *target)
int mips_m4k_deassert_reset(target_t *target)
{
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
/* deassert reset lines */
jtag_add_reset(0, 0);
diff --git a/src/target/target.c b/src/target/target.c
index f95e360f..a97835b3 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -237,6 +237,18 @@ const Jim_Nvp nvp_reset_modes[] = {
{ .name = NULL , .value = -1 },
};
+const char *
+target_state_name( target_t *t )
+{
+ const char *cp;
+ cp = Jim_Nvp_value2name_simple(nvp_target_state, t->state)->name;
+ if( !cp ){
+ LOG_ERROR("Invalid target state: %d", (int)(t->state));
+ cp = "(*BUG*unknown*BUG*)";
+ }
+ return cp;
+}
+
static int max_target_number(void)
{
target_t *t;
@@ -1085,8 +1097,7 @@ int target_arch_state(struct target_s *target)
return ERROR_OK;
}
- LOG_USER("target state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name);
+ LOG_USER("target state: %s", target_state_name( target ));
if (target->state != TARGET_HALTED)
return ERROR_OK;
@@ -1544,8 +1555,7 @@ DumpTargets:
char marker = ' ';
if (target->tap->enabled)
- state = Jim_Nvp_value2name_simple(nvp_target_state,
- target->state)->name;
+ state = target_state_name( target );
else
state = "tap-disabled";
@@ -4079,7 +4089,8 @@ static int tcl_target_func(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
return JIM_ERR;
}
Jim_SetResultString(goi.interp,
- Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name,-1);
+ target_state_name( target ),
+ -1);
return JIM_OK;
case TS_CMD_INVOKE_EVENT:
if (goi.argc != 1) {
diff --git a/src/target/target.h b/src/target/target.h
index 2fd0037b..2dfe4851 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -42,7 +42,11 @@ struct command_context_s;
* TARGET_RESET = 3: the target is being held in reset (only a temporary state,
* not sure how this is used with all the recent changes)
* TARGET_DEBUG_RUNNING = 4: the target is running, but it is executing code on
- * behalf of the debugger (e.g. algorithm for flashing) */
+ * behalf of the debugger (e.g. algorithm for flashing)
+ *
+ * also see: target_state_name();
+ */
+
enum target_state
{
@@ -131,6 +135,7 @@ typedef struct target_s
struct working_area_s *working_areas;/* list of allocated working areas */
enum target_debug_reason debug_reason;/* reason why the target entered debug state */
enum target_endianess endianness; /* target endianess */
+ // also see: target_state_name()
enum target_state state; /* the current backend-state (running, halted, ...) */
struct reg_cache_s *reg_cache; /* the first register cache of the target (core regs) */
struct breakpoint_s *breakpoints; /* list of breakpoints */
@@ -357,6 +362,9 @@ extern int target_checksum_memory(struct target_s *target, uint32_t address, uin
extern int target_blank_check_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t* blank);
extern int target_wait_state(target_t *target, enum target_state state, int ms);
+/** Return the *name* of this targets current state */
+const char *target_state_name( target_t *target );
+
/* DANGER!!!!!
*
* if "area" passed in to target_alloc_working_area() points to a memory
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 4144d2b9..4630f68a 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -1202,7 +1202,7 @@ int xscale_halt(target_t *target)
xscale_common_t *xscale = armv4_5->arch_info;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
if (target->state == TARGET_HALTED)
{
@@ -1568,7 +1568,7 @@ int xscale_assert_reset(target_t *target)
xscale_common_t *xscale = armv4_5->arch_info;
LOG_DEBUG("target->state: %s",
- Jim_Nvp_value2name_simple(nvp_target_state, target->state)->name);
+ target_state_name(target));
/* select DCSR instruction (set endstate to R-T-I to ensure we don't
* end up in T-L-R, which would reset JTAG