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| author | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-07-18 23:03:05 +0200 |
|---|---|---|
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-07-19 08:36:14 +0200 |
| commit | ad02493cf2e4e201636d963503a1a2f5c7b0820e (patch) | |
| tree | 3861ccdde3cbe70aef251db7dbd2d808ea564a7a /src | |
| parent | 19fc52f00869a4c607483d96c459a51f3979c8db (diff) | |
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cortex a8: add missing error handling for mem_ap_atomic_write_u32()
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/cortex_a8.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index 82ce9a18..441c93b2 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -147,7 +147,9 @@ static int cortex_a8_exec_opcode(struct target *target, } } - mem_ap_write_u32(swjdp, armv7a->debug_base + CPUDBG_ITR, opcode); + retval = mem_ap_write_u32(swjdp, armv7a->debug_base + CPUDBG_ITR, opcode); + if (retval != ERROR_OK) + return retval; do { @@ -273,6 +275,8 @@ static int cortex_a8_dap_write_coreregister_u32(struct target *target, LOG_DEBUG("write DCC 0x%08" PRIx32, value); retval = mem_ap_write_u32(swjdp, armv7a->debug_base + CPUDBG_DTRRX, value); + if (retval != ERROR_OK) + return retval; if (Rd < 15) { |