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| author | mlu <mlu@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-08 15:31:24 +0000 |
|---|---|---|
| committer | mlu <mlu@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-08 15:31:24 +0000 |
| commit | f6a5749c1b75ab8d272e1c3e1adea0682061b5b0 (patch) | |
| tree | f5918b958ef67f10d7d7263aa0af63ceaba6f522 /src | |
| parent | 5dae4753ff9a6ca87104ef09aa128e1425826049 (diff) | |
| download | openocd_libswd-f6a5749c1b75ab8d272e1c3e1adea0682061b5b0.tar.gz openocd_libswd-f6a5749c1b75ab8d272e1c3e1adea0682061b5b0.tar.bz2 openocd_libswd-f6a5749c1b75ab8d272e1c3e1adea0682061b5b0.tar.xz openocd_libswd-f6a5749c1b75ab8d272e1c3e1adea0682061b5b0.zip | |
Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2677 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/cortex_a8.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index 68717df7..55a3c45b 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -85,7 +85,6 @@ target_type_t cortexa8_target = .deassert_reset = NULL, .soft_reset_halt = NULL, -// .get_gdb_reg_list = armv4_5_get_gdb_reg_list, .get_gdb_reg_list = armv4_5_get_gdb_reg_list, .read_memory = cortex_a8_read_memory, @@ -509,6 +508,13 @@ int cortex_a8_resume(struct target_s *target, int current, { resume_pc &= 0xFFFFFFFC; } + /* When the return address is loaded into PC + * bit 0 must be 1 to stay in Thumb state + */ + if (armv7a->core_state == ARMV7A_STATE_THUMB) + { + resume_pc |= 0x1; + } LOG_DEBUG("resume pc = 0x%08" PRIx32, resume_pc); buf_set_u32(ARMV7A_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, 15).value, @@ -592,7 +598,6 @@ int cortex_a8_debug_entry(target_t *target) retval = mem_ap_write_atomic_u32(swjdp, OMAP3530_DEBUG_BASE + CPUDBG_DSCR, dscr); - /* Examine debug reason */ switch ((cortex_a8->cpudbg_dscr >> 2)&0xF) { |