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| author | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:58:16 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2010-02-21 14:58:16 -0800 |
| commit | c8ea748dc22660dad934537384d35903dfcc492e (patch) | |
| tree | d92c41ee623f799602886d2aecaac7eda9af776d /tcl/board/atmel_at91sam9260-ek.cfg | |
| parent | 3b68a708c2b039d9b091608eccb2206725742a47 (diff) | |
| download | openocd_libswd-c8ea748dc22660dad934537384d35903dfcc492e.tar.gz openocd_libswd-c8ea748dc22660dad934537384d35903dfcc492e.tar.bz2 openocd_libswd-c8ea748dc22660dad934537384d35903dfcc492e.tar.xz openocd_libswd-c8ea748dc22660dad934537384d35903dfcc492e.zip | |
ADIv5: relocate memacess_tck cycles
When using an AP to access a memory (or a memory-mapped register),
some extra TCK (assuming JTAG) cycles should be added to ensure
the AP has enugh time to complete that access before trying to
collect the response.
The previous code was adding these cycles *before* trying to
access (read or write) data to that address, not *after*. Fix
by putting the delays in the right location.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'tcl/board/atmel_at91sam9260-ek.cfg')
0 files changed, 0 insertions, 0 deletions