diff options
| author | Antonio Borneo <borneo.antonio@gmail.com> | 2010-12-19 01:22:53 +0800 |
|---|---|---|
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2010-12-18 21:04:22 +0100 |
| commit | 30da7c67cec8b315972377b5389735ff11f6042c (patch) | |
| tree | f5735bd53edf0b43ef27c5058fdab817d2034462 /tcl/board/rsc-w910.cfg | |
| parent | af3f77a1777e4f28ec1a14122f4800ca3467e4c7 (diff) | |
| download | openocd_libswd-30da7c67cec8b315972377b5389735ff11f6042c.tar.gz openocd_libswd-30da7c67cec8b315972377b5389735ff11f6042c.tar.bz2 openocd_libswd-30da7c67cec8b315972377b5389735ff11f6042c.tar.xz openocd_libswd-30da7c67cec8b315972377b5389735ff11f6042c.zip | |
TCL: fix non TCL comments
End of line comments fixed with ';' before '#'.
Added few additional 'space' to keep indentation in
multi-line comments.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'tcl/board/rsc-w910.cfg')
| -rw-r--r-- | tcl/board/rsc-w910.cfg | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/tcl/board/rsc-w910.cfg b/tcl/board/rsc-w910.cfg index 423fb8fd..636a0539 100644 --- a/tcl/board/rsc-w910.cfg +++ b/tcl/board/rsc-w910.cfg @@ -34,12 +34,12 @@ $_TARGETNAME configure -event reset-init { # switch on PLL for 200MHz operation # running from 15MHz input clock - mww 0xB0000200 0x00000030 # CLKEN - mww 0xB0000204 0x00000f3c # CLKSEL - mww 0xB0000208 0x05007000 # CLKDIV - mww 0xB000020C 0x00004f24 # PLLCON0 - mww 0xB0000210 0x00002b63 # PLLCON1 - mww 0xB000000C 0x08817fa6 # MFSEL + mww 0xB0000200 0x00000030 ;# CLKEN + mww 0xB0000204 0x00000f3c ;# CLKSEL + mww 0xB0000208 0x05007000 ;# CLKDIV + mww 0xB000020C 0x00004f24 ;# PLLCON0 + mww 0xB0000210 0x00002b63 ;# PLLCON1 + mww 0xB000000C 0x08817fa6 ;# MFSEL sleep 10 # we are now running @ 200MHz @@ -52,15 +52,15 @@ $_TARGETNAME configure -event reset-init { # map nor flash to 0x20000000 # map sdram to 0x00000000 - mww 0xb0001000 0x000530c1 # EBICON - mww 0xb0001004 0x40030084 # ROMCON - mww 0xb0001008 0x000010ee # SDCONF0 - mww 0xb000100C 0x00000000 # SDCONF1 - mww 0xb0001010 0x0000015b # SDTIME0 - mww 0xb0001014 0x0000015b # SDTIME1 - mww 0xb0001018 0x00000000 # EXT0CON - mww 0xb000101C 0x00000000 # EXT1CON - mww 0xb0001020 0x00000000 # EXT2CON - mww 0xb0001024 0x00000000 # EXT3CON - mww 0xb000102c 0x00ff0048 # CKSKEW + mww 0xb0001000 0x000530c1 ;# EBICON + mww 0xb0001004 0x40030084 ;# ROMCON + mww 0xb0001008 0x000010ee ;# SDCONF0 + mww 0xb000100C 0x00000000 ;# SDCONF1 + mww 0xb0001010 0x0000015b ;# SDTIME0 + mww 0xb0001014 0x0000015b ;# SDTIME1 + mww 0xb0001018 0x00000000 ;# EXT0CON + mww 0xb000101C 0x00000000 ;# EXT1CON + mww 0xb0001020 0x00000000 ;# EXT2CON + mww 0xb0001024 0x00000000 ;# EXT3CON + mww 0xb000102c 0x00ff0048 ;# CKSKEW } |