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| author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-29 20:04:08 +0000 |
|---|---|---|
| committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-29 20:04:08 +0000 |
| commit | 95da247b40d13600c37588d6be0ef8b3cc9abf2f (patch) | |
| tree | 2b768fbc05c086b44e387272d8db4b79f02f3bf5 /tcl/board/stm32f10x_128k_eval.cfg | |
| parent | f0fd28a66ca5866de557941113b35de5b55b554d (diff) | |
| download | openocd_libswd-95da247b40d13600c37588d6be0ef8b3cc9abf2f.tar.gz openocd_libswd-95da247b40d13600c37588d6be0ef8b3cc9abf2f.tar.bz2 openocd_libswd-95da247b40d13600c37588d6be0ef8b3cc9abf2f.tar.xz openocd_libswd-95da247b40d13600c37588d6be0ef8b3cc9abf2f.zip | |
David Brownell <david-b@pacbell.net>:
Improve the PXA255 target config: move all that board-specific
setup to the pxa255_sst board.cfg, to which it evidently belongs
(it's the only PXA255 board now included).
Provide the PXA255 JTAG id from Intel docs, and add a comment
about how this chip is now EOL'd (last orders taken).
Note that I still can't get my old PXA255 board to work. There's
something broken in the reset sequence, which is preventing the
TAP from coming up at all. Old mailing list posts suggest this
is a longstanding bug...
git-svn-id: svn://svn.berlios.de/openocd/trunk@2416 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'tcl/board/stm32f10x_128k_eval.cfg')
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