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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2011-04-09 18:06:36 +0200 |
|---|---|---|
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | 2011-04-09 19:18:03 +0200 |
| commit | ba71e8c521a7e7c1652560f580f81d564e613508 (patch) | |
| tree | 2b579f49b454552776b632d810e995aa041e7820 /tcl/chip/atmel/at91/at91_rstc.cfg | |
| parent | 28e6dcee85ffdc5af0c630b0aca4e2087d95bca9 (diff) | |
| download | openocd_libswd-ba71e8c521a7e7c1652560f580f81d564e613508.tar.gz openocd_libswd-ba71e8c521a7e7c1652560f580f81d564e613508.tar.bz2 openocd_libswd-ba71e8c521a7e7c1652560f580f81d564e613508.tar.xz openocd_libswd-ba71e8c521a7e7c1652560f580f81d564e613508.zip | |
at91: add chip register definition and generic init support
for
- pio
- pmc
- rstc
- wdt
- sdramc
- smc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Diffstat (limited to 'tcl/chip/atmel/at91/at91_rstc.cfg')
| -rw-r--r-- | tcl/chip/atmel/at91/at91_rstc.cfg | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/tcl/chip/atmel/at91/at91_rstc.cfg b/tcl/chip/atmel/at91/at91_rstc.cfg new file mode 100644 index 00000000..ed608222 --- /dev/null +++ b/tcl/chip/atmel/at91/at91_rstc.cfg @@ -0,0 +1,21 @@ +set AT91_RSTC_CR [expr ($AT91_RSTC + 0x00)] ;# Reset Controller Control Register +set AT91_RSTC_PROCRST [expr (1 << 0)] ;# Processor Reset +set AT91_RSTC_PERRST [expr (1 << 2)] ;# Peripheral Reset +set AT91_RSTC_EXTRST [expr (1 << 3)] ;# External Reset +set AT91_RSTC_KEY [expr (0xa5 << 24)] ;# KEY Password + +set AT91_RSTC_SR [expr ($AT91_RSTC + 0x04)] ;# Reset Controller Status Register +set AT91_RSTC_URSTS [expr (1 << 0)] ;# User Reset Status +set AT91_RSTC_RSTTYP [expr (7 << 8)] ;# Reset Type +set AT91_RSTC_RSTTYP_GENERAL [expr (0 << 8)] +set AT91_RSTC_RSTTYP_WAKEUP [expr (1 << 8)] +set AT91_RSTC_RSTTYP_WATCHDOG [expr (2 << 8)] +set AT91_RSTC_RSTTYP_SOFTWARE [expr (3 << 8)] +set AT91_RSTC_RSTTYP_USER [expr (4 << 8)] +set AT91_RSTC_NRSTL [expr (1 << 16)] ;# NRST Pin Level +set AT91_RSTC_SRCMP [expr (1 << 17)] ;# Software Reset Command in Progress + +set AT91_RSTC_MR [expr ($AT91_RSTC + 0x08)] ;# Reset Controller Mode Register +set AT91_RSTC_URSTEN [expr (1 << 0)] ;# User Reset Enable +set AT91_RSTC_URSTIEN [expr (1 << 4)] ;# User Reset Interrupt Enable +set AT91_RSTC_ERSTL [expr (0xf << 8)] ;# External Reset Length |