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| author | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-30 20:44:21 +0000 |
|---|---|---|
| committer | zwelch <zwelch@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-06-30 20:44:21 +0000 |
| commit | ad50a99d6a914ce66981ef3752a2b27a02a44f81 (patch) | |
| tree | 23b5673fddcbf64487af737d476fe8aed24a571b /tcl | |
| parent | 2eff86ab23a2388f9bf375aeed94a84d267478e7 (diff) | |
| download | openocd_libswd-ad50a99d6a914ce66981ef3752a2b27a02a44f81.tar.gz openocd_libswd-ad50a99d6a914ce66981ef3752a2b27a02a44f81.tar.bz2 openocd_libswd-ad50a99d6a914ce66981ef3752a2b27a02a44f81.tar.xz openocd_libswd-ad50a99d6a914ce66981ef3752a2b27a02a44f81.zip | |
Add svn:eol-style native property to TCL files that are missing it.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2433 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/board/atmel_sam3u_ek.cfg | 2 | ||||
| -rw-r--r-- | tcl/target/cs351x.cfg | 60 |
2 files changed, 31 insertions, 31 deletions
diff --git a/tcl/board/atmel_sam3u_ek.cfg b/tcl/board/atmel_sam3u_ek.cfg index 53c8d348..f7501d00 100644 --- a/tcl/board/atmel_sam3u_ek.cfg +++ b/tcl/board/atmel_sam3u_ek.cfg @@ -1 +1 @@ -source [find target/at91sam3u4e.cfg]
+source [find target/at91sam3u4e.cfg] diff --git a/tcl/target/cs351x.cfg b/tcl/target/cs351x.cfg index 51631d36..75d22838 100644 --- a/tcl/target/cs351x.cfg +++ b/tcl/target/cs351x.cfg @@ -1,30 +1,30 @@ -if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
- set _CHIPNAME cs351x
-}
-
-if { [info exists ENDIAN] } {
- set _ENDIAN $ENDIAN
-} else {
- set _ENDIAN little
-}
-
-if { [info exists CPUTAPID ] } {
- set _CPUTAPID $CPUTAPID
-} else {
- set _CPUTAPID 0x00526fa1
-}
-
-jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-
-# Create the GDB Target.
-set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
-target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526
-# There is 16K of SRAM on this chip
-# FIXME: flash programming is not working by using this work area. So comment this out for now.
-#$_TARGETNAME configure -work-area-virt 0x00000000 -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1
-
-# This chip has a DCC ... use it
-arm7_9 dcc_downloads enable
-
+if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME cs351x +} + +if { [info exists ENDIAN] } { + set _ENDIAN $ENDIAN +} else { + set _ENDIAN little +} + +if { [info exists CPUTAPID ] } { + set _CPUTAPID $CPUTAPID +} else { + set _CPUTAPID 0x00526fa1 +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID + +# Create the GDB Target. +set _TARGETNAME [format "%s.cpu" $_CHIPNAME] +target create $_TARGETNAME fa526 -endian $_ENDIAN -chain-position $_TARGETNAME -variant fa526 +# There is 16K of SRAM on this chip +# FIXME: flash programming is not working by using this work area. So comment this out for now. +#$_TARGETNAME configure -work-area-virt 0x00000000 -work-area-phys 0x00000000 -work-area-size 0x4000 -work-area-backup 1 + +# This chip has a DCC ... use it +arm7_9 dcc_downloads enable + |