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| author | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-12-08 17:15:42 +0000 |
|---|---|---|
| committer | Spencer Oliver <ntfreak@users.sourceforge.net> | 2010-12-10 13:36:10 +0000 |
| commit | c6e07051e6de439f21cb722e542e69e8bd3854c3 (patch) | |
| tree | c1ee9aed949ce3a691a8802ce08d830a5a1c0127 /tcl | |
| parent | ae68ddc25e11a88edee09aa547c2816231a9e636 (diff) | |
| download | openocd_libswd-c6e07051e6de439f21cb722e542e69e8bd3854c3.tar.gz openocd_libswd-c6e07051e6de439f21cb722e542e69e8bd3854c3.tar.bz2 openocd_libswd-c6e07051e6de439f21cb722e542e69e8bd3854c3.tar.xz openocd_libswd-c6e07051e6de439f21cb722e542e69e8bd3854c3.zip | |
stm32: add STM32E-EVAL external memory config script
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/board/stm3210e_eval.cfg | 56 |
1 files changed, 56 insertions, 0 deletions
diff --git a/tcl/board/stm3210e_eval.cfg b/tcl/board/stm3210e_eval.cfg index 83ce488c..e9ba48d9 100644 --- a/tcl/board/stm3210e_eval.cfg +++ b/tcl/board/stm3210e_eval.cfg @@ -6,3 +6,59 @@ set WORKAREASIZE 32768 source [find target/stm32.cfg] + +# +# configure FSMC Bank 1 (NOR/PSRAM Bank 2) NOR flash +# M29W128GL70ZA6E +# + +set _FLASHNAME $_CHIPNAME.norflash +flash bank $_FLASHNAME cfi 0x64000000 0x01000000 2 2 $_TARGETNAME + +proc stm32_enable_fsmc {} { + + echo "Enabling FSMC Bank 1 (NOR/PSRAM Bank 2)" + + # enable gpio (defg) clocks for fsmc + # RCC_APB2ENR + mww 0x40021018 0x000001E0 + + # enable fsmc clock + # RCC_AHBENR + mww 0x40021014 0x00000114 + + # configure gpio to alternate function + # GPIOD_CRL + mww 0x40011400 0x44BB44BB + # GPIOD_CRH + mww 0x40011404 0xBBBBBBBB + + # GPIOE_CRL + mww 0x40011800 0xBBBBB444 + # GPIOE_CRH + mww 0x40011804 0xBBBBBBBB + + # GPIOF_CRL + mww 0x40011C00 0x44BBBBBB + # GPIOF_CRH + mww 0x40011C04 0xBBBB4444 + + # GPIOG_CRL + mww 0x40012000 0x44BBBBBB + # GPIOG_CRH + mww 0x40012004 0x444444B4 + + # setup fsmc timings + # FSMC_BCR1 + mww 0xA0000008 0x00001058 + + # FSMC_BTR1 + mww 0xA000000C 0x10000502 + + # FSMC_BCR1 - enable fsmc + mww 0xA0000008 0x00001059 +} + +$_TARGETNAME configure -event reset-init { + stm32_enable_fsmc +} |