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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-28 14:19:45 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-28 14:19:45 -0800 |
| commit | a398c85de748effa1ac2ea7f75cee127e1ddcd5b (patch) | |
| tree | 70178edb67f0541cde55621058dd2242cb90f4d4 /testing/examples/SAM7X256Test/prj/eclipse_ram.gdb | |
| parent | 01f93137c4c9d2aedd57a715be46d2809c316811 (diff) | |
| download | openocd_libswd-a398c85de748effa1ac2ea7f75cee127e1ddcd5b.tar.gz openocd_libswd-a398c85de748effa1ac2ea7f75cee127e1ddcd5b.tar.bz2 openocd_libswd-a398c85de748effa1ac2ea7f75cee127e1ddcd5b.tar.xz openocd_libswd-a398c85de748effa1ac2ea7f75cee127e1ddcd5b.zip | |
Cortex-M3: don't chain "struct arm" commands
Those commands presume support for the "classic" set of CPU
modes (FIQ, supervisor, IRQ, etc) ... which aren't supported
by the ARMv7-M or ARMv6-M architectures. They also presume
a "struct arm" base type, which this code doesn't use.
We haven't cleaned up the register handling enough to be able
to share any of those "base" methods.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'testing/examples/SAM7X256Test/prj/eclipse_ram.gdb')
0 files changed, 0 insertions, 0 deletions