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authormifi <mifi@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-03-01 16:15:35 +0000
committermifi <mifi@b42882b7-edfa-0310-969c-e2dbd0fdcd60>2008-03-01 16:15:35 +0000
commit5a0910206cc96f7f48a48bfee2cc2720711f5b12 (patch)
treedb8c7bdeda8dbc43e016962930492e62fd9d3208 /testing/examples/SAM7X256Test/prj/sam7x256_reset.script
parent6cf398f3ce76652156d65f552ca8c1804e21a0ff (diff)
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- added sam7x256 test example, and test result
git-svn-id: svn://svn.berlios.de/openocd/trunk@417 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'testing/examples/SAM7X256Test/prj/sam7x256_reset.script')
-rw-r--r--testing/examples/SAM7X256Test/prj/sam7x256_reset.script17
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diff --git a/testing/examples/SAM7X256Test/prj/sam7x256_reset.script b/testing/examples/SAM7X256Test/prj/sam7x256_reset.script
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index 00000000..ff609b01
--- /dev/null
+++ b/testing/examples/SAM7X256Test/prj/sam7x256_reset.script
@@ -0,0 +1,17 @@
+#
+# Init - taken form the script openocd_at91sam7_ecr.script
+#
+# I take this script from the following page:
+#
+# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
+#
+mww 0xfffffd44 0x00008000 # disable watchdog
+mww 0xfffffd08 0xa5000001 # enable user reset
+mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
+sleep 10
+mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
+sleep 10
+mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+sleep 10
+mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
+sleep 100