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authorDrasko DRASKOVIC <drasko.draskovic@gmail.com>2011-04-04 13:06:18 +0200
committerØyvind Harboe <oyvind.harboe@zylin.com>2011-04-05 08:21:17 +0200
commitb1256894598296b54a1827e7ac797ad1c60a0b18 (patch)
tree4aeea961e13cd73a672283d997f3acb2187aa0c9 /tools/git2cl
parent3fea99097efc1d1a38e73ba646261c2a7a79bd12 (diff)
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Added correct endianess treatment for big endian targets. Now it is possible to use mips_m4k_write_memory() and mips_m4k_read_memory() to correctly set-up SDRAM, as well as bulk data write, which already handled endianess well. Also added correct endianess manipulation in case of fallback from erroneus bulk write to simple write (to avoid byte swapping two times).
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