diff options
| -rw-r--r-- | tcl/board/lubbock.cfg | 110 |
1 files changed, 110 insertions, 0 deletions
diff --git a/tcl/board/lubbock.cfg b/tcl/board/lubbock.cfg new file mode 100644 index 00000000..63cc2a41 --- /dev/null +++ b/tcl/board/lubbock.cfg @@ -0,0 +1,110 @@ +# Intel "Lubbock" Development Board with PXA255 (dbpxa255) +# Obsolete; this was Intel's original PXA255 development system +# Board also had CPU cards for SA1100, PXA210, PXA250, and more. + +source [find target/pxa255.cfg] + +jtag_nsrst_delay 250 +jtag_ntrst_delay 250 + +# NOTE: until after pinmux and such are set up, only CS0 is +# available ... not 2nd bank of CFI, or FPGA, SRAM, ENET, etc. + +# CS0, CS1 -- two banks of CFI flash, 32 MBytes each +# each bank is 32-bits wide, two 16-bit chips in parallel +flash bank cfi 0x00000000 0x02000000 2 4 $_TARGETNAME +flash bank cfi 0x04000000 0x02000000 2 4 $_TARGETNAME + +# CS2 low -- FPGA registers +# CS2 high -- 1 MByte SRAM at 0x0a00.0000 ... last 64K for scratch +$_TARGETNAME configure -work-area-phys 0x0a0f0000 + +$_TARGETNAME configure -event reset-assert-pre \ + "$_TARGETNAME configure -work-area-size 0" + +# Make the hex led display a number, assuming CS2 is set up +# and all digits have been enabled through the FPGA. +proc hexled {u32} { + mww 0x08000010 $u32 +} + +# CS3 -- Ethernet +# CS4 -- SA1111 +# CS5 -- PCMCIA + +# NOTE: system console normally uses the FF UART connector + +proc lubbock_init {target} { + + puts "Initialize PXA255 Lubbock board" + + # (1) pinmux + + # GPSR0..GPSR2 + mww 0x40e00018 0x00008000 + mww 0x40e0001c 0x00FC0382 + mww 0x40e00020 0x0001FFFF + # GPDR0..GPDR2 + mww 0x40e0000c 0x0060A800 + mww 0x40e00010 0x00FF0382 + mww 0x40e00014 0x0001C000 + # GAFR0_[LU]..GAFR2_[LU] + mww 0x40e00054 0x98400000 + mww 0x40e00058 0x00002950 + mww 0x40e0005c 0x000A9558 + mww 0x40e00060 0x0005AAAA + mww 0x40e00064 0xA0000000 + mww 0x40e00068 0x00000002 + + # write PSSR, enable GPIOs + mww 0x40f00000 0x00000020 + + # write LED ctrl register ... ones disable + # high byte, 8 hex leds; low byte, 8 discretes + mwh 0x08000040 0xf0ff + + hexled 0x0000 + + # (2) Address space setup + + # MSC0/MSC1/MSC2 + mww 0x48000008 0x23f223f2 + mww 0x4800000c 0x3ff1a441 + mww 0x48000010 0x7ff97ff1 + # pcmcia/cf + mww 0x48000014 0x00000000 + mww 0x48000028 0x00010504 + mww 0x4800002c 0x00010504 + mww 0x48000030 0x00010504 + mww 0x48000034 0x00010504 + mww 0x48000038 0x00004715 + mww 0x4800003c 0x00004715 + + hexled 0x1111 + + # (3) SDRAM setup + # REVISIT this looks dubious ... no refresh cycles + mww 0x48000004 0x03CA4018 + mww 0x48000004 0x004B4018 + mww 0x48000004 0x000B4018 + mww 0x48000004 0x000BC018 + mww 0x48000000 0x00001AC8 + mww 0x48000000 0x00001AC9 + + mww 0x48000040 0x00000000 + + # FIXME -- setup: + # CLOCKS (and faster JTAG) + # enable icache + + # FIXME SRAM isn't working + # $target configure -work-area-size 0x10000 + + hexled 0x2222 + + flash probe 0 + flash probe 1 + + hexled 0xcafe +} +$_TARGETNAME configure -event reset-init "lubbock_init $_TARGETNAME" |