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-rw-r--r--src/target/target/at91sam9260.cfg19
1 files changed, 7 insertions, 12 deletions
diff --git a/src/target/target/at91sam9260.cfg b/src/target/target/at91sam9260.cfg
index b3e1d215..d7c8833c 100644
--- a/src/target/target/at91sam9260.cfg
+++ b/src/target/target/at91sam9260.cfg
@@ -2,21 +2,16 @@
# Target: Atmel AT91SAM9260
######################################
-reset_config trst_and_srst
-
-#jtag_device <IR length> <IR capture> <IR mask> <IDCODE instruction>
-jtag_device 4 0x1 0xf 0xe
-
-jtag_nsrst_delay 200
-jtag_ntrst_delay 0
+# We add to the minimal configuration.
+source [find target/at91sam9260minimal.cfg]
######################
# Target configuration
######################
-target create target0 arm926ejs -endian little -chain-position 0 -variant arm926ejs
-
-[new_target_name] configure -event reset-init {
+$_TARGET_NAME configure -event reset-init {
+ # at reset chip runs at 32khz
+ jtag_khz 8
mww 0xfffffd08 0xa5000501 # RSTC_MR : enable user reset
mww 0xfffffd44 0x00008000 # WDT_MR : disable watchdog
@@ -31,7 +26,8 @@ target create target0 arm926ejs -endian little -chain-position 0 -variant arm926
mww 0xfffffc30 0x00000102 # PMC_MCKR : Clock from PLLA is selected
sleep 10 # wait 10 ms
- jtag_speed 0 # Increase JTAG Speed to 6 MHz
+ # Now run at anything fast... ie: 10mhz!
+ jtag_khz 10000 # Increase JTAG Speed to 6 MHz
arm7_9 dcc_downloads enable # Enable faster DCC downloads
mww 0xffffec00 0x01020102 # SMC_SETUP0 : Setup SMC for Intel NOR Flash JS28F128P30T85 128MBit
@@ -76,7 +72,6 @@ target create target0 arm926ejs -endian little -chain-position 0 -variant arm926
mww 0xffffea04 0x5d2 # SDRAMC_TR : Set refresh timer count to 15us
}
-[new_target_name] configure -work-area-virt 0 -work-area-phys 0x00300000 -work-area-size 0x1000 -work-area-backup 1
#####################
# Flash configuration