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-rw-r--r--src/target/target/str912.cfg31
1 files changed, 14 insertions, 17 deletions
diff --git a/src/target/target/str912.cfg b/src/target/target/str912.cfg
index ca2fb8ca..2e0056a6 100644
--- a/src/target/target/str912.cfg
+++ b/src/target/target/str912.cfg
@@ -3,23 +3,6 @@
# jtag speed. We need to stick to 16kHz until we've finished reset.
jtag_rclk 16
-proc target_0_pre_reset {} {
- jtag_rclk 16
-}
-
-proc target_0_post_reset {} {
- # We can increase speed now that we know the target is halted.
- jtag_rclk 3000
-
- # -- Enable 96K RAM
- # PFQBC enabled / DTCM & AHB wait-states disabled
- mww 0x5C002034 0x0191
-
- str9x flash_config 0 4 2 0 0x80000
- flash protect 0 0 7 off
-
-
-}
jtag_nsrst_delay 100
@@ -38,6 +21,20 @@ jtag_device 5 0x1 0x1 0x1e
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm966e little 1 arm966e
+[new_target_name] configure -event old-pre_reset { jtag_rclk 16 }
+
+[new_target_name] configure -event old-post_reset {
+ # We can increase speed now that we know the target is halted.
+ jtag_rclk 3000
+
+ # -- Enable 96K RAM
+ # PFQBC enabled / DTCM & AHB wait-states disabled
+ mww 0x5C002034 0x0191
+
+ str9x flash_config 0 4 2 0 0x80000
+ flash protect 0 0 7 off
+}
+
working_area 0 0x50000000 16384 nobackup