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Diffstat (limited to 'src/target/target/zy1000.cfg')
-rw-r--r--src/target/target/zy1000.cfg30
1 files changed, 25 insertions, 5 deletions
diff --git a/src/target/target/zy1000.cfg b/src/target/target/zy1000.cfg
index 2fb2db32..56bf0c46 100644
--- a/src/target/target/zy1000.cfg
+++ b/src/target/target/zy1000.cfg
@@ -8,19 +8,39 @@
#SRST reset, which means that the CPU will run a number
#of cycles before it can be halted(as much as milliseconds).
reset_config srst_only srst_pulls_trst
+
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME zy1000
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
#jtag scan chain
-#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag_device 4 0x1 0xf 0xe
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ # sharp changed the number!
+ set _CPUTAPID 0x3f0f0f0f
+}
+jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
-target create target0 arm7tdmi -endian little -chain-position 0 -variant arm7tdmi-s_r4
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAME -variant arm7tdmi-s_r4
# at CPU CLK <32kHz this must be disabled
arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
-[new_target_name] configure -event reset-init {
+$_TARGETNAME configure -event reset-init {
# Set up chip selects & timings
mww 0xFFE00000 0x0100273D
mww 0xFFE00004 0x08002125
@@ -44,7 +64,7 @@ flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
# required for usable performance. Used for lots of
# other things than flash programming.
-[new_target_name] configure -work-area-virt 0 -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
jtag_khz 16000