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-rw-r--r--src/target/arm11.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 588ea3c2..915bee64 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -610,6 +610,7 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
if (DSCR & (ARM11_DSCR_RDTR_FULL | ARM11_DSCR_WDTR_FULL))
{
LOG_ERROR("wDTR/rDTR inconsistent (DSCR %08" PRIx32 ")", DSCR);
+ return ERROR_FAIL;
}
}