summaryrefslogtreecommitdiff
path: root/src/target
diff options
context:
space:
mode:
Diffstat (limited to 'src/target')
-rw-r--r--src/target/board/pic-p32mx.cfg8
-rw-r--r--src/target/mips_ejtag.h1
-rw-r--r--src/target/mips_m4k.c11
-rw-r--r--src/target/target/pic32mx.cfg4
4 files changed, 21 insertions, 3 deletions
diff --git a/src/target/board/pic-p32mx.cfg b/src/target/board/pic-p32mx.cfg
new file mode 100644
index 00000000..a6fe7744
--- /dev/null
+++ b/src/target/board/pic-p32mx.cfg
@@ -0,0 +1,8 @@
+# The Olimex PIC-P32MX has a PIC32MX
+
+set CPUTAPID 0x40916053
+source [find target/pic32mx.cfg]
+
+init
+flash probe 0
+flash probe 1
diff --git a/src/target/mips_ejtag.h b/src/target/mips_ejtag.h
index 74ba2071..cab8c11f 100644
--- a/src/target/mips_ejtag.h
+++ b/src/target/mips_ejtag.h
@@ -102,6 +102,7 @@ typedef struct mips_ejtag_s
{
jtag_tap_t *tap;
u32 impcode;
+ u32 idcode;
/*int use_dma;*/
u32 ejtag_ctrl;
} mips_ejtag_t;
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index 7e7733e9..09766594 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -50,6 +50,7 @@ int mips_m4k_target_create(struct target_s *target, Jim_Interp *interp);
int mips_m4k_examine(struct target_s *target);
int mips_m4k_assert_reset(target_t *target);
int mips_m4k_deassert_reset(target_t *target);
+int mips_m4k_checksum_memory(target_t *target, u32 address, u32 size, u32 *checksum);
target_type_t mips_m4k_target =
{
@@ -73,7 +74,7 @@ target_type_t mips_m4k_target =
.read_memory = mips_m4k_read_memory,
.write_memory = mips_m4k_write_memory,
.bulk_write_memory = mips_m4k_bulk_write_memory,
- .checksum_memory = NULL,
+ .checksum_memory = mips_m4k_checksum_memory,
.blank_check_memory = NULL,
.run_algorithm = mips32_run_algorithm,
@@ -766,7 +767,8 @@ int mips_m4k_examine(struct target_s *target)
if (!target->type->examined)
{
mips_ejtag_get_idcode(ejtag_info, &idcode, NULL);
-
+ ejtag_info->idcode = idcode;
+
if (((idcode >> 1) & 0x7FF) == 0x29)
{
/* we are using a pic32mx so select ejtag port
@@ -790,3 +792,8 @@ int mips_m4k_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buf
{
return mips_m4k_write_memory(target, address, 4, count, buffer);
}
+
+int mips_m4k_checksum_memory(target_t *target, u32 address, u32 size, u32 *checksum)
+{
+ return ERROR_FAIL; /* use bulk read method */
+}
diff --git a/src/target/target/pic32mx.cfg b/src/target/target/pic32mx.cfg
index 2ade5550..a2ebf492 100644
--- a/src/target/target/pic32mx.cfg
+++ b/src/target/target/pic32mx.cfg
@@ -26,13 +26,15 @@ reset_config srst_only
#jtag scan chain
#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
-jtag newtap $_CPUNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1 -expected-id $_CPUTAPID
+jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0
+flash bank pic32mx 0xbd000000 0 0 0 0
+flash bank pic32mx 0xbfc00000 0 0 0 0
# For more information about the configuration files, take a look at:
# openocd.texi