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-rw-r--r--src/target/Makefile.am2
-rw-r--r--src/target/arm7_9_common.c4
-rw-r--r--src/target/cortex_m3.c2
-rw-r--r--src/target/event/sam7s256_reset.script18
-rw-r--r--src/target/event/sam7x256_reset.script18
-rw-r--r--src/target/event/str912_reset.script5
-rw-r--r--src/target/target.c87
-rw-r--r--src/target/target.h4
-rw-r--r--src/target/target/str710.cfg9
-rw-r--r--src/target/target/str730.cfg10
-rw-r--r--src/target/target/str750.cfg11
-rw-r--r--src/target/target/str912.cfg24
-rw-r--r--src/target/target/zy1000.cfg4
-rw-r--r--src/target/xscale.c2
14 files changed, 112 insertions, 88 deletions
diff --git a/src/target/Makefile.am b/src/target/Makefile.am
index 816cb056..5b0ef6e5 100644
--- a/src/target/Makefile.am
+++ b/src/target/Makefile.am
@@ -28,7 +28,7 @@ nobase_dist_pkglib_DATA = xscale/debug_handler.bin event/at91eb40a_reset.script
event/omap5912_reset.script interface/jtagkey-tiny.cfg interface/jtagkey.cfg interface/str9-comstick.cfg \
target/epc9301.cfg target/ipx42x.cfg target/lpc2129.cfg target/netx500.cfg \
target/omap5912.cfg target/pxa270.cfg target/str750.cfg target/str9comstick.cfg \
- target/str730.cfg target/stm32stick.cfg event/str912_reset.script event/str710_program.script \
+ target/str730.cfg target/stm32stick.cfg event/str710_program.script \
target/lm3s811.cfg interface/luminary.cfg interface/luminary-libftdi.cfg interface/luminary-lm3s811.cfg \
interface/stm32-stick.cfg interface/calao-usb-a9260-c01.cfg interface/calao-usb-a9260-c02.cfg \
interface/calao-usb-a9260.cfg target/at91sam9260minimal.cfg event/lpc2148_reset.script \
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index a57fbb5e..563f4701 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -704,7 +704,7 @@ int arm7_9_poll(target_t *target)
int check_pc=0;
if (target->state == TARGET_RESET)
{
- if ((target->reset_mode == RESET_HALT) || (target->reset_mode == RESET_INIT))
+ if (target->reset_halt)
{
if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
{
@@ -772,7 +772,7 @@ int arm7_9_assert_reset(target_t *target)
return ERROR_FAIL;
}
- if ((target->reset_mode == RESET_HALT) || (target->reset_mode == RESET_INIT))
+ if (target->reset_halt)
{
/*
* Some targets do not support communication while SRST is asserted. We need to
diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c
index a90baafa..e3ed4cfb 100644
--- a/src/target/cortex_m3.c
+++ b/src/target/cortex_m3.c
@@ -691,7 +691,7 @@ int cortex_m3_assert_reset(target_t *target)
ahbap_write_system_u32(swjdp, DCB_DCRDR, 0 );
- if (target->reset_mode == RESET_RUN)
+ if (!target->reset_halt)
{
/* Set/Clear C_MASKINTS in a separate operation */
if (cortex_m3->dcb_dhcsr & C_MASKINTS)
diff --git a/src/target/event/sam7s256_reset.script b/src/target/event/sam7s256_reset.script
index 456341d6..1d389287 100644
--- a/src/target/event/sam7s256_reset.script
+++ b/src/target/event/sam7s256_reset.script
@@ -5,13 +5,19 @@
#
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
#
-mww 0xfffffd44 0x00008000 # disable watchdog
-mww 0xfffffd08 0xa5000001 # enable user reset
-mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
+# disable watchdog
+mww 0xfffffd44 0x00008000
+# enable user reset
+mww 0xfffffd08 0xa5000001
+# CKGR_MOR : enable the main oscillator
+mww 0xfffffc20 0x00000601
sleep 10
-mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
+# CKGR_PLLR: 96.1097 MHz
+mww 0xfffffc2c 0x00481c0e
sleep 10
-mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+mww 0xfffffc30 0x00000007
sleep 10
-mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
+# MC_FMR: flash mode (FWS=1,FMCN=60)
+mww 0xffffff60 0x003c0100
sleep 100
diff --git a/src/target/event/sam7x256_reset.script b/src/target/event/sam7x256_reset.script
index 456341d6..1612366c 100644
--- a/src/target/event/sam7x256_reset.script
+++ b/src/target/event/sam7x256_reset.script
@@ -5,13 +5,19 @@
#
# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html
#
-mww 0xfffffd44 0x00008000 # disable watchdog
-mww 0xfffffd08 0xa5000001 # enable user reset
-mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator
+# disable watchdog
+mww 0xfffffd44 0x00008000
+# enable user reset
+mww 0xfffffd08 0xa5000001
+# CKGR_MOR : enable the main oscillator
+mww 0xfffffc20 0x00000601
sleep 10
-mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz
+# CKGR_PLLR: 96.1097 MHz
+mww 0xfffffc2c 0x00481c0e
sleep 10
-mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+# PMC_MCKR : MCK = PLL / 2 ~= 48 MHz
+mww 0xfffffc30 0x00000007
sleep 10
-mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60)
+# MC_FMR: flash mode (FWS=1,FMCN=60)
+mww 0xffffff60 0x003c0100
sleep 100
diff --git a/src/target/event/str912_reset.script b/src/target/event/str912_reset.script
deleted file mode 100644
index 33c62047..00000000
--- a/src/target/event/str912_reset.script
+++ /dev/null
@@ -1,5 +0,0 @@
-# -- Enable 96K RAM */
-mww 0x5C002034, 0x0191 # PFQBC enabled / DTCM & AHB wait-states disabled
-
-str9x flash_config 0 4 2 0 0x80000
-flash protect 0 0 7 off
diff --git a/src/target/target.c b/src/target/target.c
index 0f492ae1..28ebf0ff 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -284,14 +284,12 @@ int target_resume(struct target_s *target, int current, u32 address, int handle_
return retval;
}
-int target_process_reset(struct command_context_s *cmd_ctx)
+int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mode reset_mode)
{
int retval = ERROR_OK;
target_t *target;
struct timeval timeout, now;
- jtag->speed(jtag_speed);
-
target = targets;
while (target)
{
@@ -318,30 +316,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
return retval;
keep_alive(); /* we might be running on a very slow JTAG clk */
-
- /* prepare reset_halt where necessary */
- target = targets;
- while (target)
- {
- if (jtag_reset_config & RESET_SRST_PULLS_TRST)
- {
- switch (target->reset_mode)
- {
- case RESET_HALT:
- command_print(cmd_ctx, "nSRST pulls nTRST, falling back to \"reset run_and_halt\"");
- target->reset_mode = RESET_RUN_AND_HALT;
- break;
- case RESET_INIT:
- command_print(cmd_ctx, "nSRST pulls nTRST, falling back to \"reset run_and_init\"");
- target->reset_mode = RESET_RUN_AND_INIT;
- break;
- default:
- break;
- }
- }
- target = target->next;
- }
-
+
target = targets;
while (target)
{
@@ -349,6 +324,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
* have to drop working areas
*/
target_free_all_working_areas_restore(target, 0);
+ target->reset_halt=((reset_mode==RESET_HALT)||(reset_mode==RESET_INIT));
target->type->assert_reset(target);
target = target->next;
}
@@ -362,7 +338,7 @@ int target_process_reset(struct command_context_s *cmd_ctx)
target = targets;
while (target)
{
- switch (target->reset_mode)
+ switch (reset_mode)
{
case RESET_RUN:
/* nothing to do if target just wants to be run */
@@ -377,10 +353,12 @@ int target_process_reset(struct command_context_s *cmd_ctx)
target_register_event_callback(target_init_handler, cmd_ctx);
break;
case RESET_HALT:
- target_halt(target);
+ if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
+ target_halt(target);
break;
case RESET_INIT:
- target_halt(target);
+ if ((jtag_reset_config & RESET_SRST_PULLS_TRST)==0)
+ target_halt(target);
target_register_event_callback(target_init_handler, cmd_ctx);
break;
default:
@@ -399,6 +377,14 @@ int target_process_reset(struct command_context_s *cmd_ctx)
while (target)
{
target->type->deassert_reset(target);
+ /* We can fail to bring the target into the halted state */
+ target_poll(target);
+ if (target->reset_halt&&((target->state != TARGET_HALTED)))
+ {
+ LOG_WARNING("Failed to reset target into halted mode - issuing halt");
+ target->type->halt(target);
+ }
+
target = target->next;
}
@@ -415,12 +401,6 @@ int target_process_reset(struct command_context_s *cmd_ctx)
return retval;
}
- /* post reset scripts can be quite long, increase speed now. If post
- * reset scripts needs a different speed, they can set the speed to
- * whatever they need.
- */
- jtag->speed(jtag_speed_post_reset);
-
LOG_DEBUG("Waiting for halted stated as approperiate");
/* Wait for reset to complete, maximum 5 seconds. */
@@ -437,10 +417,10 @@ int target_process_reset(struct command_context_s *cmd_ctx)
{
LOG_DEBUG("Polling target");
target_poll(target);
- if ((target->reset_mode == RESET_RUN_AND_INIT) ||
- (target->reset_mode == RESET_RUN_AND_HALT) ||
- (target->reset_mode == RESET_HALT) ||
- (target->reset_mode == RESET_INIT))
+ if ((reset_mode == RESET_RUN_AND_INIT) ||
+ (reset_mode == RESET_RUN_AND_HALT) ||
+ (reset_mode == RESET_HALT) ||
+ (reset_mode == RESET_INIT))
{
if (target->state != TARGET_HALTED)
{
@@ -477,7 +457,6 @@ int target_process_reset(struct command_context_s *cmd_ctx)
}
target_unregister_event_callback(target_init_handler, cmd_ctx);
-
return retval;
}
@@ -1420,23 +1399,28 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
if (strcmp(args[2], "reset_halt") == 0)
{
- LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
+ LOG_WARNING("reset_mode argument is obsolete.");
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
else if (strcmp(args[2], "reset_run") == 0)
{
- LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
+ LOG_WARNING("reset_mode argument is obsolete.");
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
else if (strcmp(args[2], "reset_init") == 0)
{
- LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
+ LOG_WARNING("reset_mode argument is obsolete.");
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
else if (strcmp(args[2], "run_and_halt") == 0)
{
- LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
+ LOG_WARNING("reset_mode argument is obsolete.");
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
else if (strcmp(args[2], "run_and_init") == 0)
{
- LOG_WARNING("reset_mode argument is deprecated. reset_mode = reset_run");
+ LOG_WARNING("reset_mode argument is obsolete.");
+ return ERROR_COMMAND_SYNTAX_ERROR;
}
else
{
@@ -1492,9 +1476,9 @@ int handle_target_command(struct command_context_s *cmd_ctx, char *cmd, char **a
int target_invoke_script(struct command_context_s *cmd_ctx, target_t *target, char *name)
{
- return command_run_linef(cmd_ctx, " if {[catch {info body target_%s_%d} t]==0} {target_%s_%d}",
- name, get_num_by_target(target),
- name, get_num_by_target(target));
+ return command_run_linef(cmd_ctx, " if {[catch {info body target_%d_%s} t]==0} {target_%d_%s}",
+ get_num_by_target(target), name,
+ get_num_by_target(target), name);
}
int handle_run_and_halt_time_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
@@ -1848,11 +1832,8 @@ int handle_reset_command(struct command_context_s *cmd_ctx, char *cmd, char **ar
}
}
- /* temporarily modify mode of current reset target */
- target->reset_mode = reset_mode;
-
/* reset *all* targets */
- target_process_reset(cmd_ctx);
+ target_process_reset(cmd_ctx, reset_mode);
return ERROR_OK;
}
diff --git a/src/target/target.h b/src/target/target.h
index 6ee520bf..f1c61e3b 100644
--- a/src/target/target.h
+++ b/src/target/target.h
@@ -198,7 +198,7 @@ typedef struct target_type_s
typedef struct target_s
{
target_type_t *type; /* target type definition (name, access functions) */
- enum target_reset_mode reset_mode; /* what to do after a reset */
+ int reset_halt; /* attempt resetting the CPU into the halted mode? */
int run_and_halt_time; /* how long the target should run after a run_and_halt reset */
u32 working_area; /* working area (initialized RAM). Evaluated
upon first allocation from virtual/physical address. */
@@ -252,7 +252,7 @@ extern int target_register_user_commands(struct command_context_s *cmd_ctx);
extern int target_init(struct command_context_s *cmd_ctx);
extern int target_examine(struct command_context_s *cmd_ctx);
extern int handle_target(void *priv);
-extern int target_process_reset(struct command_context_s *cmd_ctx);
+extern int target_process_reset(struct command_context_s *cmd_ctx, enum target_reset_mode reset_mode);
extern int target_register_event_callback(int (*callback)(struct target_s *target, enum target_event event, void *priv), void *priv);
extern int target_unregister_event_callback(int (*callback)(struct target_s *target, enum target_event event, void *priv), void *priv);
diff --git a/src/target/target/str710.cfg b/src/target/target/str710.cfg
index 32589cc1..8eb8775d 100644
--- a/src/target/target/str710.cfg
+++ b/src/target/target/str710.cfg
@@ -1,5 +1,11 @@
#start slow, speed up after reset
-jtag_khz 10, 6000
+jtag_khz 10
+proc target_0_pre_reset {} {
+ jtag_khz 10
+}
+proc target_0_post_reset {} {
+ jtag_khz 6000
+}
#use combined on interfaces or targets that can't set TRST/SRST separately
reset_config trst_and_srst srst_pulls_trst
@@ -15,6 +21,7 @@ run_and_halt_time 0 30
target_script 0 gdb_program_config event/str710_program.script
+
working_area 0 0x2000C000 0x4000 nobackup
#flash bank str7x <base> <size> 0 0 <target#> <variant>
diff --git a/src/target/target/str730.cfg b/src/target/target/str730.cfg
index 61270481..77f86a7c 100644
--- a/src/target/target/str730.cfg
+++ b/src/target/target/str730.cfg
@@ -1,6 +1,14 @@
#STR730 CPU
-jtag_khz 10, 3000
+
+jtag_khz 3000
+proc target_0_pre_reset {} {
+ jtag_khz 10
+}
+proc target_0_post_reset {} {
+ jtag_khz 3000
+}
+
#use combined on interfaces or targets that can’t set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
diff --git a/src/target/target/str750.cfg b/src/target/target/str750.cfg
index 35509f46..d00eae09 100644
--- a/src/target/target/str750.cfg
+++ b/src/target/target/str750.cfg
@@ -1,7 +1,13 @@
#STR750 CPU
# jtag speed
-jtag_khz 10, 3000
+jtag_khz 10
+proc target_0_pre_reset {} {
+ jtag_khz 10
+}
+proc target_0_post_reset {} {
+ jtag_khz 3000
+}
#use combined on interfaces or targets that can’t set TRST/SRST separately
#reset_config trst_and_srst srst_pulls_trst
@@ -15,9 +21,6 @@ jtag_device 4 0x1 0xf 0xe
jtag_nsrst_delay 500
jtag_ntrst_delay 500
-#target configuration
-daemon_startup reset
-
#target <type> <startup mode>
#target arm7tdmi <reset mode> <chainpos> <endianness> <variant>
target arm7tdmi little 0 arm7tdmi
diff --git a/src/target/target/str912.cfg b/src/target/target/str912.cfg
index bce03d8d..14bb4973 100644
--- a/src/target/target/str912.cfg
+++ b/src/target/target/str912.cfg
@@ -1,7 +1,26 @@
# script for str9
-# jtag speed
-jtag_khz 16 3000
+# jtag speed. We need to stick to 16kHz until we've finished reset.
+
+jtag_khz 16
+proc target_0_pre_reset {} {
+ jtag_khz 16
+}
+
+proc target_0_post_reset {} {
+ # We can increase speed now that we know the target is halted.
+ jtag_khz 3000
+
+ # -- Enable 96K RAM
+ # PFQBC enabled / DTCM & AHB wait-states disabled
+ mww 0x5C002034 0x0191
+
+ str9x flash_config 0 4 2 0 0x80000
+ flash protect 0 0 7 off
+
+
+}
+
jtag_nsrst_delay 100
jtag_ntrst_delay 100
@@ -20,7 +39,6 @@ jtag_device 5 0x1 0x1 0x1e
target arm966e little 1 arm966e
run_and_halt_time 0 30
-target_script 0 reset event/str912_reset.script
working_area 0 0x50000000 16384 nobackup
diff --git a/src/target/target/zy1000.cfg b/src/target/target/zy1000.cfg
index 26d56814..86848844 100644
--- a/src/target/target/zy1000.cfg
+++ b/src/target/target/zy1000.cfg
@@ -17,9 +17,9 @@ jtag_device 4 0x1 0xf 0xe
target arm7tdmi little 0 arm7tdmi-s_r4
# at CPU CLK <32kHz this must be disabled
-arm7 fast_memory_access enable
+arm7_9 fast_memory_access enable
arm7_9 dcc_downloads enable
-
+arm7_9 sw_bkpts enable
flash bank ecosflash 0x01000000 0x200000 2 2 0 ecos/at91eb40a.elf
target_script 0 reset event/zy1000_reset.script
diff --git a/src/target/xscale.c b/src/target/xscale.c
index d3c1b064..d776e210 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -1699,7 +1699,7 @@ int xscale_deassert_reset(target_t *target)
xscale_write_dcsr(target, 0, 1);
target->state = TARGET_RUNNING;
- if ((target->reset_mode != RESET_HALT) && (target->reset_mode != RESET_INIT))
+ if (!target->reset_halt)
{
jtag_add_sleep(10000);
generated by cgit v1.2.3 (git 2.46.0) at 2024-12-24 17:04:29 +0000