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-rw-r--r--src/target/arm11.c4
-rw-r--r--src/target/arm11_dbgtap.c18
-rw-r--r--src/target/arm_jtag.c16
-rw-r--r--src/target/etb.c3
-rw-r--r--src/target/mips_ejtag.c79
-rw-r--r--src/target/target.c3
-rw-r--r--src/target/xscale.c2
7 files changed, 72 insertions, 53 deletions
diff --git a/src/target/arm11.c b/src/target/arm11.c
index 49172021..e53f0233 100644
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -710,7 +710,7 @@ int arm11_target_request_data(struct target_s *target, u32 size, u8 *buffer)
int arm11_halt(struct target_s *target)
{
int retval = ERROR_OK;
-
+
FNC_INFO;
arm11_common_t * arm11 = target->arch_info;
@@ -1535,6 +1535,8 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp)
}
jtag_device_t *device = jtag_get_device(target->chain_position);
+ if (device==NULL)
+ return ERROR_FAIL;
if (device->ir_length != 5)
{
diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c
index bef62f9a..09e8b78c 100644
--- a/src/target/arm11_dbgtap.c
+++ b/src/target/arm11_dbgtap.c
@@ -102,6 +102,10 @@ void arm11_setup_field(arm11_common_t * arm11, int num_bits, void * out_data, vo
void arm11_add_IR(arm11_common_t * arm11, u8 instr, enum tap_state state)
{
jtag_device_t *device = jtag_get_device(arm11->jtag_info.chain_pos);
+ if (device==NULL)
+ {
+ /* FIX!!!! error is logged, but not propagated back up the call stack... */
+ }
if (buf_get_u32(device->cur_instr, 0, 5) == instr)
{
@@ -139,7 +143,7 @@ static int arm11_in_handler_SCAN_N(u8 *in_value, void *priv, struct scan_field_s
}
/** Select and write to Scan Chain Register (SCREG)
- *
+ *
* This function sets the instruction register to SCAN_N and writes
* the data register with the selected chain number.
*
@@ -178,11 +182,11 @@ void arm11_add_debug_SCAN_N(arm11_common_t * arm11, u8 chain, enum tap_state sta
}
/** Write an instruction into the ITR register
- *
+ *
* \param arm11 Target state variable.
* \param inst An ARM11 processor instruction/opcode.
* \param flag Optional parameter to retrieve the InstCompl flag
- * (this will be written when the JTAG chain is executed).
+ * (this will be written when the JTAG chain is executed).
* \param state Pass the final TAP state or -1 for the default
* value (Run-Test/Idle).
*
@@ -212,7 +216,7 @@ void arm11_add_debug_INST(arm11_common_t * arm11, u32 inst, u8 * flag, enum tap_
*
* \param arm11 Target state variable.
* \return DSCR content
- *
+ *
* \remarks This is a stand-alone function that executes the JTAG command queue.
*/
u32 arm11_read_DSCR(arm11_common_t * arm11)
@@ -244,7 +248,7 @@ u32 arm11_read_DSCR(arm11_common_t * arm11)
*
* \param arm11 Target state variable.
* \param dscr DSCR content
- *
+ *
* \remarks This is a stand-alone function that executes the JTAG command queue.
*/
void arm11_write_DSCR(arm11_common_t * arm11, u32 dscr)
@@ -272,7 +276,7 @@ void arm11_write_DSCR(arm11_common_t * arm11, u32 dscr)
*
* \param dscr DSCR value to analyze
* \return Debug reason
- *
+ *
*/
enum target_debug_reason arm11_get_DSCR_debug_reason(u32 dscr)
{
@@ -514,7 +518,7 @@ void arm11_run_instr_data_to_core_noack(arm11_common_t * arm11, u32 opcode, u32
{
jtag_add_dr_scan(asizeof(chain5_fields), chain5_fields, TAP_PD);
jtag_add_pathmove(asizeof(arm11_MOVE_PD_RTI_PD_with_delay),
- arm11_MOVE_PD_RTI_PD_with_delay);
+ arm11_MOVE_PD_RTI_PD_with_delay);
}
else
{
diff --git a/src/target/arm_jtag.c b/src/target/arm_jtag.c
index 9452c2b9..2967f088 100644
--- a/src/target/arm_jtag.c
+++ b/src/target/arm_jtag.c
@@ -39,12 +39,14 @@
int arm_jtag_set_instr(arm_jtag_t *jtag_info, u32 new_instr, in_handler_t handler)
{
jtag_device_t *device = jtag_get_device(jtag_info->chain_pos);
-
+ if (device==NULL)
+ return ERROR_FAIL;
+
if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
{
scan_field_t field;
u8 t[4];
-
+
field.device = jtag_info->chain_pos;
field.num_bits = device->ir_length;
field.out_value = t;
@@ -57,7 +59,7 @@ int arm_jtag_set_instr(arm_jtag_t *jtag_info, u32 new_instr, in_handler_t handl
field.in_handler_priv = NULL;
jtag_add_ir_scan(1, &field, -1);
}
-
+
return ERROR_OK;
}
@@ -68,7 +70,7 @@ int arm_jtag_scann(arm_jtag_t *jtag_info, u32 new_scan_chain)
{
u32 values[1];
int num_bits[1];
-
+
values[0]=new_scan_chain;
num_bits[0]=jtag_info->scann_size;
@@ -82,7 +84,7 @@ int arm_jtag_scann(arm_jtag_t *jtag_info, u32 new_scan_chain)
num_bits,
values,
-1);
-
+
jtag_info->cur_scan_chain = new_scan_chain;
}
@@ -92,12 +94,12 @@ int arm_jtag_scann(arm_jtag_t *jtag_info, u32 new_scan_chain)
int arm_jtag_reset_callback(enum jtag_event event, void *priv)
{
arm_jtag_t *jtag_info = priv;
-
+
if (event == JTAG_TRST_ASSERTED)
{
jtag_info->cur_scan_chain = 0;
}
-
+
return ERROR_OK;
}
diff --git a/src/target/etb.c b/src/target/etb.c
index af474e84..05d970d5 100644
--- a/src/target/etb.c
+++ b/src/target/etb.c
@@ -63,6 +63,8 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
int etb_set_instr(etb_t *etb, u32 new_instr)
{
jtag_device_t *device = jtag_get_device(etb->chain_pos);
+ if (device==NULL)
+ return ERROR_FAIL;
if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
{
@@ -440,7 +442,6 @@ int handle_etb_config_command(struct command_context_s *cmd_ctx, char *cmd, char
if (!jtag_device)
{
- LOG_ERROR("jtag device number '%s' not defined", args[1]);
return ERROR_FAIL;
}
diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index 52c710ec..43250046 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -35,12 +35,14 @@
int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, in_handler_t handler)
{
jtag_device_t *device = jtag_get_device(ejtag_info->chain_pos);
-
+ if (device==NULL)
+ return ERROR_FAIL;
+
if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
{
scan_field_t field;
u8 t[4];
-
+
field.device = ejtag_info->chain_pos;
field.num_bits = device->ir_length;
field.out_value = t;
@@ -53,18 +55,18 @@ int mips_ejtag_set_instr(mips_ejtag_t *ejtag_info, int new_instr, in_handler_t h
field.in_handler_priv = NULL;
jtag_add_ir_scan(1, &field, -1);
}
-
+
return ERROR_OK;
}
int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode, in_handler_t handler)
{
scan_field_t field;
-
+
jtag_add_end_state(TAP_RTI);
-
+
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE, NULL);
-
+
field.device = ejtag_info->chain_pos;
field.num_bits = 32;
field.out_value = NULL;
@@ -75,23 +77,23 @@ int mips_ejtag_get_idcode(mips_ejtag_t *ejtag_info, u32 *idcode, in_handler_t ha
field.in_handler = NULL;
field.in_handler_priv = NULL;
jtag_add_dr_scan(1, &field, -1);
-
+
if (jtag_execute_queue() != ERROR_OK)
{
LOG_ERROR("register read failed");
}
-
+
return ERROR_OK;
}
int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t handler)
{
scan_field_t field;
-
+
jtag_add_end_state(TAP_RTI);
-
+
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE, NULL);
-
+
field.device = ejtag_info->chain_pos;
field.num_bits = 32;
field.out_value = NULL;
@@ -102,12 +104,12 @@ int mips_ejtag_get_impcode(mips_ejtag_t *ejtag_info, u32 *impcode, in_handler_t
field.in_handler = NULL;
field.in_handler_priv = NULL;
jtag_add_dr_scan(1, &field, -1);
-
+
if (jtag_execute_queue() != ERROR_OK)
{
LOG_ERROR("register read failed");
}
-
+
return ERROR_OK;
}
@@ -115,10 +117,13 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
{
jtag_device_t *device;
device = jtag_get_device(ejtag_info->chain_pos);
+
+ if (device==NULL)
+ return ERROR_FAIL;
scan_field_t field;
u8 t[4];
int retval;
-
+
field.device = ejtag_info->chain_pos;
field.num_bits = 32;
field.out_value = t;
@@ -130,18 +135,18 @@ int mips_ejtag_drscan_32(mips_ejtag_t *ejtag_info, u32 *data)
field.in_handler = NULL;
field.in_handler_priv = NULL;
jtag_add_dr_scan(1, &field, -1);
-
+
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
LOG_ERROR("register read failed");
return retval;
}
-
+
return ERROR_OK;
}
int mips_ejtag_step_enable(mips_ejtag_t *ejtag_info)
-{
+{
u32 code[] = {
MIPS32_MTC0(1,31,0), /* move $1 to COP0 DeSave */
MIPS32_MFC0(1,23,0), /* move COP0 Debug to $1 */
@@ -152,10 +157,10 @@ int mips_ejtag_step_enable(mips_ejtag_t *ejtag_info)
MIPS32_B(NEG16(7)),
MIPS32_NOP,
};
-
+
mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
0, NULL, 0, NULL, 1);
-
+
return ERROR_OK;
}
int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info)
@@ -178,17 +183,17 @@ int mips_ejtag_step_disable(mips_ejtag_t *ejtag_info)
MIPS32_B(NEG16(15)),
MIPS32_NOP,
};
-
+
mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
0, NULL, 0, NULL, 1);
-
+
return ERROR_OK;
}
int mips_ejtag_config_step(mips_ejtag_t *ejtag_info, int enable_step)
-{
+{
if (enable_step)
- return mips_ejtag_step_enable(ejtag_info);
+ return mips_ejtag_step_enable(ejtag_info);
return mips_ejtag_step_disable(ejtag_info);
}
@@ -197,18 +202,18 @@ int mips_ejtag_enter_debug(mips_ejtag_t *ejtag_info)
u32 ejtag_ctrl;
jtag_add_end_state(TAP_RTI);
mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL, NULL);
-
+
/* set debug break bit */
ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
-
+
/* break bit will be cleared by hardware */
ejtag_ctrl = ejtag_info->ejtag_ctrl;
mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
LOG_DEBUG("ejtag_ctrl: 0x%8.8x", ejtag_ctrl);
if((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0)
LOG_DEBUG("Failed to enter Debug Mode!");
-
+
return ERROR_OK;
}
@@ -216,12 +221,12 @@ int mips_ejtag_exit_debug(mips_ejtag_t *ejtag_info, int enable_interrupts)
{
u32 inst;
inst = MIPS32_DRET;
-
+
/* TODO : enable/disable interrrupts */
-
+
/* execute our dret instruction */
mips32_pracc_exec(ejtag_info, 1, &inst, 0, NULL, 0, NULL, 0);
-
+
return ERROR_OK;
}
@@ -245,23 +250,23 @@ int mips_ejtag_read_debug(mips_ejtag_t *ejtag_info, u32* debug_reg)
MIPS32_B(NEG16(14)),
MIPS32_NOP,
};
-
+
mips32_pracc_exec(ejtag_info, sizeof(code)/sizeof(code[0]), code, \
0, NULL, 1, debug_reg, 1);
-
+
return ERROR_OK;
}
int mips_ejtag_init(mips_ejtag_t *ejtag_info)
{
u32 ejtag_version;
-
+
mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode, NULL);
LOG_DEBUG("impcode: 0x%8.8x", ejtag_info->impcode);
-
+
/* get ejtag version */
ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);
-
+
switch (ejtag_version)
{
case 0:
@@ -289,12 +294,12 @@ int mips_ejtag_init(mips_ejtag_t *ejtag_info)
ejtag_info->impcode & (1<<14) ? " noDMA": " DMA",
ejtag_info->impcode & (1<<0) ? " MIPS64": " MIPS32"
);
-
+
if((ejtag_info->impcode & (1<<14)) == 0)
LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
-
+
/* set initial state for ejtag control reg */
ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV;
-
+
return ERROR_OK;
}
diff --git a/src/target/target.c b/src/target/target.c
index 5e8cf748..79c97c24 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -3400,6 +3400,9 @@ target_configure( Jim_GetOptInfo *goi,
if( e != JIM_OK ){
return e;
}
+ if (jtag_get_device(w)==NULL)
+ return JIM_ERR;
+
/* make this exactly 1 or 0 */
target->chain_position = w;
} else {
diff --git a/src/target/xscale.c b/src/target/xscale.c
index 90c89518..ce40c685 100644
--- a/src/target/xscale.c
+++ b/src/target/xscale.c
@@ -215,6 +215,8 @@ int xscale_get_arch_pointers(target_t *target, armv4_5_common_t **armv4_5_p, xsc
int xscale_jtag_set_instr(int chain_pos, u32 new_instr)
{
jtag_device_t *device = jtag_get_device(chain_pos);
+ if (device==NULL)
+ return ERROR_FAIL;
if (buf_get_u32(device->cur_instr, 0, device->ir_length) != new_instr)
{
generated by cgit v1.2.3 (git 2.46.0) at 2024-11-05 02:38:59 +0000