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-rw-r--r--src/tcl/target/ixp42x.cfg32
1 files changed, 32 insertions, 0 deletions
diff --git a/src/tcl/target/ixp42x.cfg b/src/tcl/target/ixp42x.cfg
new file mode 100644
index 00000000..12ace990
--- /dev/null
+++ b/src/tcl/target/ixp42x.cfg
@@ -0,0 +1,32 @@
+#xscale ixp42x CPU
+
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME ixp42x
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ # this defaults to a bigendian
+ set _ENDIAN big
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ # force an error till we get a good number
+ set _CPUTAPID 0xffffffff
+}
+
+#use combined on interfaces or targets that can?t set TRST/SRST separately
+reset_config srst_only srst_pulls_trst
+#jtag scan chain
+
+jtag newtap $_CHIPNAME cpu -irlen 7 -ircapture 0x1 -irmask 0x7f -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME xscale -endian $_ENDIAN -chain-position $_TARGETNAME -variant ixp42x
+