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-rw-r--r--tcl/target/pic32mx.cfg40
1 files changed, 40 insertions, 0 deletions
diff --git a/tcl/target/pic32mx.cfg b/tcl/target/pic32mx.cfg
new file mode 100644
index 00000000..139f801f
--- /dev/null
+++ b/tcl/target/pic32mx.cfg
@@ -0,0 +1,40 @@
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME pic32mx
+}
+
+if { [info exists ENDIAN] } {
+ set _ENDIAN $ENDIAN
+} else {
+ set _ENDIAN little
+}
+
+if { [info exists CPUTAPID ] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ # force an error till we get a good number
+ set _CPUTAPID 0x30938053
+}
+
+jtag_nsrst_delay 100
+jtag_ntrst_delay 100
+
+#use combined on interfaces or targets that can't set TRST/SRST separately
+reset_config srst_only
+
+#jtag scan chain
+#format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
+jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
+
+set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
+target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
+
+$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0xa0000000 -work-area-size 16384 -work-area-backup 0
+
+flash bank pic32mx 0xbd000000 0 0 0 0
+flash bank pic32mx 0xbfc00000 0 0 0 0
+
+# For more information about the configuration files, take a look at:
+# openocd.texi