diff options
Diffstat (limited to 'testing/examples/AT91R40008Test')
-rw-r--r-- | testing/examples/AT91R40008Test/test_ram.hex | 46 | ||||
-rw-r--r-- | testing/examples/AT91R40008Test/test_ram.map | 340 |
2 files changed, 193 insertions, 193 deletions
diff --git a/testing/examples/AT91R40008Test/test_ram.hex b/testing/examples/AT91R40008Test/test_ram.hex index f3e72d95..28a1f40a 100644 --- a/testing/examples/AT91R40008Test/test_ram.hex +++ b/testing/examples/AT91R40008Test/test_ram.hex @@ -1,23 +1,23 @@ -:1000000018F09FE518F09FE518F09FE518F09FE5C0
-:1000100018F09FE518F09FE518F09FE518F09FE5B0
-:1000200040000000B0000000B4000000B800000074
-:10003000BC00000000000000C0000000C400000080
-:10004000DBF021E37CD09FE5D7F021E378D09FE57A
-:10005000D1F021E374D09FE5D2F021E370D09FE589
-:10006000D3F021E36CD09FE56C109FE56C209FE5F9
-:100070000030A0E3020051E104308114FCFFFF1ABC
-:1000800000000FE1C000C0E300F029E10000A0E3A0
-:100090000010A0E348209FE50FE0A0E112FF2FE150
-:1000A0000000A0E10000A0E10000A0E1FBFFFFEAEA
-:1000B000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEAA8
-:1000C000FEFFFFEAFEFFFFEA000600000005000059
-:1000D0000003000000040000000A00004C010000C2
-:1000E0004C010000E80000000CD04DE20130A0E31C
-:1000F00000308DE50230A0E304308DE50030A0E350
-:1001000008308DE538309FE5002093E500309DE50F
-:10011000023083E000308DE500309DE5013083E260
-:1001200000308DE504309DE5013083E204308DE53B
-:1001300000209DE504309DE5033082E008308DE528
-:0C014000F4FFFFEA480100000700000087
-:0400000300000040B9
-:00000001FF
+:1000000018F09FE518F09FE518F09FE518F09FE5C0 +:1000100018F09FE518F09FE518F09FE518F09FE5B0 +:1000200040000000B0000000B4000000B800000074 +:10003000BC00000000000000C0000000C400000080 +:10004000DBF021E37CD09FE5D7F021E378D09FE57A +:10005000D1F021E374D09FE5D2F021E370D09FE589 +:10006000D3F021E36CD09FE56C109FE56C209FE5F9 +:100070000030A0E3020051E104308114FCFFFF1ABC +:1000800000000FE1C000C0E300F029E10000A0E3A0 +:100090000010A0E348209FE50FE0A0E112FF2FE150 +:1000A0000000A0E10000A0E10000A0E1FBFFFFEAEA +:1000B000FEFFFFEAFEFFFFEAFEFFFFEAFEFFFFEAA8 +:1000C000FEFFFFEAFEFFFFEA000600000005000059 +:1000D0000003000000040000000A00004C010000C2 +:1000E0004C010000E80000000CD04DE20130A0E31C +:1000F00000308DE50230A0E304308DE50030A0E350 +:1001000008308DE538309FE5002093E500309DE50F +:10011000023083E000308DE500309DE5013083E260 +:1001200000308DE504309DE5013083E204308DE53B +:1001300000209DE504309DE5033082E008308DE528 +:0C014000F4FFFFEA480100000700000087 +:0400000300000040B9 +:00000001FF diff --git a/testing/examples/AT91R40008Test/test_ram.map b/testing/examples/AT91R40008Test/test_ram.map index 5377a5d3..1df9053e 100644 --- a/testing/examples/AT91R40008Test/test_ram.map +++ b/testing/examples/AT91R40008Test/test_ram.map @@ -1,170 +1,170 @@ -
-Memory Configuration
-
-Name Origin Length Attributes
-ram 0x00000000 0x00040000
-*default* 0x00000000 0xffffffff
-
-Linker script and memory map
-
-LOAD ./src/crt.o
-LOAD ./src/main.o
-START GROUP
-LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2\libgcc.a
-LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2/../../../../arm-elf/lib\libc.a
-END GROUP
- 0x00000100 FIQ_STACK_SIZE = 0x100
- 0x00000100 IRQ_STACK_SIZE = 0x100
- 0x00000100 ABT_STACK_SIZE = 0x100
- 0x00000100 UND_STACK_SIZE = 0x100
- 0x00000400 SVC_STACK_SIZE = 0x400
-
-.text 0x00000000 0x14c
- *(.vectors)
- .vectors 0x00000000 0x40 ./src/crt.o
- 0x00000040 . = ALIGN (0x4)
- *(.init)
- .init 0x00000040 0xa8 ./src/crt.o
- 0x000000c4 FIQHandler
- 0x000000b8 PAbortHandler
- 0x000000a0 ExitFunction
- 0x00000040 ResetHandler
- 0x000000bc DAbortHandler
- 0x000000c0 IRQHandler
- 0x000000b0 UndefHandler
- 0x000000e8 . = ALIGN (0x4)
- *(.text)
- .text 0x000000e8 0x0 ./src/crt.o
- .text 0x000000e8 0x60 ./src/main.o
- 0x000000e8 main
- 0x00000148 . = ALIGN (0x4)
- *(.rodata)
- .rodata 0x00000148 0x4 ./src/main.o
- 0x0000014c . = ALIGN (0x4)
- *(.rodata*)
- 0x0000014c . = ALIGN (0x4)
- *(.glue_7t)
- .glue_7t 0x0000014c 0x0 ./src/crt.o
- .glue_7t 0x0000014c 0x0 ./src/main.o
- 0x0000014c . = ALIGN (0x4)
- *(.glue_7)
- .glue_7 0x0000014c 0x0 ./src/crt.o
- .glue_7 0x0000014c 0x0 ./src/main.o
- 0x0000014c . = ALIGN (0x4)
- 0x0000014c etext = .
-
-.vfp11_veneer 0x00000000 0x0
- .vfp11_veneer 0x00000000 0x0 ./src/crt.o
- .vfp11_veneer 0x00000000 0x0 ./src/main.o
-
-.data 0x0000014c 0x0
- 0x0000014c PROVIDE (__data_start, .)
- *(.data)
- .data 0x0000014c 0x0 ./src/crt.o
- .data 0x0000014c 0x0 ./src/main.o
- 0x0000014c . = ALIGN (0x4)
- 0x0000014c edata = .
- 0x0000014c _edata = .
- 0x0000014c PROVIDE (__data_end, .)
-
-.bss 0x0000014c 0x8b4
- 0x0000014c PROVIDE (__bss_start, .)
- *(.bss)
- .bss 0x0000014c 0x0 ./src/crt.o
- .bss 0x0000014c 0x0 ./src/main.o
- *(COMMON)
- 0x0000014c . = ALIGN (0x4)
- 0x0000014c PROVIDE (__bss_end, .)
- 0x00000200 . = ALIGN (0x100)
- *fill* 0x0000014c 0xb4 00
- 0x00000200 PROVIDE (__stack_start, .)
- 0x00000200 PROVIDE (__stack_fiq_start, .)
- 0x00000300 . = (. + FIQ_STACK_SIZE)
- *fill* 0x00000200 0x100 00
- 0x00000300 . = ALIGN (0x4)
- 0x00000300 PROVIDE (__stack_fiq_end, .)
- 0x00000300 PROVIDE (__stack_irq_start, .)
- 0x00000400 . = (. + IRQ_STACK_SIZE)
- *fill* 0x00000300 0x100 00
- 0x00000400 . = ALIGN (0x4)
- 0x00000400 PROVIDE (__stack_irq_end, .)
- 0x00000400 PROVIDE (__stack_abt_start, .)
- 0x00000500 . = (. + ABT_STACK_SIZE)
- *fill* 0x00000400 0x100 00
- 0x00000500 . = ALIGN (0x4)
- 0x00000500 PROVIDE (__stack_abt_end, .)
- 0x00000500 PROVIDE (__stack_und_start, .)
- 0x00000600 . = (. + UND_STACK_SIZE)
- *fill* 0x00000500 0x100 00
- 0x00000600 . = ALIGN (0x4)
- 0x00000600 PROVIDE (__stack_und_end, .)
- 0x00000600 PROVIDE (__stack_svc_start, .)
- 0x00000a00 . = (. + SVC_STACK_SIZE)
- *fill* 0x00000600 0x400 00
- 0x00000a00 . = ALIGN (0x4)
- 0x00000a00 PROVIDE (__stack_svc_end, .)
- 0x00000a00 PROVIDE (__stack_end, .)
- 0x00000a00 PROVIDE (__heap_start, .)
-OUTPUT(test_ram.elf elf32-littlearm)
-
-.ARM.attributes
- 0x00000000 0x10
- .ARM.attributes
- 0x00000000 0x10 ./src/crt.o
- .ARM.attributes
- 0x00000010 0x10 ./src/main.o
-
-.debug_line 0x00000000 0xc8
- .debug_line 0x00000000 0x71 ./src/crt.o
- .debug_line 0x00000071 0x57 ./src/main.o
-
-.debug_info 0x00000000 0x208
- .debug_info 0x00000000 0x77 ./src/crt.o
- .debug_info 0x00000077 0x191 ./src/main.o
-
-.debug_abbrev 0x00000000 0x76
- .debug_abbrev 0x00000000 0x12 ./src/crt.o
- .debug_abbrev 0x00000012 0x64 ./src/main.o
-
-.debug_aranges 0x00000000 0x48
- .debug_aranges
- 0x00000000 0x28 ./src/crt.o
- .debug_aranges
- 0x00000028 0x20 ./src/main.o
-
-.debug_ranges 0x00000000 0x20
- .debug_ranges 0x00000000 0x20 ./src/crt.o
-
-.debug_frame 0x00000000 0x24
- .debug_frame 0x00000000 0x24 ./src/main.o
-
-.debug_loc 0x00000000 0x1f
- .debug_loc 0x00000000 0x1f ./src/main.o
-
-.debug_pubnames
- 0x00000000 0x1b
- .debug_pubnames
- 0x00000000 0x1b ./src/main.o
-
-.comment 0x00000000 0x12
- .comment 0x00000000 0x12 ./src/main.o
-
-Cross Reference Table
-
-Symbol File
-DAbortHandler ./src/crt.o
-ExitFunction ./src/crt.o
-FIQHandler ./src/crt.o
-IRQHandler ./src/crt.o
-PAbortHandler ./src/crt.o
-ResetHandler ./src/crt.o
-UndefHandler ./src/crt.o
-__bss_end ./src/crt.o
-__bss_start ./src/crt.o
-__stack_abt_end ./src/crt.o
-__stack_fiq_end ./src/crt.o
-__stack_irq_end ./src/crt.o
-__stack_svc_end ./src/crt.o
-__stack_und_end ./src/crt.o
-main ./src/main.o
- ./src/crt.o
+ +Memory Configuration + +Name Origin Length Attributes +ram 0x00000000 0x00040000 +*default* 0x00000000 0xffffffff + +Linker script and memory map + +LOAD ./src/crt.o +LOAD ./src/main.o +START GROUP +LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2\libgcc.a +LOAD d:/compiler/yagarto/bin/../lib/gcc/arm-elf/4.2.2/../../../../arm-elf/lib\libc.a +END GROUP + 0x00000100 FIQ_STACK_SIZE = 0x100 + 0x00000100 IRQ_STACK_SIZE = 0x100 + 0x00000100 ABT_STACK_SIZE = 0x100 + 0x00000100 UND_STACK_SIZE = 0x100 + 0x00000400 SVC_STACK_SIZE = 0x400 + +.text 0x00000000 0x14c + *(.vectors) + .vectors 0x00000000 0x40 ./src/crt.o + 0x00000040 . = ALIGN (0x4) + *(.init) + .init 0x00000040 0xa8 ./src/crt.o + 0x000000c4 FIQHandler + 0x000000b8 PAbortHandler + 0x000000a0 ExitFunction + 0x00000040 ResetHandler + 0x000000bc DAbortHandler + 0x000000c0 IRQHandler + 0x000000b0 UndefHandler + 0x000000e8 . = ALIGN (0x4) + *(.text) + .text 0x000000e8 0x0 ./src/crt.o + .text 0x000000e8 0x60 ./src/main.o + 0x000000e8 main + 0x00000148 . = ALIGN (0x4) + *(.rodata) + .rodata 0x00000148 0x4 ./src/main.o + 0x0000014c . = ALIGN (0x4) + *(.rodata*) + 0x0000014c . = ALIGN (0x4) + *(.glue_7t) + .glue_7t 0x0000014c 0x0 ./src/crt.o + .glue_7t 0x0000014c 0x0 ./src/main.o + 0x0000014c . = ALIGN (0x4) + *(.glue_7) + .glue_7 0x0000014c 0x0 ./src/crt.o + .glue_7 0x0000014c 0x0 ./src/main.o + 0x0000014c . = ALIGN (0x4) + 0x0000014c etext = . + +.vfp11_veneer 0x00000000 0x0 + .vfp11_veneer 0x00000000 0x0 ./src/crt.o + .vfp11_veneer 0x00000000 0x0 ./src/main.o + +.data 0x0000014c 0x0 + 0x0000014c PROVIDE (__data_start, .) + *(.data) + .data 0x0000014c 0x0 ./src/crt.o + .data 0x0000014c 0x0 ./src/main.o + 0x0000014c . = ALIGN (0x4) + 0x0000014c edata = . + 0x0000014c _edata = . + 0x0000014c PROVIDE (__data_end, .) + +.bss 0x0000014c 0x8b4 + 0x0000014c PROVIDE (__bss_start, .) + *(.bss) + .bss 0x0000014c 0x0 ./src/crt.o + .bss 0x0000014c 0x0 ./src/main.o + *(COMMON) + 0x0000014c . = ALIGN (0x4) + 0x0000014c PROVIDE (__bss_end, .) + 0x00000200 . = ALIGN (0x100) + *fill* 0x0000014c 0xb4 00 + 0x00000200 PROVIDE (__stack_start, .) + 0x00000200 PROVIDE (__stack_fiq_start, .) + 0x00000300 . = (. + FIQ_STACK_SIZE) + *fill* 0x00000200 0x100 00 + 0x00000300 . = ALIGN (0x4) + 0x00000300 PROVIDE (__stack_fiq_end, .) + 0x00000300 PROVIDE (__stack_irq_start, .) + 0x00000400 . = (. + IRQ_STACK_SIZE) + *fill* 0x00000300 0x100 00 + 0x00000400 . = ALIGN (0x4) + 0x00000400 PROVIDE (__stack_irq_end, .) + 0x00000400 PROVIDE (__stack_abt_start, .) + 0x00000500 . = (. + ABT_STACK_SIZE) + *fill* 0x00000400 0x100 00 + 0x00000500 . = ALIGN (0x4) + 0x00000500 PROVIDE (__stack_abt_end, .) + 0x00000500 PROVIDE (__stack_und_start, .) + 0x00000600 . = (. + UND_STACK_SIZE) + *fill* 0x00000500 0x100 00 + 0x00000600 . = ALIGN (0x4) + 0x00000600 PROVIDE (__stack_und_end, .) + 0x00000600 PROVIDE (__stack_svc_start, .) + 0x00000a00 . = (. + SVC_STACK_SIZE) + *fill* 0x00000600 0x400 00 + 0x00000a00 . = ALIGN (0x4) + 0x00000a00 PROVIDE (__stack_svc_end, .) + 0x00000a00 PROVIDE (__stack_end, .) + 0x00000a00 PROVIDE (__heap_start, .) +OUTPUT(test_ram.elf elf32-littlearm) + +.ARM.attributes + 0x00000000 0x10 + .ARM.attributes + 0x00000000 0x10 ./src/crt.o + .ARM.attributes + 0x00000010 0x10 ./src/main.o + +.debug_line 0x00000000 0xc8 + .debug_line 0x00000000 0x71 ./src/crt.o + .debug_line 0x00000071 0x57 ./src/main.o + +.debug_info 0x00000000 0x208 + .debug_info 0x00000000 0x77 ./src/crt.o + .debug_info 0x00000077 0x191 ./src/main.o + +.debug_abbrev 0x00000000 0x76 + .debug_abbrev 0x00000000 0x12 ./src/crt.o + .debug_abbrev 0x00000012 0x64 ./src/main.o + +.debug_aranges 0x00000000 0x48 + .debug_aranges + 0x00000000 0x28 ./src/crt.o + .debug_aranges + 0x00000028 0x20 ./src/main.o + +.debug_ranges 0x00000000 0x20 + .debug_ranges 0x00000000 0x20 ./src/crt.o + +.debug_frame 0x00000000 0x24 + .debug_frame 0x00000000 0x24 ./src/main.o + +.debug_loc 0x00000000 0x1f + .debug_loc 0x00000000 0x1f ./src/main.o + +.debug_pubnames + 0x00000000 0x1b + .debug_pubnames + 0x00000000 0x1b ./src/main.o + +.comment 0x00000000 0x12 + .comment 0x00000000 0x12 ./src/main.o + +Cross Reference Table + +Symbol File +DAbortHandler ./src/crt.o +ExitFunction ./src/crt.o +FIQHandler ./src/crt.o +IRQHandler ./src/crt.o +PAbortHandler ./src/crt.o +ResetHandler ./src/crt.o +UndefHandler ./src/crt.o +__bss_end ./src/crt.o +__bss_start ./src/crt.o +__stack_abt_end ./src/crt.o +__stack_fiq_end ./src/crt.o +__stack_irq_end ./src/crt.o +__stack_svc_end ./src/crt.o +__stack_und_end ./src/crt.o +main ./src/main.o + ./src/crt.o |