| Commit message (Collapse) | Author | Age | Files | Lines |
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Most of this patch updates documentation and comments for various
Luminary boards, supporting two bug fixes by helping to make sense
of the current mess:
- Recent rev C lm3s811 eval boards didn't work. They must use
the ICDI layout, which sets up some signals that the older
boards didn't need. This is actually safe and appropriate
for *all* recent boards ... so just make "luminary.cfg" use
the ICDI layout.
- "luminary-lm3s811.cfg", was previously unusable! No VID/PID;
and the wrong vendor string. Make it work, but reserve it
for older boards where the ICDI layout is wrong.
- Default the LM3748 eval board to "luminary.cfg", like the
other boards. If someone uses an external JTAG adapter, all
boards will use the same workaround (override that default).
The difference between the two FT2232 layouts is that eventually
the EVB layout will fail cleanly when asked to enable SWO trace,
but the ICDI layout will as cleanly be able to enable it. Folk
using "luminary.cfg" with Rev B boards won't see anything going
wrong until SWO support is (someday) added.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The 10-pin JTAG layout used with these adapters is used by
a variety of platforms including AVR.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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In conjunction with manual register setup, this lets the ETM trigger
cause entry to debug state. It should make it easier to test and
bugfix the ETM code, by enabling non-trace usage and isolating bugs
specific to thef ETM support. (One current issue being that trace
data collection using the ETB doesn't yet behave.)
For example, many ARM9 cores with an ETM should be able to implement
four more (simple) breakpoints and two more (simple) watchpoints than
the EmbeddedICE supports. Or, they should be able to support complex
breakpoints, incorporating ETM sequencer, counters, and/or subroutine
entry/exit criteria int criteria used to trigger debug entry.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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This command was misplaced; it's not generic to all traceport drivers,
only the ETB supports this kind of configuration. So move it, and
update the relevant documentation.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Much to my surprise, I observed a "flash erase_address ..."
command erasing data which I said should not be erased.
The issue turns out to be generic NOR flash code which was
silently, and rather dangerously, morphing partial-sector
references into unrequested whole-sector ones.
This patch removes that low-level morphing. If desired, it
can and should be done in higher level code. (We might need
to fix some stuff in the GDB server code.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Use the DPM watchpoint support; remove old incomplete stubs.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Semihosting enables code running on an ARM target to use the
I/O facilities on the host computer. The target application must
be linked against a library that forwards operation requests by
using the SVC instruction that is trapped at the Supervisor Call
vector by the debugger. The "hosted" library version provided
with CodeSourcery's Sourcery G++ Lite for ARM EABI is one example.
This is currently available for ARM9 processors, but any ARM
variant should be able to support this with little additional work.
Tested using binaries compiled with Sourcery G++ Lite 2009q1-161
and ARM RVCT 3.0.
[dbrownell@users.sourceforge.net: doc tweaks, NEWS]
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Make them match the C code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Mention changes to flash bank command syntax, 'nand verify' command,
command error handling and reporting, and help/usage command upgrades.
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Add $HOME/.openocd as the first default script search directory, allowing
the user to override the standard scripts.
Update the user guide with information on where OpenOCD expects to find
configuration files and scripts. Also fixed some minor formatting issues.
Add entry to NEWS as well.
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Rename the "armv4_5" command prefix to straight "arm" so it makes
more sense for newer cores. Add a simple compatibility script.
Make sure all the commands give the same "not an ARM" diagnostic
message (and fail properly) when called against non-ARM targets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Now the ARM11 cores can use the renamed arm_checksum_memory()
and arm_blank_check_memory() routines ... do so.
Sanity checked with "flash erase_check" of both NOR banks on an
OMAP2420 ... the algorithm code dumped four lines of of "poll"
status after each of almost 520 blocks (yes, *very* annoying) but
gave plausible results after producing that spam.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Add "-dev" tag. Update minor version number.
Archive old NEWS file, start a new one.
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Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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There were a few more changes worth mentioning, including support
for more JTAG adapters, boundary scan improvements, another NAND
driver, and the Win64 stuff.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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And update doc accordingly. That EmbeddedICE register was
introduced for ARM9TDMI and then carried forward into most
new chips that use EmbeddedICE.
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Startup now mostly works, except that the initial target state
is "unknown" ... previously, it refused to even start.
Getting that far required fixing the ircapture value (which
can never have been correct!) and the default JTAG clock rate,
then providing custom reset script.
The "reset" command is still iffy. DCSR updates, and loading
the debug handler, report numerous DR/IR capture failures.
But once that's done, "poll" reports that the CPU is halted
(which it shouldn't be, this was "reset run"!), due to the
rather curious reason "target-not-halted".
Summary: you still can't debug these parts, but it's closer.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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This abstracts the "jtag arp_init-reset" call into a method
called from OpenOCD startup and reset processing.
Platforms which have different requirements for how such hard
resets must be performed can now override "init_reset" instead
of needing to rebuild custom hacked versions of the server.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2798 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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enable" command to revert to hardware stepping. Ideally we could retire the "hardware_step enable" command once we no longer believe it to be necessary.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2643 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2627 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2625 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Create new NEWS file from release script template.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2522 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2474 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@991 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@990 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- fixed mixed line endings on flash.c, log.c, gdb_server.c
git-svn-id: svn://svn.berlios.de/openocd/trunk@371 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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They are now in sync.
xscale-be branch is now closed.
git-svn-id: svn://svn.berlios.de/openocd/trunk@271 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@64 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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