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* use COMMAND_HANDLER macro to define all commandsZachary T Welch2009-11-131-10/+5
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* Cortex-M3: use the new inheritance/nesting schemeDavid Brownell2009-11-051-27/+25
| | | | | | | | | | | | Use new target_to_cm3() and target_to_armv7m() inlines, instead of a series of x->arch_info conversions. Remove arch_info, since nothing uses it. Also fix an omission: the Cortex-M3 commands didn't verify that they were operating on that kind of target. Add comment about the ARMv7M version of that omission. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* Improve armv7m command argument parsing.Zachary T Welch2009-11-051-11/+20
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* ARMv7M: add docs, remove exportsDavid Brownell2009-11-051-28/+62
| | | | | | | | | | | | Add Doxygen for the exported ARMv7-M interfaces. Make the non-exported stuff static. Remove functions and data which are now observably unused. Add comment about a small speedup that the run_algorithm() logic could use. Shrink a few too-long lines. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* David Brownell <david-b@pacbell.net> oharboe2009-09-121-4/+4
| | | | | | | | | | | | | | | Cleanup some the downloaded ARM target algorithm code: - Provide more complete disassembly of the DCC bulk write code - Make code blocks "static const", in case GCC doesn't - Fix some tabbing/layout issues - Make some arm7_9_common.h flags be "bool" not "int"; and compact the layout a bit (group most bools together) git-svn-id: svn://svn.berlios.de/openocd/trunk@2698 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> Several of the ARMv7M registers are 8 ↵oharboe2009-08-181-29/+30
| | | | | | | | | bits or less; don't display them as 32 bits unless that's their true size. (Removes some confusion. git-svn-id: svn://svn.berlios.de/openocd/trunk@2586 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - fix segfault introduced during cortex reg cleanupntfreak2009-08-071-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2575 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net>:ntfreak2009-07-211-3/+10
| | | | | | | | | | | Dump SP on poll, and show whether it's MSP or PSP. Thread mode can use either stack pointer, so this is part of the state that's not yet displayed. Shrink some lines. git-svn-id: svn://svn.berlios.de/openocd/trunk@2555 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net>:ntfreak2009-07-211-56/+69
| | | | | | | | | | | | | | | | | | | | | | Clean up treatment of registers in ARMv7-M and Cortex-M3. - At the arch level: * Just list registers and names; don't impose core-specific policy about how they are accessed. * Each register has a symbol. * Remove the register mode field (irrelevant to debugger) - At the core/implementation level: * Just map the registers to their relevant access methods; don't require the arch level to say how that should work (cores other than Cortex-M3 could do it differently). * Don't use undefined bits from register 20. * Use register IDs that are part of the ARMv7-M interface. In short, there's now a real distinction between the arch and core layers. git-svn-id: svn://svn.berlios.de/openocd/trunk@2554 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net>:ntfreak2009-07-211-20/+11
| | | | | | | | | Revert parts of the previous ARMv7-M register patch. It turns out that part of the issue is a documentation problem for the Cortex-M3 r1 parts. So for the rest, simpler fixes are possible (in followup patch). git-svn-id: svn://svn.berlios.de/openocd/trunk@2552 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Andreas Fritiofson <andreas.fritiofson@gmail.com> UTF8 fixesoharboe2009-07-171-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2549 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>, ↵zwelch2009-07-161-79/+53
| | | | | | | | | | | | | | David Brownell <david-b@pacbell.net>: Move the dap command handler implementations to arm_adi_v5.c, leaving just thin wrappers in armv7m.c. There should be no change in functionality here. (From Magnus.) Minor style cleanup: whitespace, line length, etc. Update spec references to use docs which are currently available. (From Dave.) git-svn-id: svn://svn.berlios.de/openocd/trunk@2544 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Magnus Lundin <lundin@mlu.mine.nu>, Oyvind Harboe <oyvind.harboe@zylin.com>, ↵zwelch2009-07-161-13/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | David Brownell <david-b@pacbell.net>: Some cleanup of the ARMv7-M support: - Reference the relevant ARMv7-M ARM doc (DDI 0405C to non-Vendors), and update the Cortex-M3 doc refs (DDI 0337C is no longer available). - Those registers aren't actually general, and some are incorrect (per all public docs anyway). Update comments and code accordingly. * What the Core Debug facility exposes is *implementation-specific* not architectural. These values aren't fully portable. They match Cortex-M3 ... so no current implementation will make trouble, but the next v7m implementation might. * Four of the registers are actually not exposed that way. Before Cortex-M3 r2p0 they are read/written through MRS/MSR instructions. In that newest silicon, they are four bytes in one register, not four separate registers. - Update the CM3 code to report when that one register is available, and not try to access it when it isn't. Also declare the register numbers that an eventual MRS/MSR solution will need to be using. - Stop line wrapping the exception labels. So for parts before r2p0 OpenOCD behavior is effectively unchanged, and still buggy; but for those newer parts a few things might now be correct. Most current Cortex-M3 parts use r1p1 (or earlier); this seems to include most LM3S parts and all STM32 parts. Parts using r2p0 are available, and include fourth generation LM3S parts ("Tempest") plus AT91SAM3 and LPC17xx parts which are now sampling. git-svn-id: svn://svn.berlios.de/openocd/trunk@2543 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove whitespace at end of lines, step 1.zwelch2009-06-231-7/+7
| | | | | | | - Replace '\s*$' with ''. git-svn-id: svn://svn.berlios.de/openocd/trunk@2379 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove whitespace that occurs after '('.zwelch2009-06-231-1/+1
| | | | | | | - Replace '([ \t]*' with '('. git-svn-id: svn://svn.berlios.de/openocd/trunk@2376 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fixes '=' whitespacezwelch2009-06-231-3/+3
| | | | | | | | | - Replace ')\(=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(=\)(' with '\1 \2 ('. - Replace '\(\w\)\(=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2372 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fixes '!=' whitespacezwelch2009-06-231-3/+3
| | | | | | | | | - Replace ')\(!=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(!=\)(' with '\1 \2 ('. - Replace '\(\w\)\(!=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2363 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Replace 'if(' with 'if ('.zwelch2009-06-231-3/+3
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2357 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* C99 printf() -Werror fixesduane2009-06-211-8/+8
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2311 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u32' to 'uint32_t' in src/target/arm*zwelch2009-06-181-18/+18
| | | | | | | | - Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2278 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u16' to 'uint16_t'zwelch2009-06-181-6/+6
| | | | | | | | - Replace '\([^_]\)u16' with '\1uint16_t'. - Replace '^u16' with 'uint16_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u8' to 'uint8_t' in src/targetzwelch2009-06-181-4/+4
| | | | | | | | - Replace '\([^_]\)u8' with '\1uint8_t'. - Replace '^u8' with 'uint8_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - change signature for adi_jtag_dp_scan and adi_jtag_dp_scan_u32 to use ↵ntfreak2009-06-021-4/+24
| | | | | | | | | | | | | swjdp_common_t *swjdp instead of arm_jtag_t *jtag_info - change SWJDP_IR/DR_APACC to DAP_IR/DR_APACC to conform with ARM_ADI docs. - add swjdp->memaccess_tck field and code for extra tck clocks before accessing memory bus - Set default memaccess value to 8 for Cortex-M3. - Add dap memaccess command. - document all armv7 dap cmds. - Original patch submitted by Magnus Lundin [lundin@mlu.mine.nu]. git-svn-id: svn://svn.berlios.de/openocd/trunk@2005 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Add target_run_algorithm wrapper:zwelch2009-05-311-2/+2
| | | | | | | | - replaces all calls to target->type->run_algorithm. - add documentation in target_s to warn not to invoke callback directly. git-svn-id: svn://svn.berlios.de/openocd/trunk@1961 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Audit and eliminate redundant #include directives in arm target files.zwelch2009-05-111-10/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1714 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Change reg_s value field from u8 * to void *; it must always be cast.zwelch2009-05-061-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1623 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Added dap baseaddr and dap apid commandsmlu2009-04-271-4/+75
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1547 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Changed armv7m and cortexm3 to use nev arm_adi_v5 instead of cortex_swjdp.mlu2009-04-271-0/+48
| | | | | | Added support for accessport ROM table identification, dap command. git-svn-id: svn://svn.berlios.de/openocd/trunk@1536 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Zach Welch <zw@superlucidity.net> fix -Werror warningsoharboe2009-04-191-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1472 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Slight improvement in run_algorithm register restore.mlu2009-04-031-4/+9
| | | | | | | More debug info for cortex swjdp errors. git-svn-id: svn://svn.berlios.de/openocd/trunk@1453 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - preserve cortex_m3 C_MASKINTS during resume/stepntfreak2008-11-201-3/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1179 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - remove build warningsntfreak2008-11-061-1/+0
| | | | | | | - added svn props for newly added files git-svn-id: svn://svn.berlios.de/openocd/trunk@1142 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Øyvind Harboe and Rick Altherr <kc8apf@kc8apf.net> - handle failed run ↵oharboe2008-11-021-32/+42
| | | | | | algorithms more gracefully git-svn-id: svn://svn.berlios.de/openocd/trunk@1121 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - remove build warningsntfreak2008-10-141-6/+6
| | | | | | - add missing svn props git-svn-id: svn://svn.berlios.de/openocd/trunk@1062 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Laurentiu Cocanu - more error handling fixesoharboe2008-10-141-6/+21
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1059 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* hontor <hontor@126.com> - ARMV7_GDB_HACKS compilation error fixoharboe2008-10-131-86/+88
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1045 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Fixes SEGFAULT when setting registers from GDB.oharboe2008-10-071-20/+4
| | | | | | set $cpsr=1234 git-svn-id: svn://svn.berlios.de/openocd/trunk@1026 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fixed crash in dummy register handlingoharboe2008-10-071-0/+26
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1024 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - added myself to copyright on files i remember adding large contributions ↵ntfreak2008-09-201-0/+3
| | | | | | | | | for over the years - cleaned up headers to match rest of code - added missing svn props for previously added files git-svn-id: svn://svn.berlios.de/openocd/trunk@987 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* duan ellis target tcl work in progressoharboe2008-08-241-1/+1
| | | | | | | | converts a number of 'simple string lookup tables' into NVP tables. These NVP tables will be used by various commands coming in the next patch. git-svn-id: svn://svn.berlios.de/openocd/trunk@962 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fix BUG: keep_alive() error messagesoharboe2008-08-201-20/+15
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@949 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - moved flash erase_check target code to target.cntfreak2008-05-271-0/+60
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@694 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - added ARMV7_GDB_HACKS define to armv7m.h, enabling all gdb hacks to be ↵ntfreak2008-04-261-1/+17
| | | | | | | | enabled/disabled for testing - added armv7m dummy cpsr register to stop gdb setting thumb bit git-svn-id: svn://svn.berlios.de/openocd/trunk@623 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Reset wip. Just adding hooks. This is just to reduce the size of the actual ↵oharboe2008-04-111-5/+5
| | | | | | change, no change in behaviour. git-svn-id: svn://svn.berlios.de/openocd/trunk@565 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - single core context used, removed debug context as thought unnecessary.ntfreak2008-04-101-123/+45
| | | | | | | | | - DCRDR now used to access special core registers - info is currently omitted from the cortex_m3 TRM ARM have told me this is the preferred access method and the docs will be updated soon. - now checks for User Thread Mode and Thread mode when halted. - removed repeated function declarations from command.c - cortex_m3_prepare_reset_halt removed, updated cortex_m3_assert_reset to suit git-svn-id: svn://svn.berlios.de/openocd/trunk@558 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - rename log functions to stop conflicts under win32 (wingdi)ntfreak2008-03-251-18/+18
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@523 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - gdb server was incorrectly sending null terminator on qXfer:features:read: ↵ntfreak2008-03-221-7/+19
| | | | | | | | packet - armv7m now sends correct gdb register packet git-svn-id: svn://svn.berlios.de/openocd/trunk@522 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - armv7m control register now set as dirty when switching contextntfreak2008-03-211-12/+4
| | | | | | | - armv7m added core_mode to cortex_m3_debug_entry DEBUG msg - cortex_m3 changed WARNINGS to DEBUG msg in cortex_m3_resume git-svn-id: svn://svn.berlios.de/openocd/trunk@519 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - 16 and 32 bit unaligned accesses supportedntfreak2008-03-111-4/+4
| | | | | | | | - uses packed transfers for 8/16bit read/writes greater than 4bytes - 8/16bit transfers now use address auto increment git-svn-id: svn://svn.berlios.de/openocd/trunk@495 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - the jtag chain is examined and validated after GDB & telnet serversoharboe2008-03-101-6/+0
| | | | | | | | | | | | | | | | | | are up and running. The examination and validation is actually "optional" from the point of view of GDB + telnet servers. Multiple targets should work fine with this. - jtag_speed is dropped(divisor is increased), if jtag examination and validation fails. - the chain is validated 10x to catch the worst jtag_speed offences - added LOG_SILENT that can be used to shut up log. Feeble ersatz for try+catch. - GDB register packets are now always replied in order to make sure that GDB connect works. If the target is not halted, then these packets contain dummy values. git-svn-id: svn://svn.berlios.de/openocd/trunk@483 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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