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* command_context_t -> struct command_contextZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct command_context.
* target_t -> struct targetZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct target.
* image_t -> struct imageZachary T Welch2009-11-131-2/+2
| | | | | | | Remove misleading typedef and redundant suffix from struct image. Also removes the typedef from enum image_type, as it is used in image.h only.
* etm_context_t -> struct etm_contextZachary T Welch2009-11-131-9/+9
| | | | Remove misleading typedef and redundant suffix from struct etm_context.
* reg_cache_t -> struct reg_cacheZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct reg_cache.
* etmv1_trace_data_t -> struct etmv1_trace_dataZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct etmv1_trace_data.
* etm_capture_driver_t -> struct etm_capture_driverZachary T Welch2009-11-131-3/+3
| | | | Remove misleading typedef and redundant suffix from struct etm_capture_driver.
* etm_reg_t -> struct etm_regZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct etm_reg.
* arm_jtag_t -> struct arm_jtagZachary T Welch2009-11-131-2/+2
| | | | Remove misleading typedef and redundant suffix from struct arm_jtag.
* ETM: start support for ETMv2+David Brownell2009-11-121-1/+9
| | | | | | | | | | | | | | | | | ARM11 and newer cores include updated ETM modules. Recognize their version codes and some key config differences. Sanity checked on an OMAP2, with an ETM11RV r0p1 (ETMv3.1). This still handles only scan chain 6, with at most 128 registers. Newer cores (mostly, Cortex) will need to use the DAP instead. Note that the newer ETM modules don't quite fit the quirky config model of the older ones ... having more port widths is easy, but the modes aren't the same. That still needs to change. Fix a curious bug ... how did the register cache NOT get saved?? Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM: remove old mid-level ETM handleDavid Brownell2009-11-111-2/+1
| | | | | | | | | | | | | | | | | | Now that nothing uses the old ETM handle any more, remove it. Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores access ETM facilities. Now ARM11 could support standard ETM (and ETB) access as soon as it derives from "struct arm" ... its scanchain 6 is used access the ETM, just like ARM7 and ARM9. The Cortex parts (both M3 and A8) will need modified access methods (via ETM init parameters), so they use the DAP. Our first A8 target (OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very useful without SWO trace support (it's painfully stripped down), so that support won't be worth adding for a while. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* ETM cleanupDavid Brownell2009-11-111-7/+7
| | | | | | | | | | | | | | | | Various cleanups of ETM related code. - Saner error return paths - Simplify arm7_9 init ... no need for extra zeroing! - Shrink some lines - Tweak some diagnostics - Use shorter name for ETM struct type. - Don't exit() and similar. The diagnostics look forward to having this ETM code work with more than just ARM7/ARM9. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
* src/target: remove 'extern' and wrap headersZachary T Welch2009-11-091-2/+4
| | | | Remove extern keywords from function prototypes and wrap long lines.
* When setting up an ETM, cache its ETM_CONFIG register. Thendbrownell2009-09-231-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | only expose the registers which are actually present. They could be missing for two basic reasons: - This version might not support them at all; e.g. ETMv1.1 doesn't have some control/status registers. (My sample of ARM9 boards shows all with ETMv1.3 support, FWIW.) - The configuration on this chip may not populate as many registers as possible; e.g. only two data value comparators instead of eight. Includes a bugfix in the "etm info" command: only one of the two registers is missing on older silicon, so show the first one before bailing. Update ETM usage docs to explain that those registers need to be written to configure what is traced, and that some ETM configs are not yet handled. Also, give some examples of the kinds of constrained trace which could be arranged. git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Start cleaning up ETM register handling. On one ARM926 ETM+ETBdbrownell2009-09-231-7/+16
| | | | | | | | | | | | | | | | | | | | | | system, removes 20 non-existent registers ... but still includes over 45 (!) ETM registers which don't even exist there ... - Integrate the various tables to get one struct per register - Get rid of needless per-register dynamic allocation - Double check list of registers: * Remove sixteen (!) non-registers for data comparators * Remove four registers that imply newer ETM than we support * Change some names to match current architecture specs - Handle more register info * some are write-only * some are read-only * record which versions have them, just in case - Reorganize the registers to facilitate removing the extras * group e.g. comparator/counter #N registers together * add and use lookup-by-ID git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Initial ETM cleanups. Most of these are cosmetic:dbrownell2009-09-231-30/+19
| | | | | | | | | | | | | | | | - Add a header comment - Line up the ETM context struct, pack it a bit - Remove unused context_id (this doesn't support ETMv2 yet) - Make most functions static - Remove unused string table and other needless lines of code - Correct "tracemode" helptext Also provide and use an etm_reg_lookup() to find entries in the ETM register cache. This will help cope with corrected contents of that cache, which doesn't include entires for non-existent registers. git-svn-id: svn://svn.berlios.de/openocd/trunk@2750 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fixes '>=' whitespacezwelch2009-06-231-1/+1
| | | | | | | | - Replace ')\(>=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(>=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2367 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u32' to 'uint32_t' in src/targetzwelch2009-06-181-14/+14
| | | | | | | | - Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2279 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u16' to 'uint16_t'zwelch2009-06-181-1/+1
| | | | | | | | - Replace '\([^_]\)u16' with '\1uint16_t'. - Replace '^u16' with 'uint16_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2277 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Transform 'u8' to 'uint8_t' in src/targetzwelch2009-06-181-3/+3
| | | | | | | | - Replace '\([^_]\)u8' with '\1uint8_t'. - Replace '^u8' with 'uint8_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2274 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Audit and eliminate redundant #include directives in other target files.zwelch2009-05-111-5/+3
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* whitespace fixesoharboe2009-05-081-6/+6
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@1682 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Update Embedded ICE registers explicitly during target->type->examine() insteadoharboe2008-04-161-0/+1
| | | | | | | of as a side effect of target->type->poll(). This makes it clearer when things happen during reset/examine. git-svn-id: svn://svn.berlios.de/openocd/trunk@585 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - convert all files to unix line-endingdrath2008-02-251-214/+214
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@347 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - update jtag_speed setting when changing it during runtime with a FT2232 ↵drath2007-08-161-0/+1
| | | | | | | | | | | based interface - use 'etm trigger_percent' setting when programming ETB trigger count - fixed some small bugs in ETM trace analysis - fixed minor bug in flash writing (thanks to Pavel Chromy) git-svn-id: svn://svn.berlios.de/openocd/trunk@197 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - calculate cycles since last executed instruction when cycle-accurate ↵drath2007-07-311-0/+2
| | | | | | | | | | | tracing is enabled - increase memory pseudo-image cache size to 1024 byte for improved trace analysis performance - added OpenOCD+trace as an ETM capture driver example implementation - new usbprog driver (thanks to Benedikt Sauter) git-svn-id: svn://svn.berlios.de/openocd/trunk@186 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - added support for Asix Presto JTAG interface (thanks to Pavel Chromy and ↵drath2007-07-151-1/+2
| | | | | | | | | | | | Asix for making this addition possible) - added support for usbprog (thanks to Benedikt Sauter) - make OpenOCD listen for WM_QUIT messages on windows (thanks to Pavel Chromy) - register at_exit handler to do necessary unregistering (thanks to Pavel Chromy) - added dummy ETM capture driver to allow ETM to be registered without a capture driver git-svn-id: svn://svn.berlios.de/openocd/trunk@180 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - added manpage for OpenOCD (thanks to Uwe Hermann)drath2007-06-141-4/+14
| | | | | | | | | | - fixed bug in ARM926EJ-S cache handling that caused cache linefills to be disabled after first debug entry - added support for auto image type detection (thanks to Vincent Palatin) - further work on ETM trace decoding (tested with a ETB interface using an ETM in normal 16-bit port mode, still experimental) git-svn-id: svn://svn.berlios.de/openocd/trunk@169 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - reworked image handling to support multiple sections (tested with ihex ↵drath2007-05-301-1/+2
| | | | | | | | | | file containing gaps) This checkin is still experimental, not recommended for general use git-svn-id: svn://svn.berlios.de/openocd/trunk@159 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - split fileio handling into fileio part and image handlingdrath2007-05-291-4/+127
| | | | | | | | | | | - reworked etm/etb into a generic etm part with trace capture drivers (currently only etb supported) - added XScale debug handler binary to repository - added Thumb disassembling (thanks to Vincent Palatin for this patch) - added support for non-CFI compatible flashes to cfi driver (currently only SST39VFxxx devices supported) This checkin is experimental, not suitable for general use git-svn-id: svn://svn.berlios.de/openocd/trunk@155 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - str9x flash support (Thanks to Spencer Oliver)drath2006-09-281-1/+1
| | | | | | | | | | | | | - str75x flash support (Thanks to Spencer Oliver) - correct reporting of T-Bit in CPSR (Thanks to John Hartman for reporting this) - core-state (ARM/Thumb) can be switched by modifying CPSR - fixed bug in gdb_server register handling - register values > 32-bit should now be supported - several minor fixes and enhancements git-svn-id: svn://svn.berlios.de/openocd/trunk@100 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - prepare OpenOCD for branching, created ./trunk/drath2006-06-021-0/+76
git-svn-id: svn://svn.berlios.de/openocd/trunk@64 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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