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* Minor regression bugfix for the jtag_tap_handle_event() casedbrownell2009-09-201-3/+7
| | | | | | | | for disabling TAPs. We don't actually know how to make any JRCs which do that yet; but when we do, this will matter. git-svn-id: svn://svn.berlios.de/openocd/trunk@2735 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Added CPUDBG_WCR_BASE definemlu2009-09-191-0/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2734 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Avoid cache invalidation when writing to hardware debug registersmlu2009-09-191-4/+19
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2733 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Style cleanup for the updated ft2232_add_pathmove().dbrownell2009-09-191-15/+18
| | | | | | | Indentation, whitespace, line lengths. git-svn-id: svn://svn.berlios.de/openocd/trunk@2731 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor behavior fixes for the two JTAG reset events (C/internal,dbrownell2009-09-192-15/+14
| | | | | | | | | | | | | | | | | and Tcl/external): - Reorder so *both* paths (TCK/TMS or TRST) can enable TAPs with ICEpick ... first C code flags TAPs that got disabled, then call any Tcl code that might want to re-enable them. - Always call the C/internal handlers when JTAG operations can be issued; previously that wasn't done when TRST was used. Plus some small cleanups (whitespace, strings, better messaging during debug and on some errors) to reset-related code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2730 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.cmlu2009-09-181-28/+39
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2728 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* remove unused externsoharboe2009-09-181-3/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2727 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Tweak TCL reset script ... mostly improving descriptions ofdbrownell2009-09-181-12/+27
| | | | | | | the various steps, but also calling [target names] only once. git-svn-id: svn://svn.berlios.de/openocd/trunk@2726 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Address codereview comment from Steve Grubb <sgrubb@redhat.com>:dbrownell2009-09-172-33/+26
| | | | | | | | | | avoid a duplicate test. Plus other cleanup in the same code: be "static", sane line lengths for source and diagnostics, and fix misleading variable names. git-svn-id: svn://svn.berlios.de/openocd/trunk@2725 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Minor fixes to NAND code and docsdbrownell2009-09-171-25/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | Erase logic: - command invocation + treat "nand erase N" (no offset/length) as "erase whole chip N" + catch a few more bogus parameter cases, like length == 0 (sigh) - nand_erase() should be static - on error + say which block failed, and if it was a bad block + don't give up after the first error; try to erase the rest - on success, say which nand device was erased (name isn't unique) Device list ("nand list"): - say how many blocks there are - split summary into two lines - give example in the docs Doc tweaks: - Use @option{...} for DaVinci's supported hardware ECC options For the record, I've observed that _sometimes_ erasing bad blocks causes failure reports, and that manufacturer bad block markers aren't always erasable (even when erasing their blocks doesn't trigger an error report). git-svn-id: svn://svn.berlios.de/openocd/trunk@2724 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Fix coredump seen in some code paths.dbrownell2009-09-171-0/+3
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2723 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* michal smulski <michal.smulski@ooma.com> fix regression in ↵oharboe2009-09-171-18/+30
| | | | | | jtag_add_pathmove() which broke arm11 in r1825. Other uses of jtag_add_pathmove are svn + xsvf + xscale... git-svn-id: svn://svn.berlios.de/openocd/trunk@2722 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* prefix zy1000_reboot command to avoid name conflictsoharboe2009-09-171-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2721 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* srst_gates_jtag option. at91sam9260 needs retesting, and possibly ↵oharboe2009-09-173-1/+21
| | | | | | srst_gates_jtag added to reset_config. Could i.MX27 be a case where srst does not pull trst, but really srst gates jtag clock? git-svn-id: svn://svn.berlios.de/openocd/trunk@2720 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* The "arm9tdmi.c" file is more of a generic ARM9 support file:dbrownell2009-09-171-3/+17
| | | | | | | | | | | - update comments to say so. - update docs to clarify that the "arm9tdmi" command prefix is a misnomer. - bugfix some messages that wrongly assume only ARM9TDMI based processors use this code. git-svn-id: svn://svn.berlios.de/openocd/trunk@2719 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Remove unused varables (moved to armv7a)mlu2009-09-161-5/+0
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2717 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Use a variable armv7a->debug_base instead of hardedcoded OMAP3530_DEBUG_BASEmlu2009-09-161-28/+31
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2716 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Rolf Meeser <rolfm_9dq@yahoo.de> adds flash support for NXP's LPC2900 family ↵oharboe2009-09-164-4/+1961
| | | | | | (ARM968E). git-svn-id: svn://svn.berlios.de/openocd/trunk@2715 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Define debug_base, debug_ap, memory_ap in armv7a_common_tmlu2009-09-151-0/+7
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2714 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Updated mode string list.mlu2009-09-151-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2713 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Definy symbolic values for VA to PA address translation operationsmlu2009-09-151-0/+10
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2712 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fix bug when using 32 instead of 64 bit value in callback, caught by -Walloharboe2009-09-151-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2711 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Check return values to avoid infinite wait in loop on error.mlu2009-09-141-4/+8
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2709 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Cache invalidation when writing to memorymlu2009-09-141-0/+18
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2708 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* error message upon recursive invocation of reset from reset event handlersoharboe2009-09-141-0/+22
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2707 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fix email addressoharboe2009-09-141-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2706 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Rolf Meeser <rolfm_9dq@yahoo.de> warning fix in previous commit was wrong. ↵oharboe2009-09-141-36/+38
| | | | | | target_code_size needs the real value later. git-svn-id: svn://svn.berlios.de/openocd/trunk@2705 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* fix warningoharboe2009-09-141-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2704 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* More CortexA8 debug register definitions.mlu2009-09-131-0/+4
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2702 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Fix argument passing in cortex_a8_write_cp.mlu2009-09-131-2/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2701 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-123-26/+40
| | | | | | | | | | | | | | | Cleanup some the downloaded ARM target algorithm code: - Provide more complete disassembly of the DCC bulk write code - Make code blocks "static const", in case GCC doesn't - Fix some tabbing/layout issues - Make some arm7_9_common.h flags be "bool" not "int"; and compact the layout a bit (group most bools together) git-svn-id: svn://svn.berlios.de/openocd/trunk@2698 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* tap post reset event added. Allows omap3530 to send 100 runtest idle ↵oharboe2009-09-114-3/+39
| | | | | | tickle's after a TAP_RESET. git-svn-id: svn://svn.berlios.de/openocd/trunk@2696 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Nicolas Pitre <nico@cam.org> put feroceon target definition at the end so to ↵oharboe2009-09-111-86/+79
| | | | | | | | avoid a bunch of useless forward declarations. git-svn-id: svn://svn.berlios.de/openocd/trunk@2694 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Nicolas Pitre <nico@cam.org> Dragonite supportoharboe2009-09-114-20/+76
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2693 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* spelling mistakeoharboe2009-09-111-2/+2
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2692 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* do not use dynamically sized stack arrays, not compatible with embedded OS'soharboe2009-09-111-10/+24
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2691 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* registering a target event twice caused infinite loop. Same bug as in ↵oharboe2009-09-111-4/+9
| | | | | | jtag/core.c copy & pasted. git-svn-id: svn://svn.berlios.de/openocd/trunk@2690 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Alexei Babich <a.babich@rez.ru> cleanupoharboe2009-09-112-7/+28
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2688 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Nicolas Pitre <nico@cam.org> tighten error checking in bulk_writeoharboe2009-09-111-4/+15
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2687 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Alexei Babich <a.babich@rez.ru> imx31 nand flash controller supportoharboe2009-09-104-2/+1004
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2685 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Alexei Babich <a.babich@rez.ru> fix problems with unecessary tailend byte ↵oharboe2009-09-101-0/+12
| | | | | | accesses. Use 16 bit access on tailend of a memory read if possible. git-svn-id: svn://svn.berlios.de/openocd/trunk@2684 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Rolf Meeser <rolfm_9dq@yahoo.de> oharboe2009-09-092-6/+44
| | | | | | | This patch adds target algorithm support for those flash devices that do not support DQ5 polling. So far they could only be programmed with host algorithm, but this was way too slow. git-svn-id: svn://svn.berlios.de/openocd/trunk@2682 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* - Fix bug-in-waiting when adding more than one TAP event typeoharboe2009-09-091-4/+10
| | | | | | | - Infinite loop bugfix when running tap configure a second time git-svn-id: svn://svn.berlios.de/openocd/trunk@2681 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-095-8/+27
| | | | | | | | | | | | | | | | | Optionally shave time off the armv4_5 run_algorithm() code: let them terminate using software breakpoints, avoiding roundtrips to manage hardware ones. Enable this by using BKPT to terminate execution instead of "branch to here" loops. Then pass zero as the exit address, except when running on an ARMv4 core. ARM7TDMI, ARM9TDMI, and derived cores now set a flag saying they're ARMv4. Use that mechanism in arm_nandwrite(), for about 3% speedup on a DaVinci ARM926 core; not huge, but it helps. Some other algorithms could use this too (mostly flavors of flash operation). git-svn-id: svn://svn.berlios.de/openocd/trunk@2680 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Report correct core instruction state for ARMv/A targetsmlu2009-09-081-1/+1
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2678 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.mlu2009-09-081-2/+7
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2677 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-081-0/+86
| | | | | | | | Provide an "armv7a disassemble" command. Current omissions include VFP (except as coprocessor instructions), Neon, and various Thumb2 opcodes that are not available in ARMv7-M processors. git-svn-id: svn://svn.berlios.de/openocd/trunk@2676 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* David Brownell <david-b@pacbell.net> oharboe2009-09-081-35/+137
| | | | | | | | | | | | | | | | | | | | | lean up some loose ends with the ARM disassembler - Add a header comment describing its current state and uses and referencing the now-generally-available V7 arch spec - Support some mode switch instructions: * Thumb to Jazelle (BXJ) * Thumb to ThumbEE (ENTERX) * ThumbEE to Thumb (LEAVEX) - Improve that recent warning fix (and associated whitespace goof) - Declare the rest of the internal code and data "static". A compiler may use this, and it helps clarify the scope of these routines (e.g. what changes to them could affect). git-svn-id: svn://svn.berlios.de/openocd/trunk@2675 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Improved handling of instruction set state, helps for debugging Thumb state.mlu2009-09-071-7/+5
| | | | git-svn-id: svn://svn.berlios.de/openocd/trunk@2674 b42882b7-edfa-0310-969c-e2dbd0fdcd60
* Mahr, Stefan <Stefan.Mahr@sphairon.com> removes the endianness swapping in ↵oharboe2009-09-041-44/+0
| | | | | | mips_m4k.c Swapping is already done in target.c git-svn-id: svn://svn.berlios.de/openocd/trunk@2673 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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