| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
| |
These don't need to use the on-board debuggers in JTAG mode.
Off-board is OK, as would be SWD mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
| |
|
|
|
|
| |
nice board to play with.
|
|
|
|
|
|
|
| |
Tests should that it needs to be as low as 100kHz to be
stable.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
| |
|
| |
|
|
|
|
|
|
| |
crank up JTAG speed as soon as clocks are set up.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
| |
The ability to set up the OSCDIV divider was missing.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
|
|
|
|
|
|
|
|
| |
Clear the enable bits for all clocks that are not set explicitly.
This is done to increase robustness by removing pre-existing
state.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
|
|
|
|
|
|
|
| |
The PLL pre- and postdividers seem to have enable bits, although
these are not mentioned in the chip documentation.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
|
|
|
|
|
|
|
|
| |
ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
|
| |
The strange thing here with this board is that 16MHz kinda
works, but only 2MHz is really stable.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
| |
clutters config scripts.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch adds support for the omapl138 target and preliminary support for the da850evm. The
target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file.
I have performed limited testing with this setup. I am posting this patch in the interest of
sharing cfg files and in the hopes that the experts on this list can correct errors I have made or
point out enhancements.
The testing I have performed is debugging uboot with gdb where I also use the following local.cfg
and gdbinit files. Debugging appears to work in so much as 'ni' works.
local.cfg:
gdb_memory_map disable
gdbinit:
target remote localhost:3333
set remote hardware-breakpoint-limit 2
set remote hardware-watchpoint-limit 2
monitor poll on
Comments welcome.
Best Regards,
Ben Gardiner
|
|
|
|
|
|
|
| |
Clarify that ICDI is the generic logic, but this config is
for the JTAG-only (no-SWD) mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
|
|
|
|
| |
rclk = 4MHz oon lpc1768, the correct JTAG clk is 666MHz(4MHz/6).
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
| |
This is a standard FT2232 device. More info at their web page:
http://shop.ngxtechnologies.com/product_info.php?cPath=26&products_id=30
|
|
|
|
|
|
|
|
|
| |
srst_pulls_trst is only true on some (broken) LPC2148 boards, a fact
which is already documented in doc/openocd.texi, so it shouldn't be
set unconditionally in the target tcl.
This patch was needed to reflash when an Abort exception occured very
early after reset, before OpenOCD tried to halt the CPU.
|
|
|
|
|
|
|
| |
set user mode to avoid ROM being mapped at address
0 rather than flash.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
| |
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
|
|
|
|
| |
This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this driver, although
it is supported by the peripheral.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
|
|
|
| |
- Only enable the FMI (NAND) and DMA clocks.
- Select NAND interface on the MFSEL.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
|
|
|
| |
There's no point in an lm3s811-specific target file,
so remove it in favor of the generic "stellaris.cfg".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
|
|
|
|
| |
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
| |
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
| |
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
|
| |
Signs of life: reset(kinda), halt, resume and memory
display/modify.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
|
|
| |
Added a function 'pll_v03_setup' to set up PLLs and clock
dividers on DM365 and DM368.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
|
|
|
| |
Here is a patch to fix a startup in C100 (arm1136). Basically make sure
that UART is configured before using it.
Michal
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
| |
make use of the new virtual bank flash driver.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
| |
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
|
|
| |
config scripts
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
| |
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
| |
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
|
|
| |
"flash bank" parameter should be 4000 (not 12000)
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
It might be possible to get this target going without
RCLK, but it would require more careful analysis and
usage of the reset events.
Enable fast memory accesses.
Tested on an at91sam9260 custom board w/external DRAM
and flash.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
|
|
|
| |
- As this is a complete unit, including jtag we might as welli nclude
the jtag cfg.
- Add missing id for the str750 that is also in the jtag chain.
- Reduce jtag startup speed to 500kHz.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
|
|
|
| |
Register name fix; ref. TI document sprueh7d
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
I was finally able to figure out the cause of this problem. There are two
parts to the patch. The first patch modifies the configuration file I
originally generated for the Atmel AT91SAM9G20 board and achieves the
following:
+++ Splits the reset-init handler into a reset-start handler for some of the
initial configuration activities and keeps the remainder in the reset-init
handler as was the case before. This was the real issue that was causing
the timing problems I identified before. This solution was confirmed with
an o-scope on actual target hardware.
+++ Adds a new instruction in the reset-start handler to disable fast memory
accesses in the reset-start handler. When the target jtag clock is started
out at 2 kHz during system clock initialization, memory writes (i.e.
register write to enable external reset pin -- basically to RSTC_MR) are
naturally slow and cause GDB keep-alive issues (refer to PATCH 2/2 for
additional fixes).
+++ Modifies the configuration file to use srst_only reset action. The
reset-start/reset-init handler split also now allows the correct behavior to
be used in the configuration file (previously had to use both SRST and TRST
even though only SRST is actually used and connected on the evaluation
board).
+++ Adds external NandFlash configuration support to take advantage of flash
driver added earlier. Doesn't fix any bugs but adds functionality that was
marked as TBD before and thrown in when I did other work on the
configuration file.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
| |
Let other boards do other things with srst and trst.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
| |
As the flash bank name is now unique update the scripts to suit.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
|
|
|
| |
gdb-attach does a reset init to make sure that the CFI probe
will succeed upon first gdb connect.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
|
|
| |
Increase working area for stm3210e_eval.cfg.
Add new configs for the following boards:
STM321000B-EVAL, STM32100C-EVAL, STM32100B-EVAL
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|
|
|
|
|
|
|
| |
The ecosflash driver is no longer used by any of the config
scripts. It is more useful to get more testing of CFI.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
| |
This patch adds support for the Voipac PXA270 module. Including NOR flash.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
|
|
|
|
|
|
|
| |
This patch adds definition file for the Voipac VPACLink JTAG adaptor. The
adaptor is combined JTAG/UART device.
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
|
|
|
|
| |
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
|
|
|
|
|
|
|
| |
Some tcl script has underline between the words "flash bank"
resulting in 'invalid command name "flash_bank"'.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
While "flash bank" syntax has been changed long ago,
several tcl script are still not fully update.
Fix following cases related with "cfi" driver:
- syntax error: the mandatory <name> parameter is missing
- warning: the <target> parameter is a number, instead of
the target name
- the comment line above the command does not report
actual syntax
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
|
|
|
|
|
|
|
| |
Add PARPORTADDR tcl variable making it easier to
change parallel port address in scripts.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
|