| Commit message (Collapse) | Author | Age | Files | Lines |
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Add flash algorithm support for the PIC32MX.
Still a few things todo but this dramatically decreases
the programing time, eg. approx programming for 2.5k test file.
- without fastload: 60secs
- with fastload: 45secs
- with fastload and algorithm: 2secs.
Add new devices to supported list.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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Talk more about "debug adapters" instead of only "dongles". Not all
adapters are discrete widgets; some are integrated onto boards. If
we only talk about "dongles" we rule out many valid setups, and help
confuse some users (who may be using Dongle-free environments).
Also start bringing out the point that JTAG isn't the only transport
protocol, even though OpenOCD historically presumes "all is JTAG".
(Not all debug adapters are JTAG adapters, or JTAG-only adapters.)
Plus a few minor fixes (spelling etc) in the vicinity of those changes,
and updates about FT2232H clocking issues (they can go faster than the
older chips, and can support adaptive clocking).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Fix some issues with the generic LPC1768 config file:
- Handle the post-reset clock config: 4 MHz internal RC, no PLL.
This affects flash and JTAG clocking.
- Remove JTAG adapter config; they don't all support trst_and_srst
- Remove the rest of the bogus "reset-init" event handler.
- Allow explicit CCLK configuration, instead of assuming 12 MHz;
some boards will use 100 Mhz (or the post-reset 4 MHz).
- Simplify: rely on defaults for endianness and IR-Capture value
- Update some comments too
Build on those fixes to make a trivial config for the IAR LPC1768
kickstart board (by Olimex) start working.
Also, add doxygen to the lpc2000 flash driver, primarily to note a
configuration problem with driver: it wrongly assumes the core clock
rate never changes. Configs that are safe for updating flash after
"reset halt" will thus often be unsafe later ... e.g. for LPC1768,
after switching to use PLL0 at 100 MHz.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The Redbee USB is a small form-factor usb stick from Redwire, LLC
(www.redwirellc.com/store), built around a Freescale MC13224V
ARM7TDMI + 802.15.4 radio (plus antenna).
It includes an FT2232H for debugging, with Channel B connected to the
mc13224v's JTAG interface (unusual) and Channel A connected to UART1.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The Redbee Econotag is an open hardware development kit from
Redwire, LLC (www.redwirellc.com/store), for the Freescale
MC13224V ARM7TDMI + 802.15.4 radio.
It includes both an MC13224V and an FT2232H (for JTAG and UART
support). It has flexible power supply options.
Additional features are:
- inverted-F pcb antenna
- 36 GPIO brought out to 0.1" pin header
(includes all peripheral pins)
- Reset button
- Two push buttons (on kbi1-5 and kbi0-4)
- USB-A connector, powered from USB
- up to 16V external input
- pads for optional buck inductor
- pads for optional 32.768kHz crystal
- 2x LEDS on TX_ON and RX_ON
[ dbrownell@users.sourceforge.net: shrink lines; texi ]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The MC13224V is a FreeScale ARM7TDMI based IEEE802.15.4 platform for
Zigbee and similar low-power wireless applications. Using PIP
(Platform In Package) technology, it integrates: an RF balun and
matching network; a buck converter (only an external inductor is
necessary); 96KB of SRAM; and 128KB of non-volatile memory.
It has an integrated bootloader and can boot from a variety of sources:
external SPI or I2C non-volatile memory, an image loaded over UART1,
or the internal non-volatile memory. The image loaded from one of these
sources is executed directly from SRAM starting at location 0x00400000.
Open source development code at http://mc1322x.devl.org
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Get rid of new nasty warning:
NOTE! Severe performance degradation without fast memory access enabled...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Cortex-M targets don't support ARM instructions.
Leave the NVIC.VTOR setup alone, but comment how the whole
routine looks like one big bug...
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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JTAG.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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- update str73x mem regions to correct values.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Moved board specific settings from target/at91r40008.cfg to a new
file board/ethernut3.cfg.
Set correct CPUTAPID. Reset delay increased, see MIC2775 data sheet.
Increased work area size from 16k to 128k.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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For STR7x flash, the device cannot be queried for the protect status.
The solution is to remove the protection on reset init. The driver
also initialises the sector protect field to unprotected.
[dbrownell@users.sourceforge.net: line length shrinkage]
Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The default state of the STR7 flash after a reset init is unlocked.
The information in the flash driver now reflects this.
The information about the lock status cannot be read from the
flash chip, so the user is informed that flash info might not
contain accurate information.
[dbrownell@users.sourceforge.net: line length shrinkage]
Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Changed the parport address to LPT1, since it's the most obvious default value.
Signed-off-by: Edgar Grimberg <edgar.grimberg@zylin.com>
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Don't give the same names to both flash chips on two OMAP boards.
For OSK, enable DCC downloads (removing a warning).
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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openocd does not start with the target configfile due to the case in the
dependent config file.
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Added interface config file for JTAG/RS232 debug board originally
integrated to Neo 1973 and Neo FreeRunner phones.
Adapter was tested with i.MX31, S3C2410 and AT91SAM9260 processors.
Signed-off-by: Vladimir Zapolskiy <vzapolskiy@gmail.com>
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The "parport_port" commands generally don't *require* a port_number;
they're of the "apply any parameter, then print result" variety. Update
the User's Guide accordingly.
Some of those commands are intended to be write-once: parport_port,
and parport_cable. Say so.
Use proper EBNF for the parport_write_on_exit parameter.
Parport address 0xc8b8 is evidently mutant. Say so in the "parport.cfg"
file, to avoid breaking anyone with that mutant config. But update the
User's Guide to include a sane example for the LP2 port.
Finally document the "presto_serial" command.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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add reset-init script to allow ram execution from reset, this is required for ejtag fastdata access.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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The relevant cable config is already in OpenOCD, but not a config for
the JTAG adapter. I have tested with FlashLINK on ARM926.
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
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Most of this patch updates documentation and comments for various
Luminary boards, supporting two bug fixes by helping to make sense
of the current mess:
- Recent rev C lm3s811 eval boards didn't work. They must use
the ICDI layout, which sets up some signals that the older
boards didn't need. This is actually safe and appropriate
for *all* recent boards ... so just make "luminary.cfg" use
the ICDI layout.
- "luminary-lm3s811.cfg", was previously unusable! No VID/PID;
and the wrong vendor string. Make it work, but reserve it
for older boards where the ICDI layout is wrong.
- Default the LM3748 eval board to "luminary.cfg", like the
other boards. If someone uses an external JTAG adapter, all
boards will use the same workaround (override that default).
The difference between the two FT2232 layouts is that eventually
the EVB layout will fail cleanly when asked to enable SWO trace,
but the ICDI layout will as cleanly be able to enable it. Folk
using "luminary.cfg" with Rev B boards won't see anything going
wrong until SWO support is (someday) added.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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This config is only lightly tested, and doesn't work well yet;
but it's a start.
* Notably missing is PLL configuration, since each DaVinci
does that just a bit differently; and thus DDR2 setup.
* The SRST workaround needed for the goof in the CPLD's VHDL
depends on at least the not-yet-merged patch letting ARM9
(and ARM7) chips perform resets that don't use SRST.
So this isn't yet suitable for debugging U-Boot.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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The 10-pin JTAG layout used with these adapters is used by
a variety of platforms including AVR.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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This updates the board configuration for the SAM9-L9260 board with the
configuration for the on-board NAND and dataflash. Included are commands
for configuring the AT91SAM9 NAND flash driver.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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We already have tcl/interface/olimex-jtag-tiny.cfg and
don't need a clone of it.
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Remove more remnants of the old "jtag_device" syntax.
Don't [format "%s.cpu" $_CHIPNAME] ... it's needless complexity.
Remove various non-supported "-variant" target options; they're not
needed often at all.
Flag some of the board files as needing to have and use target files
for the TAP and target declarations.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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That syntax has been obsolete forever and is now gone; remove a few
remaining references. Shows how seldom this stuff gets used.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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reset init/run now works again.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Use the new file, and remove the old target/lm3s3748.cfg one.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Common target.cfg file for LM3S CPU family
[dbrownell@users.sourceforge.net: rename, generalize more]
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Behave like OMAP3530: force global software reset. Given the
patch to teach ARM11 how to use these events, and use VCR to
catch the reset vector, this works better than either the
current reset logic or than using SRST.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Make them match the C code.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Also updated to use target name when creating flash
and set jtag_khz to 16000.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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[dbrownell@users.sourceforge.net; remove pxa255 comment]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Replaces previous "reset-assert-pre" workaround.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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the first arg is the register number 15 = cp15.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
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Based on email from "Martin Kaul <martin.kaul@leuze.de>".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Add $_FLASHNAME variable to update 'nand device' command syntax.
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Sets $_FLASHNAME to "$_CHIPNAME.flash" and passes it as the
first argument to 'flash bank'.
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Rename the "armv4_5" command prefix to straight "arm" so it makes
more sense for newer cores. Add a simple compatibility script.
Make sure all the commands give the same "not an ARM" diagnostic
message (and fail properly) when called against non-ARM targets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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Kick in ETM (and ETB) support for ARM11. Tested on OMAP 2420,
so update that configuration. (That's an ARM1136ejs, ETB,
OpenGL ES1.1, C55x DSP, etc.)
Also update the other ARM11 ETM + ETB targets in the tree
to set up these modules. (Not tested.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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ARM9 cores with an ETB will have a matching ETM.
Hook them both up by default.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
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