diff options
author | Trygve Laugstøl <trygvis@inamo.no> | 2013-02-20 23:08:08 +0100 |
---|---|---|
committer | Trygve Laugstøl <trygvis@inamo.no> | 2013-02-20 23:08:08 +0100 |
commit | c29959818ed3e65fa6d7ed3da91e73b79719cf25 (patch) | |
tree | 6f26e78d0919015a968ab0e194deb9276b6b13d8 | |
parent | ee6e3ba807ce4d93988eb83b29b9af22e25fd0b4 (diff) | |
download | rom-emulator-c29959818ed3e65fa6d7ed3da91e73b79719cf25.tar.gz rom-emulator-c29959818ed3e65fa6d7ed3da91e73b79719cf25.tar.bz2 rom-emulator-c29959818ed3e65fa6d7ed3da91e73b79719cf25.tar.xz rom-emulator-c29959818ed3e65fa6d7ed3da91e73b79719cf25.zip |
o wip.
-rw-r--r-- | hardware-v1/eagle.epf | 352 | ||||
-rw-r--r-- | hardware-v2/.gitignore | 4 | ||||
-rw-r--r-- | hardware-v2/ram-ice.brd | 2353 | ||||
-rw-r--r-- | hardware-v2/ram-ice.rep | 230 | ||||
-rw-r--r-- | hardware-v2/ram-ice.sch | 5460 | ||||
-rw-r--r-- | hardware/ram-ice.brd | 1283 | ||||
-rw-r--r-- | hardware/ram-ice.sch | 908 | ||||
-rw-r--r-- | vhdl/ram-ice.xise | 16 |
8 files changed, 9233 insertions, 1373 deletions
diff --git a/hardware-v1/eagle.epf b/hardware-v1/eagle.epf deleted file mode 100644 index ff48142..0000000 --- a/hardware-v1/eagle.epf +++ /dev/null @@ -1,352 +0,0 @@ -[Eagle] -Version="06 04 00" -Platform="Linux" -Serial="62191E841E-LSR-WLM-1EL" -Globals="Globals" -Desktop="Desktop" - -[Globals] -AutoSaveProject=1 -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/19inch.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/40xx.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/41xx.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/45xx.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/74ac-logic.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/74ttl-din.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/74xx-eu.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/74xx-little-de.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/74xx-little-us.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/74xx-us.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/751xx.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/advanced-test-technologies.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/agilent-technologies.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/allegro.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/altera-cyclone-II.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/altera-cyclone-III.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/altera-stratix-iv.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/altera.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/am29-memory.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/amd-mach.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/amd.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/amis.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/analog-devices.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/ase.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/atmel.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/austriamicrosystems.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/avago.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/axis.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/battery.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/belton-engineering.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/burr-brown.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/busbar.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/buzzer.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/c-trimm.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/california-micro-devices.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/capacitor-wima.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/chipcard-siemens.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/cirrus-logic.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-3m.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-4ucon.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-amp-champ.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-amp-micromatch.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-amp-mt.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-amp-mt6.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-amp-quick.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-amp-te.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-amp.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-amphenol.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-avx.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-berg.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-bosch.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-chipcard-iso7816.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-coax.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-commcon.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-conrad.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-cpci.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-cui.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-cypressindustries.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-deutsch.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-dil.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-ebyelectro.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-elco.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-erni.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-faston.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-fci.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-friwo.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-garry.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-harting-h.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-harting-ml.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-harting-v.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-harting.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-hirose.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-hirschmann.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-jack.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-jae.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-jst.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-kycon.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-kyocera-elco.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-lemo.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-leotronics.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-lsta.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-lstb.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-lumberg.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-ml.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-molex.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-neutrik_ag.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-omron.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-panasonic.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-panduit.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-pc.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-pc104.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-phoenix-254.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-phoenix-3.81.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-phoenix-350.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-phoenix-500.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-phoenix-508.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-phoenix-762.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-phoenix-me_max.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-phoenix-mkds_5.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-phoenix-smkdsp.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-ptr500.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-pulse.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-rib.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-samtec.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-shallin.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-shiua-chyuan.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-stewart.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-stocko.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-subd.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-sullinselectronics.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-thomas-betts.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-tyco.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-tycoelectronics.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-vg.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-wago-500.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-wago-508.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-wago.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-wago255.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-weidmueller-sl35.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-wenzhou-yihua.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-xmultiple.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/con-yamaichi.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/crystal.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/csr.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/cypress.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/davicom.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/dc-dc-converter.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/dimensions.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/diode.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/discrete.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/display-hp.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/display-kingbright.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/display-lcd.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/docu-dummy.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/eagle-ltspice.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/ecl.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/em-microelectronic.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/etx-board.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/exar.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/fairchild-semic.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/farnell.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/fiber-optic-hp.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/fiber-optic-siemens.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/fifo.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/flexipanel.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/fox-electronics.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/frames.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/freescale.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/ftdichip.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/fujitsu.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/fuse.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/gennum.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/halo-electronics.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/heatsink.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/holes.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/holtek.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/ic-package.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/inductor-coilcraft.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/inductor-neosid.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/inductor-nkl.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/inductors.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/infineon-tricore.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/infineon.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/intersil-techwell.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/intersil.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/ir.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/isd.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/johanson-technology.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/jump-0r-smd.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/jumper.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/lantronix.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/lattice.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/lc-filter.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/led-7-segment.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/led-citizen-electronics.lbr" -UsedLibrary="/home/trygvis/opt/eagle/eagle-6.4.0/lbr/led-lumiled.lbr" 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+<author>Created by librarian@cadsoft.de</author><p> +<p> +for Electrolyt Capacitors see also :<p> +www.bccomponents.com <p> +www.panasonic.com<p> +www.kemet.com<p> +<p> +for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p> + +<map name="nav_main"> +<area shape="rect" coords="0,1,140,23" href="../military_specs.asp" title=""> +<area shape="rect" coords="0,24,140,51" href="../about.asp" title=""> +<area shape="rect" coords="1,52,140,77" href="../rfq.asp" title=""> +<area shape="rect" coords="0,78,139,103" href="../products.asp" title=""> +<area shape="rect" coords="1,102,138,128" href="../excess_inventory.asp" title=""> +<area shape="rect" coords="1,129,138,150" href="../edge.asp" title=""> +<area shape="rect" coords="1,151,139,178" href="../industry_links.asp" title=""> +<area shape="rect" coords="0,179,139,201" href="../comments.asp" title=""> +<area shape="rect" coords="1,203,138,231" href="../directory.asp" title=""> +<area shape="default" nohref> +</map> + +<html> + +<title></title> + + <LINK REL="StyleSheet" TYPE="text/css" HREF="style-sheet.css"> + +<body bgcolor="#ffffff" text="#000000" marginwidth="0" marginheight="0" topmargin="0" leftmargin="0"> +<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0 height="55%"> +<tr valign="top"> + +</td> +<! <td width="10">&nbsp;</td> +<td width="90%"> + +<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b> +<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2> + <TR> + <TD COLSPAN=8> + <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI&nbsp;TECH</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT> + </B> + </TD><TD>&nbsp;</TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 > + 3005P<BR> + 3006P<BR> + 3006W<BR> + 3006Y<BR> + 3009P<BR> + 3009W<BR> + 3009Y<BR> + 3057J<BR> + 3057L<BR> + 3057P<BR> + 3057Y<BR> + 3059J<BR> + 3059L<BR> + 3059P<BR> + 3059Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 89P<BR> + 89W<BR> + 89X<BR> + 89PH<BR> + 76P<BR> + 89XH<BR> + 78SLT<BR> + 78L&nbsp;ALT<BR> + 56P&nbsp;ALT<BR> + 78P&nbsp;ALT<BR> + T8S<BR> + 78L<BR> + 56P<BR> + 78P<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + T18/784<BR> + 783<BR> + 781<BR> + -<BR> + -<BR> + -<BR> + 2199<BR> + 1697/1897<BR> + 1680/1880<BR> + 2187<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 8035EKP/CT20/RJ-20P<BR> + -<BR> + RJ-20X<BR> + -<BR> + -<BR> + -<BR> + 1211L<BR> + 8012EKQ&nbsp;ALT<BR> + 8012EKR&nbsp;ALT<BR> + 1211P<BR> + 8012EKJ<BR> + 8012EKL<BR> + 8012EKQ<BR> + 8012EKR<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 2101P<BR> + 2101W<BR> + 2101Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 2102L<BR> + 2102S<BR> + 2102Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVMCOG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 43P<BR> + 43W<BR> + 43Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 40L<BR> + 40P<BR> + 40Y<BR> + 70Y-T602<BR> + 70L<BR> + 70P<BR> + 70Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + RT/RTR12<BR> + RT/RTR12<BR> + RT/RTR12<BR> + -<BR> + RJ/RJR12<BR> + RJ/RJR12<BR> + RJ/RJR12<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 67P<BR> + 67W<BR> + 67X<BR> + 67Y<BR> + 67Z<BR> + 68P<BR> + 68W<BR> + 68X<BR> + 67Y&nbsp;ALT<BR> + 67Z&nbsp;ALT<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 5050<BR> + 5091<BR> + 5080<BR> + 5087<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + T63YB<BR> + T63XB<BR> + -<BR> + -<BR> + -<BR> + 5887<BR> + 5891<BR> + 5880<BR> + -<BR> + -<BR> + -<BR> + T93Z<BR> + T93YA<BR> + T93XA<BR> + T93YB<BR> + T93XB<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 8026EKP<BR> + 8026EKW<BR> + 8026EKM<BR> + 8026EKP<BR> + 8026EKB<BR> + 8026EKM<BR> + 1309X<BR> + 1309P<BR> + 1309W<BR> + 8024EKP<BR> + 8024EKW<BR> + 8024EKN<BR> + RJ-9P/CT9P<BR> + RJ-9W<BR> + RJ-9X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 64Y<BR> + 64Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> + -<BR> + 91E<BR> + 91X<BR> + 91T<BR> + 91B<BR> + 91A<BR> + 91V<BR> + 91W<BR> + 25W<BR> + 25V<BR> + 25P<BR> + -<BR> + 25S<BR> + 25U<BR> + 25RX<BR> + 25X<BR> + 72XW<BR> + 72XL<BR> + 72PM<BR> + 72RX<BR> + -<BR> + 72PX<BR> + 72P<BR> + 72RXW<BR> + 72RXL<BR> + 72X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + T7YB<BR> + T7YA<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + TXD<BR> + TYA<BR> + TYP<BR> + -<BR> + TYD<BR> + TX<BR> + -<BR> + 150SX<BR> + 100SX<BR> + 102T<BR> + 101S<BR> + 190T<BR> + 150TX<BR> + 101<BR> + -<BR> + -<BR> + 101SX<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ET6P<BR> + ET6S<BR> + ET6X<BR> + RJ-6W/8014EMW<BR> + RJ-6P/8014EMP<BR> + RJ-6X/8014EMX<BR> + TM7W<BR> + TM7P<BR> + TM7X<BR> + -<BR> + 8017SMS<BR> + -<BR> + 8017SMB<BR> + 8017SMA<BR> + -<BR> + -<BR> + CT-6W<BR> + CT-6H<BR> + CT-6P<BR> + CT-6R<BR> + -<BR> + CT-6V<BR> + CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + -<BR> + 8038EKX<BR> + -<BR> + -<BR> + 8038EKP<BR> + 8038EKZ<BR> + 8038EKW<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 3321H<BR> + 3321P<BR> + 3321N<BR> + 1102H<BR> + 1102P<BR> + 1102T<BR> + RVA0911V304A<BR> + -<BR> + RVA0911H413A<BR> + RVG0707V100A<BR> + RVA0607V(H)306A<BR> + RVA1214H213A<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3104B<BR> + 3104C<BR> + 3104F<BR> + 3104H<BR> + -<BR> + 3104M<BR> + 3104P<BR> + 3104S<BR> + 3104W<BR> + 3104X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + EVMQ0G<BR> + EVMQIG<BR> + EVMQ3G<BR> + EVMS0G<BR> + EVMQ0G<BR> + EVMG0G<BR> + -<BR> + -<BR> + -<BR> + EVMK4GA00B<BR> + EVM30GA00B<BR> + EVMK0GA00B<BR> + EVM38GA00B<BR> + EVMB6<BR> + EVLQ0<BR> + -<BR> + EVMMSG<BR> + EVMMBG<BR> + EVMMAG<BR> + -<BR> + -<BR> + EVMMCS<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMM1<BR> + -<BR> + -<BR> + EVMM0<BR> + -<BR> + -<BR> + EVMM3<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 62-3-1<BR> + 62-1-2<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67R<BR> + -<BR> + 67P<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67X<BR> + 63V<BR> + 63S<BR> + 63M<BR> + -<BR> + -<BR> + 63H<BR> + 63P<BR> + -<BR> + -<BR> + 63X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P>&nbsp;<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3> + <TR> + <TD COLSPAN=7> + <FONT color="#0000FF" SIZE=4 FACE=ARIAL><B>SMD TRIM-POT CROSS REFERENCE</B></FONT> + <P> + <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3224G<BR> + 3224J<BR> + 3224W<BR> + 3269P<BR> + 3269W<BR> + 3269X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 44G<BR> + 44J<BR> + 44W<BR> + 84P<BR> + 84W<BR> + 84X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST63Z<BR> + ST63Y<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST5P<BR> + ST5W<BR> + ST5X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=7>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=7> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3314G<BR> + 3314J<BR> + 3364A/B<BR> + 3364C/D<BR> + 3364W/X<BR> + 3313G<BR> + 3313J<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 23B<BR> + 23A<BR> + 21X<BR> + 21W<BR> + -<BR> + 22B<BR> + 22A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST5YL/ST53YL<BR> + ST5YJ/5T53YJ<BR> + ST-23A<BR> + ST-22B<BR> + ST-22<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ST-4B<BR> + ST-4A<BR> + -<BR> + -<BR> + -<BR> + ST-3B<BR> + ST-3A<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVM-6YS<BR> + EVM-1E<BR> + EVM-1G<BR> + EVM-1D<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + G4B<BR> + G4A<BR> + TR04-3S1<BR> + TRG04-2S1<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + DVR-43A<BR> + CVR-42C<BR> + CVR-42A/C<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P> +<FONT SIZE=4 FACE=ARIAL><B>ALT =&nbsp;ALTERNATE</B></FONT> +<P> + +&nbsp; +<P> +</td> +</tr> +</table> +</BODY></HTML></description> +<packages> +<package name="C1206"> +<description><b>CAPACITOR</b><p> +chip</description> +<wire x1="-2.473" y1="0.983" x2="2.473" y2="0.983" width="0.0508" layer="39"/> +<wire x1="2.473" y1="-0.983" x2="-2.473" y2="-0.983" width="0.0508" layer="39"/> +<wire x1="-2.473" y1="-0.983" x2="-2.473" y2="0.983" width="0.0508" layer="39"/> +<wire x1="2.473" y1="0.983" x2="2.473" y2="-0.983" width="0.0508" layer="39"/> +<wire x1="-0.965" y1="0.787" x2="0.965" y2="0.787" width="0.1016" layer="51"/> +<wire x1="-0.965" y1="-0.787" x2="0.965" y2="-0.787" width="0.1016" layer="51"/> +<smd name="1" x="-1.4" y="0" dx="1.6" dy="1.8" layer="1"/> +<smd name="2" x="1.4" y="0" dx="1.6" dy="1.8" layer="1"/> +<text x="-1.27" y="1.143" size="1.27" layer="25">>NAME</text> +<text x="-1.27" y="-2.413" size="1.27" layer="27">>VALUE</text> +<rectangle x1="-1.7018" y1="-0.8509" x2="-0.9517" y2="0.8491" layer="51"/> +<rectangle x1="0.9517" y1="-0.8491" x2="1.7018" y2="0.8509" layer="51"/> +<rectangle x1="-0.1999" y1="-0.4001" x2="0.1999" y2="0.4001" layer="35"/> +</package> +</packages> +</library> +<library name="con-lstb"> +<description><b>Pin Headers</b><p> +Naming:<p> +MA = male<p> +# contacts - # rows<p> +W = angled<p> +<author>Created by librarian@cadsoft.de</author></description> +<packages> +<package name="MA06-1"> +<description><b>PIN HEADER</b></description> +<wire x1="-6.985" y1="1.27" x2="-5.715" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-5.715" y1="1.27" x2="-5.08" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-5.08" y1="-0.635" x2="-5.715" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-5.08" y1="0.635" x2="-4.445" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-4.445" y1="1.27" x2="-3.175" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-3.175" y1="1.27" x2="-2.54" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-2.54" y1="-0.635" x2="-3.175" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-3.175" y1="-1.27" x2="-4.445" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-4.445" y1="-1.27" x2="-5.08" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="-7.62" y1="0.635" x2="-7.62" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="-6.985" y1="1.27" x2="-7.62" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-7.62" y1="-0.635" x2="-6.985" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-5.715" y1="-1.27" x2="-6.985" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-2.54" y1="0.635" x2="-1.905" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-1.905" y1="1.27" x2="-0.635" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-0.635" y1="1.27" x2="0" y2="0.635" width="0.1524" layer="21"/> +<wire x1="0" y1="-0.635" x2="-0.635" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-0.635" y1="-1.27" x2="-1.905" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-1.905" y1="-1.27" x2="-2.54" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="0.635" y1="1.27" x2="1.905" y2="1.27" width="0.1524" layer="21"/> +<wire x1="1.905" y1="1.27" x2="2.54" y2="0.635" width="0.1524" layer="21"/> +<wire x1="2.54" y1="-0.635" x2="1.905" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="2.54" y1="0.635" x2="3.175" y2="1.27" width="0.1524" layer="21"/> +<wire x1="3.175" y1="1.27" x2="4.445" y2="1.27" width="0.1524" layer="21"/> +<wire x1="4.445" y1="1.27" x2="5.08" y2="0.635" width="0.1524" layer="21"/> +<wire x1="5.08" y1="-0.635" x2="4.445" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="4.445" y1="-1.27" x2="3.175" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="3.175" y1="-1.27" x2="2.54" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="0.635" y1="1.27" x2="0" y2="0.635" width="0.1524" layer="21"/> +<wire x1="0" y1="-0.635" x2="0.635" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="1.905" y1="-1.27" x2="0.635" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="5.08" y1="0.635" x2="5.715" y2="1.27" width="0.1524" layer="21"/> +<wire x1="5.715" y1="1.27" x2="6.985" y2="1.27" width="0.1524" layer="21"/> +<wire x1="6.985" y1="1.27" x2="7.62" y2="0.635" width="0.1524" layer="21"/> +<wire x1="7.62" y1="-0.635" x2="6.985" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="6.985" y1="-1.27" x2="5.715" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="5.715" y1="-1.27" x2="5.08" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="7.62" y1="0.635" x2="7.62" y2="-0.635" width="0.1524" layer="21"/> +<pad name="1" x="-6.35" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="2" x="-3.81" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="3" x="-1.27" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="4" x="1.27" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="5" x="3.81" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="6" x="6.35" y="0" drill="1.016" shape="long" rot="R90"/> +<text x="-7.62" y="1.651" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="-6.985" y="-2.921" size="1.27" layer="21" ratio="10">1</text> +<text x="5.715" y="1.651" size="1.27" layer="21" ratio="10">6</text> +<text x="-2.54" y="-2.921" size="1.27" layer="27" ratio="10">>VALUE</text> +<rectangle x1="-4.064" y1="-0.254" x2="-3.556" y2="0.254" layer="51"/> +<rectangle x1="-6.604" y1="-0.254" x2="-6.096" y2="0.254" layer="51"/> +<rectangle x1="-1.524" y1="-0.254" x2="-1.016" y2="0.254" layer="51"/> +<rectangle x1="3.556" y1="-0.254" x2="4.064" y2="0.254" layer="51"/> +<rectangle x1="1.016" y1="-0.254" x2="1.524" y2="0.254" layer="51"/> +<rectangle x1="6.096" y1="-0.254" x2="6.604" y2="0.254" layer="51"/> +</package> +</packages> +</library> +</libraries> +<attributes> +</attributes> +<variantdefs> +</variantdefs> +<classes> +<class number="0" name="default" width="0" drill="0"> +</class> +</classes> +<designrules name="default"> +<description language="en"><b>EAGLE Design Rules</b> +<p> +The default Design Rules have been set to cover +a wide range of applications. Your particular design +may have different requirements, so please make the +necessary adjustments and save your customized +design rules under a new name. +</description> +<param name="layerSetup" value="(1*16)"/> +<param name="mtCopper" value="0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm"/> +<param name="mtIsolate" value="1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm"/> +<param name="mdWireWire" value="8mil"/> +<param name="mdWirePad" value="8mil"/> +<param name="mdWireVia" value="8mil"/> +<param name="mdPadPad" value="8mil"/> +<param name="mdPadVia" value="8mil"/> +<param name="mdViaVia" value="8mil"/> +<param name="mdSmdPad" value="8mil"/> +<param name="mdSmdVia" value="8mil"/> +<param name="mdSmdSmd" value="8mil"/> +<param name="mdViaViaSameLayer" value="8mil"/> +<param name="mnLayersViaInSmd" value="2"/> +<param name="mdCopperDimension" value="40mil"/> +<param name="mdDrill" value="8mil"/> +<param name="mdSmdStop" value="0mil"/> +<param name="msWidth" value="10mil"/> +<param name="msDrill" value="0.6mm"/> +<param name="msMicroVia" value="9.99mm"/> +<param name="msBlindViaRatio" value="0.5"/> +<param name="rvPadTop" value="0.25"/> +<param name="rvPadInner" value="0.25"/> +<param name="rvPadBottom" value="0.25"/> +<param name="rvViaOuter" value="0.25"/> +<param name="rvViaInner" value="0.25"/> +<param name="rvMicroViaOuter" value="0.25"/> +<param name="rvMicroViaInner" value="0.25"/> +<param name="rlMinPadTop" value="10mil"/> +<param name="rlMaxPadTop" value="20mil"/> +<param name="rlMinPadInner" value="10mil"/> +<param name="rlMaxPadInner" value="20mil"/> +<param name="rlMinPadBottom" value="10mil"/> +<param name="rlMaxPadBottom" value="20mil"/> +<param name="rlMinViaOuter" value="8mil"/> +<param name="rlMaxViaOuter" value="20mil"/> +<param name="rlMinViaInner" value="8mil"/> +<param name="rlMaxViaInner" value="20mil"/> +<param name="rlMinMicroViaOuter" value="4mil"/> +<param name="rlMaxMicroViaOuter" value="20mil"/> +<param name="rlMinMicroViaInner" value="4mil"/> +<param name="rlMaxMicroViaInner" value="20mil"/> +<param name="psTop" value="-1"/> +<param name="psBottom" value="-1"/> +<param name="psFirst" value="-1"/> +<param name="psElongationLong" value="100"/> +<param name="psElongationOffset" value="100"/> +<param name="mvStopFrame" value="1"/> +<param name="mvCreamFrame" value="0"/> +<param name="mlMinStopFrame" value="4mil"/> +<param name="mlMaxStopFrame" value="4mil"/> +<param name="mlMinCreamFrame" value="0mil"/> +<param name="mlMaxCreamFrame" value="0mil"/> +<param name="mlViaStopLimit" value="0mil"/> +<param name="srRoundness" value="0"/> +<param name="srMinRoundness" value="0mil"/> +<param name="srMaxRoundness" value="0mil"/> +<param name="slThermalIsolate" value="10mil"/> +<param name="slThermalsForVias" value="0"/> +<param name="dpMaxLengthDifference" value="10mm"/> +<param name="dpGapFactor" value="2.5"/> +<param name="checkGrid" value="0"/> +<param name="checkAngle" value="0"/> +<param name="checkFont" value="1"/> +<param name="checkRestrict" value="1"/> +<param name="useDiameter" value="13"/> +<param name="maxErrors" value="999999"/> +</designrules> +<autorouter> +<pass name="Default"> +<param name="RoutingGrid" value="50mil"/> +<param name="tpViaShape" value="round"/> +<param name="PrefDir.1" value="|"/> +<param name="PrefDir.2" value="0"/> +<param name="PrefDir.3" value="0"/> +<param name="PrefDir.4" value="0"/> +<param name="PrefDir.5" value="0"/> +<param name="PrefDir.6" value="0"/> +<param name="PrefDir.7" value="0"/> +<param name="PrefDir.8" value="0"/> +<param name="PrefDir.9" value="0"/> +<param name="PrefDir.10" value="0"/> +<param name="PrefDir.11" value="0"/> +<param name="PrefDir.12" value="0"/> +<param name="PrefDir.13" value="0"/> +<param name="PrefDir.14" value="0"/> +<param name="PrefDir.15" value="0"/> +<param name="PrefDir.16" value="-"/> +<param name="cfVia" value="8"/> +<param name="cfNonPref" value="5"/> +<param name="cfChangeDir" value="2"/> +<param name="cfOrthStep" value="2"/> +<param name="cfDiagStep" value="3"/> +<param name="cfExtdStep" value="0"/> +<param name="cfBonusStep" value="1"/> +<param name="cfMalusStep" value="1"/> +<param name="cfPadImpact" value="4"/> +<param name="cfSmdImpact" value="4"/> +<param name="cfBusImpact" value="0"/> +<param name="cfHugging" value="3"/> +<param name="cfAvoid" value="4"/> +<param name="cfPolygon" value="10"/> +<param name="cfBase.1" value="0"/> +<param name="cfBase.2" value="1"/> +<param name="cfBase.3" value="1"/> +<param name="cfBase.4" value="1"/> +<param name="cfBase.5" value="1"/> +<param name="cfBase.6" value="1"/> +<param name="cfBase.7" value="1"/> +<param name="cfBase.8" value="1"/> +<param name="cfBase.9" value="1"/> +<param name="cfBase.10" value="1"/> +<param name="cfBase.11" value="1"/> +<param name="cfBase.12" value="1"/> +<param name="cfBase.13" value="1"/> +<param name="cfBase.14" value="1"/> +<param name="cfBase.15" value="1"/> +<param name="cfBase.16" value="0"/> +<param name="mnVias" value="20"/> +<param name="mnSegments" value="9999"/> +<param name="mnExtdSteps" value="9999"/> +<param name="mnRipupLevel" value="10"/> +<param name="mnRipupSteps" value="100"/> +<param name="mnRipupTotal" value="100"/> +</pass> +<pass name="Follow-me" refer="Default" active="yes"> +</pass> +<pass name="Busses" refer="Default" active="yes"> +<param name="cfNonPref" value="4"/> +<param name="cfBusImpact" value="4"/> +<param name="cfHugging" value="0"/> +<param name="mnVias" value="0"/> +</pass> +<pass name="Route" refer="Default" active="yes"> +</pass> +<pass name="Optimize1" refer="Default" active="yes"> +<param name="cfVia" value="99"/> +<param name="cfExtdStep" value="10"/> +<param name="cfHugging" value="1"/> +<param name="mnExtdSteps" value="1"/> +<param name="mnRipupLevel" value="0"/> +</pass> +<pass name="Optimize2" refer="Optimize1" active="yes"> +<param name="cfNonPref" value="0"/> +<param name="cfChangeDir" value="6"/> +<param name="cfExtdStep" value="0"/> +<param name="cfBonusStep" value="2"/> +<param name="cfMalusStep" value="2"/> +<param name="cfPadImpact" value="2"/> +<param name="cfSmdImpact" value="2"/> +<param name="cfHugging" value="0"/> +</pass> +<pass name="Optimize3" refer="Optimize2" active="yes"> +<param name="cfChangeDir" value="8"/> +<param name="cfPadImpact" value="0"/> +<param name="cfSmdImpact" value="0"/> +</pass> +<pass name="Optimize4" refer="Optimize3" active="yes"> +<param name="cfChangeDir" value="25"/> +</pass> +</autorouter> +<elements> +<element name="IC1" library="74xx-eu" package="SO16" value="74AC165D" x="49.53" y="45.085" rot="R270"/> +<element name="IC2" library="74xx-eu" package="SO16" value="74HC595D" x="16.51" y="38.735" rot="R90"/> +<element name="IC3" library="74xx-eu" package="SO16" value="74HC595D" x="81.915" y="20.32" rot="R270"/> +<element name="IC4" library="74xx-eu" package="SO16" value="74HC595D" x="16.51" y="15.24" rot="R90"/> +<element name="IC5" library="memory-idt" package="SO28-3" value="" x="49.53" y="22.86" rot="R90"> +<attribute name="OC_NEWARK" value="34M6449" x="49.53" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> +<attribute name="MPN" value="IDT71256SA20YG" x="49.53" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> +<attribute name="MF" value="" x="49.53" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> +<attribute name="OC_FARNELL" value="1218010" x="49.53" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> +</element> +<element name="X1" library="con-molex" package="70543-14" value="C-GRID-14-70543" x="62.23" y="22.86" rot="R90"> +<attribute name="OC_NEWARK" value="unknown" x="62.23" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> +<attribute name="MPN" value="" x="62.23" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> +<attribute name="MF" value="" x="62.23" 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x2="66.675" y2="48.895" width="0.4064" layer="16"/> +<wire x1="3.81" y1="11.43" x2="8.255" y2="11.43" width="0.4064" layer="1"/> +<via x="8.255" y="11.43" extent="1-16" drill="0.6" shape="square"/> +<wire x1="8.255" y1="11.43" x2="8.255" y2="17.145" width="0.4064" layer="16"/> +</signal> +<signal name="N$5"> +<contactref element="IC2" pad="12"/> +<contactref element="IC4" pad="12"/> +<contactref element="IC3" pad="12"/> +<contactref element="IC1" pad="1"/> +<wire x1="13.4366" y1="15.875" x2="10.16" y2="15.875" width="0.4064" layer="1"/> +<wire x1="10.16" y1="15.875" x2="9.525" y2="16.51" width="0.4064" layer="1"/> +<wire x1="9.525" y1="16.51" x2="9.525" y2="39.37" width="0.4064" layer="1"/> +<wire x1="9.525" y1="39.37" x2="9.525" y2="48.895" width="0.4064" layer="1"/> +<wire x1="9.525" y1="39.37" x2="13.4366" y2="39.37" width="0.4064" layer="1"/> +<wire x1="46.4566" y1="49.53" x2="45.085" y2="49.53" width="0.4064" layer="1"/> +<wire x1="45.085" y1="49.53" x2="10.16" y2="49.53" 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extent="1-16" drill="0.6" shape="square"/> +<wire x1="88.9" y1="23.495" x2="88.9" y2="29.21" width="0.4064" layer="1"/> +</signal> +<signal name="!WE"> +<contactref element="IC5" pad="27"/> +<contactref element="X2" pad="13"/> +<wire x1="44.215" y1="15.875" x2="43.18" y2="15.875" width="0.4064" layer="1"/> +<wire x1="43.18" y1="15.875" x2="42.545" y2="15.24" width="0.4064" layer="1"/> +<wire x1="42.545" y1="15.24" x2="42.545" y2="9.525" width="0.4064" layer="1"/> +<wire x1="42.545" y1="9.525" x2="41.91" y2="8.89" width="0.4064" layer="1"/> +<wire x1="36.83" y1="8.89" x2="41.91" y2="8.89" width="0.4064" layer="1"/> +</signal> +<signal name="!RAM_CS"> +<contactref element="IC5" pad="20"/> +<contactref element="X2" pad="6"/> +<wire x1="40.64" y1="24.765" x2="44.215" y2="24.765" width="0.4064" layer="1"/> +<wire x1="36.83" y1="26.67" x2="38.735" y2="26.67" width="0.4064" layer="1"/> +<wire x1="38.735" y1="26.67" x2="40.64" y2="24.765" width="0.4064" layer="1"/> +</signal> +<signal name="!OE"> +<contactref element="IC5" pad="22"/> +<contactref element="X2" pad="8"/> +<wire x1="44.215" y1="22.225" x2="40.005" y2="22.225" width="0.4064" layer="1"/> +<wire x1="40.005" y1="22.225" x2="39.37" y2="21.59" width="0.4064" layer="1"/> +<wire x1="39.37" y1="21.59" x2="36.83" y2="21.59" width="0.4064" layer="1"/> +</signal> +<signal name="D_OUT"> +<contactref element="SV1" pad="5"/> +<contactref element="IC1" pad="9"/> +<wire x1="52.6034" y1="40.64" x2="55.245" y2="40.64" width="0.4064" layer="1"/> +<via x="55.245" y="40.64" extent="1-16" drill="0.6" shape="square"/> +<wire x1="55.245" y1="40.64" x2="55.88" y2="40.64" width="0.4064" layer="16"/> +<wire x1="55.88" y1="40.64" x2="56.515" y2="41.275" width="0.4064" layer="16"/> +<wire x1="56.515" y1="41.275" x2="56.515" y2="45.085" width="0.4064" layer="16"/> +<wire x1="6.985" y1="46.355" x2="6.985" y2="9.525" width="0.4064" layer="16"/> +<wire x1="56.515" y1="45.085" x2="55.88" y2="45.72" width="0.4064" layer="16"/> +<wire x1="6.985" y1="46.355" x2="7.62" y2="46.99" width="0.4064" layer="16"/> +<wire x1="7.62" y1="46.99" x2="53.34" y2="46.99" width="0.4064" layer="16"/> +<wire x1="53.34" y1="46.99" x2="54.61" y2="45.72" width="0.4064" layer="16"/> +<wire x1="54.61" y1="45.72" x2="55.88" y2="45.72" width="0.4064" layer="16"/> +<wire x1="6.985" y1="9.525" x2="6.35" y2="8.89" width="0.4064" layer="16"/> +<wire x1="6.35" y1="8.89" x2="3.81" y2="8.89" width="0.4064" layer="16"/> +</signal> +</signals> +</board> +</drawing> +</eagle> diff --git a/hardware-v2/ram-ice.rep b/hardware-v2/ram-ice.rep new file mode 100644 index 0000000..187b1dd --- /dev/null +++ b/hardware-v2/ram-ice.rep @@ -0,0 +1,230 @@ +Data Exported from: /home/trygvis/dev/io.trygvis/2013/02/ram-ice/hardware/ram-ice.brd +with: /home/trygvis/opt/eagle/eagle-6.4.0/ulp/statistic-brd.ulp Version 1.3.8 +at: 2/17/13 2:23 AM +EAGLE Version 6.4.0 Copyright (c) 1988-2013 CadSoft + +all Values in mm +max. Board length (Layer 20) +X = 100.00 +Y = 80.00 +Outline contour = 360.00 + +used layers 2 + + 1 Top +16 Bottom +_________________________ + +471 Wire(s) incl. Arc(s) +0 Polygon(s) +_________________________ +102 SMD(s) top +0 SMD(s) bottom +=================== +102 SMD(s) total + +34 PAD(s) +_________________________ +45 Via +0 Hole +=================== +79 Drills total +_________________________ +102 tCream +0 bCream +_________________________ +Routing Info: +36 Signal(s) +136 PAD/SMD total +=================== +132 PAD/SMD on Signal +_________________________ +Packages used area: +~ 1144.55 mm² (0.114 dm²) +_________________________ + + +============================ + +============================ +13 Elements: 0 locked / 13 unlocked +0 Testpoints (TP) + +---------------------------- +LAYER +Nb. Name Used + 1 Top 1 + 16 Bottom 1 + 17 Pads 1 + 18 Vias 1 + 19 Unrouted 0 + 20 Dimension 1 + 21 tPlace 1 + 22 bPlace 0 + 23 tOrigins 1 + 24 bOrigins 0 + 25 tNames 1 + 26 bNames 0 + 27 tValues 1 + 28 bValues 0 + 29 tStop 1 + 30 bStop 1 + 31 tCream 1 + 32 bCream 0 + 33 tFinish 0 + 34 bFinish 0 + 35 tGlue 1 + 36 bGlue 0 + 37 tTest 0 + 38 bTest 0 + 39 tKeepout 1 + 40 bKeepout 0 + 41 tRestrict 0 + 42 bRestrict 0 + 43 vRestrict 0 + 44 Drills 1 + 45 Holes 0 + 46 Milling 0 + 47 Measures 0 + 48 Document 0 + 49 Reference 0 + 51 tDocu 1 + 52 bDocu 0 + +---------------------------- +CLASS +# Name min. Width Clearance min. Drill Used +0 default 0.0000 0.0000 0.0000 36 + +---------------------------- +WIDTH +WIRE Q. +0.4064 471 + +ARC Q. + * Wire width are saved in 0.2 micron resolution. + +POLY. width Q. + +POLY. Isol. Q. + +Polygon +Type Name Layer Rank Width + * Wire width are saved in 0.2 micron resolution. + +---------------------------- +CIRCLE (width) Q. + +CIRCLE diam. Q. + +---------------------------- +TEXT (w) Q. + +TEXT (s) Q. + +---------------------------- +SMD x SMD y Roundn. Q. +1.6000 1.8000 0% 10 +0.6604 2.0320 0% 64 +0.7620 1.5240 0% 28 + +PAD tDiam Q. +1.5240 34 + +PAD bDiam Q. +1.5240 34 + +PAD tRestring Q. +0.2540 34 + +PAD bRestring Q. +0.2540 34 + +PAD iDiam Q. +1.5240 34 + +PAD iRestring Q. +0.2540 34 + +VIA Outer-Diam Q. +1.0064 45 + +VIA Outer-Restring Q. +0.2032 45 + +VIA Inner-Diam. Q. +1.0064 45 + +VIA Inner-Restring Q. +0.2032 45 + +VIA drill Q. +0.6000 45 + +VIA Stack Q. +01-16 45 +01-16-PAD 34 + +PAD drill Q. +1.0160 34 + +---------------------------- +HOLE drill Q. + +RACK +T01 0.6 +T02 1.0 + +---------------------------- +LIBRARY Q. +resistor 5 +74xx-eu 4 +memory-idt 1 +con-lstb 1 +con-molex 2 + +PACKAGE Q. +C1206 5 +SO16 4 +SO28-3 1 +MA06-1 1 +70543-14 2 + +VALUE PAC Q. Top Bot +~/-empty-/~C1 C1206 1 1 0 +~/-empty-/~C2 C1206 1 1 0 +~/-empty-/~C3 C1206 1 1 0 +~/-empty-/~C4 C1206 1 1 0 +~/-empty-/~C5 C1206 1 1 0 +74AC165D SO16 1 1 0 +74HC595D SO16 3 3 0 +~/-empty-/~IC5 SO28-3 1 1 0 +~/-empty-/~SV1 MA06-1 1 1 0 +C-GRID-14-70543 70543-14 2 2 0 + +---------------------------- +RECT x RECT y Q. +0 RECT (copper) + +---------------------------- +RECT Layer Q. + +---------------------------- +TEXT (s) Q. +0 TEXT size (copper) + +TEXT (w) Q. +0 TEXT wire width (copper) + +TEXT Q. +1.2700 16 +1.7780 1 +1.0160 2 +0.8128 2 +4 TEXT size (place) +4 TEXT wire width (place) + +CIRCLE diam. Q. +0 CIRCLE (copper) + +End report diff --git a/hardware-v2/ram-ice.sch b/hardware-v2/ram-ice.sch new file mode 100644 index 0000000..461aaff --- /dev/null +++ b/hardware-v2/ram-ice.sch @@ -0,0 +1,5460 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="6.4"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="no" active="no"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="no" active="no"/> +<layer number="17" name="Pads" color="2" fill="1" visible="no" active="no"/> +<layer number="18" name="Vias" color="2" fill="1" visible="no" active="no"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="no"/> +<layer number="20" name="Dimension" color="15" fill="1" visible="no" active="no"/> +<layer number="21" name="tPlace" color="7" fill="1" visible="no" active="no"/> +<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="no"/> +<layer number="23" name="tOrigins" color="15" fill="1" visible="no" active="no"/> +<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="no"/> +<layer number="25" name="tNames" color="7" fill="1" visible="no" active="no"/> +<layer number="26" name="bNames" color="7" fill="1" visible="no" active="no"/> +<layer number="27" name="tValues" color="7" fill="1" visible="no" active="no"/> +<layer number="28" name="bValues" color="7" fill="1" visible="no" active="no"/> +<layer number="29" name="tStop" color="7" fill="3" visible="no" active="no"/> +<layer number="30" name="bStop" color="7" fill="6" visible="no" active="no"/> +<layer number="31" name="tCream" color="7" fill="4" visible="no" active="no"/> +<layer number="32" name="bCream" color="7" fill="5" visible="no" active="no"/> +<layer number="33" name="tFinish" color="6" fill="3" visible="no" active="no"/> +<layer number="34" name="bFinish" color="6" fill="6" visible="no" active="no"/> +<layer number="35" name="tGlue" color="7" fill="4" visible="no" active="no"/> +<layer number="36" name="bGlue" color="7" fill="5" visible="no" active="no"/> +<layer number="37" name="tTest" color="7" fill="1" visible="no" active="no"/> +<layer number="38" name="bTest" color="7" fill="1" visible="no" active="no"/> +<layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="no"/> +<layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="no"/> +<layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="no"/> +<layer number="42" name="bRestrict" color="1" fill="10" visible="no" active="no"/> +<layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="no"/> +<layer number="44" name="Drills" color="7" fill="1" visible="no" active="no"/> +<layer number="45" name="Holes" color="7" fill="1" visible="no" active="no"/> +<layer number="46" name="Milling" color="3" fill="1" visible="no" active="no"/> +<layer number="47" name="Measures" color="7" fill="1" visible="no" active="no"/> +<layer number="48" name="Document" color="7" fill="1" visible="no" active="no"/> +<layer number="49" name="Reference" color="7" fill="1" visible="no" active="no"/> +<layer number="51" name="tDocu" color="7" fill="1" visible="no" active="no"/> +<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="no"/> +<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/> +<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/> +<layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/> +<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/> +<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/> +<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/> +<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/> +<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> +</layers> +<schematic xreflabel="%F%N/%S.%C%R" xrefpart="/%S.%C%R"> +<libraries> +<library name="74xx-eu"> +<description><b>TTL Devices, 74xx Series with European Symbols</b><p> +Based on the following sources: +<ul> +<li>Texas Instruments <i>TTL Data Book</i>&nbsp;&nbsp;&nbsp;Volume 1, 1996. +<li>TTL Data Book, Volume 2 , 1993 +<li>National Seminconductor Databook 1990, ALS/LS Logic +<li>ttl 74er digital data dictionary, ECA Electronic + Acustic GmbH, ISBN 3-88109-032-0 +<li>http://icmaster.com/ViewCompare.asp +</ul> +<author>Created by librarian@cadsoft.de</author></description> +<packages> +<package name="DIL16"> +<description><b>Dual In Line Package</b></description> +<wire x1="10.16" y1="2.921" x2="-10.16" y2="2.921" width="0.1524" layer="21"/> +<wire x1="-10.16" y1="-2.921" x2="10.16" y2="-2.921" width="0.1524" layer="21"/> +<wire x1="10.16" y1="2.921" x2="10.16" y2="-2.921" width="0.1524" layer="21"/> +<wire x1="-10.16" y1="2.921" x2="-10.16" y2="1.016" width="0.1524" layer="21"/> +<wire x1="-10.16" y1="-2.921" x2="-10.16" y2="-1.016" width="0.1524" layer="21"/> +<wire x1="-10.16" y1="1.016" x2="-10.16" y2="-1.016" width="0.1524" layer="21" curve="-180"/> +<pad name="1" x="-8.89" y="-3.81" drill="0.8128" shape="long" rot="R90"/> +<pad name="2" x="-6.35" y="-3.81" drill="0.8128" shape="long" rot="R90"/> +<pad name="7" x="6.35" y="-3.81" drill="0.8128" shape="long" rot="R90"/> +<pad name="8" x="8.89" y="-3.81" drill="0.8128" shape="long" rot="R90"/> +<pad name="3" x="-3.81" y="-3.81" drill="0.8128" shape="long" rot="R90"/> +<pad name="4" x="-1.27" y="-3.81" drill="0.8128" shape="long" rot="R90"/> +<pad name="6" x="3.81" y="-3.81" drill="0.8128" shape="long" rot="R90"/> +<pad name="5" x="1.27" y="-3.81" drill="0.8128" shape="long" rot="R90"/> +<pad name="9" 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+<technology name="LS"/> +</technologies> +</device> +<device name="D" package="SO16"> +<connects> +<connect gate="A" pin="!QH" pad="7"/> +<connect gate="A" pin="A" pad="11"/> +<connect gate="A" pin="B" pad="12"/> +<connect gate="A" pin="C" pad="13"/> +<connect gate="A" pin="CLK" pad="2"/> +<connect gate="A" pin="D" pad="14"/> +<connect gate="A" pin="E" pad="3"/> +<connect gate="A" pin="F" pad="4"/> +<connect gate="A" pin="G" pad="5"/> +<connect gate="A" pin="H" pad="6"/> +<connect gate="A" pin="INH" pad="15"/> +<connect gate="A" pin="QH" pad="9"/> +<connect gate="A" pin="SER" pad="10"/> +<connect gate="A" pin="SH/!LD" pad="1"/> +<connect gate="P" pin="GND" pad="8"/> +<connect gate="P" pin="VCC" pad="16"/> +</connects> +<technologies> +<technology name="AC"/> +<technology name="ACT"/> +<technology name="HC"/> +<technology name="LS"/> +</technologies> +</device> +<device name="FK" package="LCC20"> +<connects> +<connect gate="A" pin="!QH" pad="9"/> +<connect gate="A" pin="A" pad="14"/> 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package="DIL16"> +<connects> +<connect gate="A" pin="G" pad="13"/> +<connect gate="A" pin="QA" pad="15"/> +<connect gate="A" pin="QB" pad="1"/> +<connect gate="A" pin="QC" pad="2"/> +<connect gate="A" pin="QD" pad="3"/> +<connect gate="A" pin="QE" pad="4"/> +<connect gate="A" pin="QF" pad="5"/> +<connect gate="A" pin="QG" pad="6"/> +<connect gate="A" pin="QH" pad="7"/> +<connect gate="A" pin="QH*" pad="9"/> +<connect gate="A" pin="RCK" pad="12"/> +<connect gate="A" pin="SCK" pad="11"/> +<connect gate="A" pin="SCL" pad="10"/> +<connect gate="A" pin="SER" pad="14"/> +<connect gate="P" pin="GND" pad="8"/> +<connect gate="P" pin="VCC" pad="16"/> +</connects> +<technologies> +<technology name="HC"/> +<technology name="HCT"/> +<technology name="LS"/> +</technologies> +</device> +<device name="D" package="SO16"> +<connects> +<connect gate="A" pin="G" pad="13"/> +<connect gate="A" pin="QA" pad="15"/> +<connect gate="A" pin="QB" pad="1"/> +<connect gate="A" pin="QC" pad="2"/> +<connect gate="A" pin="QD" pad="3"/> +<connect gate="A" pin="QE" pad="4"/> +<connect gate="A" pin="QF" pad="5"/> +<connect gate="A" pin="QG" pad="6"/> +<connect gate="A" pin="QH" pad="7"/> +<connect gate="A" pin="QH*" pad="9"/> +<connect gate="A" pin="RCK" pad="12"/> +<connect gate="A" pin="SCK" pad="11"/> +<connect gate="A" pin="SCL" pad="10"/> +<connect gate="A" pin="SER" pad="14"/> +<connect gate="P" pin="GND" pad="8"/> +<connect gate="P" pin="VCC" pad="16"/> +</connects> +<technologies> +<technology name="HC"/> +<technology name="HCT"/> +</technologies> +</device> +<device name="FK" package="LCC20"> +<connects> +<connect gate="A" pin="G" pad="17"/> +<connect gate="A" pin="QA" pad="19"/> +<connect gate="A" pin="QB" pad="2"/> +<connect gate="A" pin="QC" pad="3"/> +<connect gate="A" pin="QD" pad="4"/> +<connect gate="A" pin="QE" pad="5"/> +<connect gate="A" pin="QF" pad="7"/> +<connect gate="A" pin="QG" pad="8"/> +<connect gate="A" pin="QH" pad="9"/> +<connect gate="A" pin="QH*" pad="12"/> +<connect gate="A" pin="RCK" pad="15"/> +<connect gate="A" pin="SCK" pad="14"/> +<connect gate="A" pin="SCL" pad="13"/> +<connect gate="A" pin="SER" pad="18"/> +<connect gate="P" pin="GND" pad="10"/> +<connect gate="P" pin="VCC" pad="20"/> +</connects> +<technologies> +<technology name="HC"/> +<technology name="HCT"/> +<technology name="LS"/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="memory-idt"> +<description><b>IDT Memories</b><p> +Integrated Device Technology, Inc.<p> +http://www.idt.com<p> +<author>Created by librarian@cadsoft.de</author></description> +<packages> +<package name="SO28-3"> +<description><b>Small Outline Package</b></description> +<wire x1="-8.814" y1="-4.248" x2="8.839" y2="-4.248" width="0.1524" layer="21"/> +<wire x1="8.839" y1="-4.248" x2="8.839" y2="4.248" width="0.1524" layer="21"/> +<wire x1="8.839" y1="4.248" x2="-8.814" y2="4.248" width="0.1524" layer="21"/> +<wire x1="-8.814" y1="4.248" x2="-8.814" y2="-4.248" width="0.1524" layer="21"/> +<circle x="-7.874" y="-3.0988" radius="0.5334" width="0.1524" layer="21"/> +<smd name="1" x="-8.255" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="2" x="-6.985" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="3" x="-5.715" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="4" x="-4.445" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="5" x="-3.175" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="6" x="-1.905" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="7" x="-0.635" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="8" x="0.635" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="9" x="1.905" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="10" x="3.175" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="20" x="1.905" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="19" x="3.175" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="18" x="4.445" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="17" x="5.715" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="16" x="6.985" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="15" x="8.255" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="14" x="8.255" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="13" x="6.985" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="12" x="5.715" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="11" x="4.445" y="-5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="21" x="0.635" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="22" x="-0.635" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="23" x="-1.905" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="24" x="-3.175" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="25" x="-4.445" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="26" x="-5.715" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="27" x="-6.985" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<smd name="28" x="-8.255" y="5.315" dx="0.762" dy="1.524" layer="1"/> +<text x="-9.144" y="-4.318" size="1.778" layer="25" ratio="10" rot="R90">>NAME</text> +<text x="-7.874" y="-1.524" size="1.778" layer="27" ratio="10">>VALUE</text> +<rectangle x1="-8.509" y1="-5.7976" x2="-8.001" y2="-4.2736" layer="51"/> +<rectangle x1="-7.239" y1="-5.7976" x2="-6.731" y2="-4.2736" layer="51"/> +<rectangle x1="-5.969" y1="-5.7976" x2="-5.461" y2="-4.2736" layer="51"/> +<rectangle x1="-4.699" y1="-5.7976" x2="-4.191" y2="-4.2736" layer="51"/> +<rectangle x1="-3.429" y1="-5.7976" x2="-2.921" y2="-4.2736" layer="51"/> +<rectangle x1="-2.159" y1="-5.7976" x2="-1.651" y2="-4.2736" layer="51"/> +<rectangle x1="-0.889" y1="-5.7976" x2="-0.381" y2="-4.2736" layer="51"/> +<rectangle x1="0.381" y1="-5.7976" x2="0.889" y2="-4.2736" layer="51"/> +<rectangle x1="1.651" y1="-5.7976" x2="2.159" y2="-4.2736" layer="51"/> +<rectangle x1="2.921" y1="-5.7976" x2="3.429" y2="-4.2736" layer="51"/> +<rectangle x1="4.191" y1="-5.7976" x2="4.699" y2="-4.2736" layer="51"/> +<rectangle x1="5.461" y1="-5.7976" x2="5.969" y2="-4.2736" layer="51"/> +<rectangle x1="6.731" y1="-5.7976" x2="7.239" y2="-4.2736" layer="51"/> +<rectangle x1="8.001" y1="-5.7976" x2="8.509" y2="-4.2736" layer="51"/> +<rectangle x1="8.001" y1="4.2735" x2="8.509" y2="5.7975" layer="51"/> +<rectangle x1="6.731" y1="4.2735" x2="7.239" y2="5.7975" layer="51"/> +<rectangle x1="5.461" y1="4.2735" x2="5.969" y2="5.7975" layer="51"/> +<rectangle x1="4.191" y1="4.2735" x2="4.699" y2="5.7975" layer="51"/> +<rectangle x1="2.921" y1="4.2735" x2="3.429" y2="5.7975" layer="51"/> +<rectangle x1="1.651" y1="4.2735" x2="2.159" y2="5.7975" layer="51"/> +<rectangle x1="0.381" y1="4.2735" x2="0.889" y2="5.7975" layer="51"/> +<rectangle x1="-0.889" y1="4.2735" x2="-0.381" y2="5.7975" layer="51"/> +<rectangle x1="-2.159" y1="4.2735" x2="-1.651" y2="5.7975" layer="51"/> +<rectangle x1="-3.429" y1="4.2735" x2="-2.921" y2="5.7975" layer="51"/> +<rectangle x1="-4.699" y1="4.2735" x2="-4.191" y2="5.7975" layer="51"/> +<rectangle x1="-5.969" y1="4.2735" x2="-5.461" y2="5.7975" layer="51"/> +<rectangle x1="-7.239" y1="4.2735" x2="-6.731" y2="5.7975" layer="51"/> +<rectangle x1="-8.509" y1="4.2735" x2="-8.001" y2="5.7975" layer="51"/> +</package> +</packages> +<symbols> +<symbol name="71256"> +<wire x1="-7.62" y1="-25.4" x2="7.62" y2="-25.4" width="0.4064" layer="94"/> +<wire x1="7.62" y1="-25.4" x2="7.62" y2="25.4" width="0.4064" layer="94"/> +<wire x1="7.62" y1="25.4" x2="-7.62" y2="25.4" width="0.4064" layer="94"/> +<wire x1="-7.62" y1="25.4" x2="-7.62" y2="-25.4" width="0.4064" layer="94"/> +<text x="-7.62" y="26.035" size="1.778" layer="95">>NAME</text> +<text x="-7.62" y="-27.94" size="1.778" layer="96">>VALUE</text> +<pin name="A0" x="-12.7" y="22.86" length="middle" direction="in"/> +<pin name="A1" x="-12.7" y="20.32" length="middle" direction="in"/> +<pin name="A2" x="-12.7" y="17.78" length="middle" direction="in"/> +<pin name="A3" x="-12.7" y="15.24" length="middle" direction="in"/> +<pin name="A4" x="-12.7" y="12.7" length="middle" direction="in"/> +<pin name="A5" x="-12.7" y="10.16" length="middle" direction="in"/> +<pin name="A6" x="-12.7" y="7.62" length="middle" direction="in"/> +<pin name="A7" x="-12.7" y="5.08" length="middle" direction="in"/> +<pin name="A8" x="-12.7" y="2.54" length="middle" direction="in"/> +<pin name="A9" x="-12.7" y="0" length="middle" direction="in"/> +<pin name="A10" x="-12.7" y="-2.54" length="middle" direction="in"/> +<pin name="!OE" x="-12.7" y="-17.78" length="middle" direction="in"/> +<pin name="I/O5" x="12.7" y="12.7" length="middle" rot="R180"/> +<pin name="I/O6" x="12.7" y="10.16" length="middle" rot="R180"/> +<pin name="I/O7" x="12.7" y="7.62" length="middle" rot="R180"/> +<pin name="I/O8" x="12.7" y="5.08" length="middle" rot="R180"/> +<pin name="!WE" x="-12.7" y="-20.32" length="middle" direction="in"/> +<pin name="!CS" x="-12.7" y="-22.86" length="middle" direction="in"/> +<pin name="I/O1" x="12.7" y="22.86" length="middle" rot="R180"/> +<pin name="I/O2" x="12.7" y="20.32" length="middle" rot="R180"/> +<pin name="I/O3" x="12.7" y="17.78" length="middle" rot="R180"/> +<pin name="I/O4" x="12.7" y="15.24" length="middle" rot="R180"/> +<pin name="A11" x="-12.7" y="-5.08" length="middle" direction="in"/> +<pin name="A12" x="-12.7" y="-7.62" length="middle" direction="in"/> +<pin name="A13" x="-12.7" y="-10.16" length="middle" direction="in"/> +<pin name="A14" x="-12.7" y="-12.7" length="middle" direction="in"/> +</symbol> +<symbol name="VCCGND"> +<text x="-0.635" y="-0.635" size="1.778" layer="95">>NAME</text> +<text x="1.905" y="-5.842" size="1.27" layer="95" rot="R90">GND</text> +<text x="1.905" y="2.413" size="1.27" layer="95" rot="R90">VCC</text> +<pin name="VCC" x="0" y="7.62" visible="pad" length="middle" direction="pwr" rot="R270"/> +<pin name="GND" x="0" y="-7.62" visible="pad" length="middle" direction="pwr" rot="R90"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="71256S" prefix="IC" uservalue="yes"> +<description><b>MEMORY</b></description> +<gates> +<gate name="G$1" symbol="71256" x="0" y="0"/> +<gate name="P" symbol="VCCGND" x="-22.86" y="2.54" addlevel="request"/> +</gates> +<devices> +<device name="" package="SO28-3"> +<connects> +<connect gate="G$1" pin="!CS" pad="20"/> +<connect gate="G$1" pin="!OE" pad="22"/> +<connect gate="G$1" pin="!WE" pad="27"/> +<connect gate="G$1" pin="A0" pad="10"/> +<connect gate="G$1" pin="A1" pad="9"/> +<connect gate="G$1" pin="A10" pad="21"/> +<connect gate="G$1" pin="A11" pad="23"/> +<connect gate="G$1" pin="A12" pad="2"/> +<connect gate="G$1" pin="A13" pad="26"/> +<connect gate="G$1" pin="A14" pad="1"/> +<connect gate="G$1" pin="A2" pad="8"/> +<connect gate="G$1" pin="A3" pad="7"/> +<connect gate="G$1" pin="A4" pad="6"/> +<connect gate="G$1" pin="A5" pad="5"/> +<connect gate="G$1" pin="A6" pad="4"/> +<connect gate="G$1" pin="A7" pad="3"/> +<connect gate="G$1" pin="A8" pad="25"/> +<connect gate="G$1" pin="A9" pad="24"/> +<connect gate="G$1" pin="I/O1" pad="11"/> +<connect gate="G$1" pin="I/O2" pad="12"/> +<connect gate="G$1" pin="I/O3" pad="13"/> +<connect gate="G$1" pin="I/O4" pad="15"/> +<connect gate="G$1" pin="I/O5" pad="16"/> +<connect gate="G$1" pin="I/O6" pad="17"/> +<connect gate="G$1" pin="I/O7" pad="18"/> +<connect gate="G$1" pin="I/O8" pad="19"/> +<connect gate="P" pin="GND" pad="14"/> +<connect gate="P" pin="VCC" pad="28"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="IDT71256SA20YG" constant="no"/> +<attribute name="OC_FARNELL" value="1218010" constant="no"/> +<attribute name="OC_NEWARK" value="34M6449" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="supply1"> +<description><b>Supply Symbols</b><p> + GND, VCC, 0V, +5V, -5V, etc.<p> + Please keep in mind, that these devices are necessary for the + automatic wiring of the supply signals.<p> + The pin name defined in the symbol is identical to the net which is to be wired automatically.<p> + In this library the device names are the same as the pin names of the symbols, therefore the correct signal names appear next to the supply symbols in the schematic.<p> + <author>Created by librarian@cadsoft.de</author></description> +<packages> +</packages> +<symbols> +<symbol name="VCC"> +<wire x1="1.27" y1="-1.905" x2="0" y2="0" width="0.254" layer="94"/> +<wire x1="0" y1="0" x2="-1.27" y2="-1.905" width="0.254" layer="94"/> +<text x="-2.54" y="-2.54" size="1.778" layer="96" rot="R90">>VALUE</text> +<pin name="VCC" x="0" y="-2.54" visible="off" length="short" direction="sup" rot="R90"/> +</symbol> +<symbol name="GND"> +<wire x1="-1.905" y1="0" x2="1.905" y2="0" width="0.254" layer="94"/> +<text x="-2.54" y="-2.54" size="1.778" layer="96">>VALUE</text> +<pin name="GND" x="0" y="2.54" visible="off" length="short" direction="sup" rot="R270"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="VCC" prefix="P+"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="VCC" symbol="VCC" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="GND" prefix="GND"> +<description><b>SUPPLY SYMBOL</b></description> +<gates> +<gate name="1" symbol="GND" x="0" y="0"/> +</gates> +<devices> +<device name=""> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="con-molex"> +<description><b>Molex Connectors</b><p> +<author>Created by librarian@cadsoft.de</author></description> +<packages> +<package name="70543-14"> +<description><b>C-Grid SL Connector</b><p> + vertical, 14 pin</description> +<wire x1="19.05" y1="-2.8575" x2="19.05" y2="2.8575" width="0.254" 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width="0.6096" layer="94"/> +<text x="2.54" y="-0.762" size="1.524" layer="95">>NAME</text> +<text x="-0.762" y="1.397" size="1.778" layer="96">>VALUE</text> +<pin name="S" x="-2.54" y="0" visible="off" length="short" direction="pas"/> +</symbol> +<symbol name="M"> +<wire x1="1.27" y1="0" x2="0" y2="0" width="0.6096" layer="94"/> +<text x="2.54" y="-0.762" size="1.524" layer="95">>NAME</text> +<pin name="S" x="-2.54" y="0" visible="off" length="short" direction="pas"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="C-GRID-14" prefix="X"> +<description><b>CONNECTOR</b><p> +wire to board 2.54 mm (0.100") pitch header</description> +<gates> +<gate name="-1" symbol="MV" x="2.54" y="0" addlevel="always" swaplevel="1"/> +<gate name="-2" symbol="M" x="2.54" y="-2.54" addlevel="always" swaplevel="1"/> +<gate name="-3" symbol="M" x="2.54" y="-5.08" addlevel="always" swaplevel="1"/> +<gate name="-4" symbol="M" x="2.54" y="-7.62" addlevel="always" swaplevel="1"/> +<gate name="-5" symbol="M" x="2.54" y="-10.16" addlevel="always" swaplevel="1"/> +<gate name="-6" symbol="M" x="2.54" y="-12.7" addlevel="always" swaplevel="1"/> +<gate name="-7" symbol="M" x="2.54" y="-15.24" addlevel="always" swaplevel="1"/> +<gate name="-8" symbol="M" x="2.54" y="-17.78" addlevel="always" swaplevel="1"/> +<gate name="-9" symbol="M" x="2.54" y="-20.32" addlevel="always" swaplevel="1"/> +<gate name="-10" symbol="M" x="2.54" y="-22.86" addlevel="always" swaplevel="1"/> +<gate name="-11" symbol="M" x="2.54" y="-25.4" addlevel="always" swaplevel="1"/> +<gate name="-12" symbol="M" x="2.54" y="-27.94" addlevel="always" swaplevel="1"/> +<gate name="-13" symbol="M" x="2.54" y="-30.48" addlevel="always" swaplevel="1"/> +<gate name="-14" symbol="M" x="2.54" y="-33.02" addlevel="always" swaplevel="1"/> +</gates> +<devices> +<device name="-70543" package="70543-14"> +<connects> +<connect gate="-1" pin="S" pad="1"/> +<connect gate="-10" pin="S" pad="10"/> +<connect gate="-11" pin="S" pad="11"/> +<connect gate="-12" pin="S" pad="12"/> +<connect gate="-13" pin="S" pad="13"/> +<connect gate="-14" pin="S" pad="14"/> +<connect gate="-2" pin="S" pad="2"/> +<connect gate="-3" pin="S" pad="3"/> +<connect gate="-4" pin="S" pad="4"/> +<connect gate="-5" pin="S" pad="5"/> +<connect gate="-6" pin="S" pad="6"/> +<connect gate="-7" pin="S" pad="7"/> +<connect gate="-8" pin="S" pad="8"/> +<connect gate="-9" pin="S" pad="9"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="" constant="no"/> +<attribute name="OC_FARNELL" value="unknown" constant="no"/> +<attribute name="OC_NEWARK" value="unknown" constant="no"/> +</technology> +</technologies> +</device> +<device name="-70553" package="70553-14"> +<connects> +<connect gate="-1" pin="S" pad="1"/> +<connect gate="-10" pin="S" pad="10"/> +<connect gate="-11" pin="S" pad="11"/> +<connect gate="-12" pin="S" pad="12"/> +<connect gate="-13" pin="S" pad="13"/> +<connect gate="-14" pin="S" pad="14"/> +<connect gate="-2" pin="S" pad="2"/> +<connect gate="-3" pin="S" pad="3"/> +<connect gate="-4" pin="S" pad="4"/> +<connect gate="-5" pin="S" pad="5"/> +<connect gate="-6" pin="S" pad="6"/> +<connect gate="-7" pin="S" pad="7"/> +<connect gate="-8" pin="S" pad="8"/> +<connect gate="-9" pin="S" pad="9"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="" constant="no"/> +<attribute name="OC_FARNELL" value="unknown" constant="no"/> +<attribute name="OC_NEWARK" value="unknown" constant="no"/> +</technology> +</technologies> +</device> +<device name="-74099" package="74099-14"> +<connects> +<connect gate="-1" pin="S" pad="1"/> +<connect gate="-10" pin="S" pad="10"/> +<connect gate="-11" pin="S" pad="11"/> +<connect gate="-12" pin="S" pad="12"/> +<connect gate="-13" pin="S" pad="13"/> +<connect gate="-14" pin="S" pad="14"/> +<connect gate="-2" pin="S" pad="2"/> +<connect gate="-3" pin="S" pad="3"/> +<connect gate="-4" pin="S" pad="4"/> +<connect gate="-5" pin="S" pad="5"/> +<connect gate="-6" pin="S" pad="6"/> +<connect gate="-7" pin="S" pad="7"/> +<connect gate="-8" pin="S" pad="8"/> +<connect gate="-9" pin="S" pad="9"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="" constant="no"/> +<attribute name="OC_FARNELL" value="unknown" constant="no"/> +<attribute name="OC_NEWARK" value="unknown" constant="no"/> +</technology> +</technologies> +</device> +<device name="-15-91" package="15-91-14"> +<connects> +<connect gate="-1" pin="S" pad="1"/> +<connect gate="-10" pin="S" pad="10"/> +<connect gate="-11" pin="S" pad="11"/> +<connect gate="-12" pin="S" pad="12"/> +<connect gate="-13" pin="S" pad="13"/> +<connect gate="-14" pin="S" pad="14"/> +<connect gate="-2" pin="S" pad="2"/> +<connect gate="-3" pin="S" pad="3"/> +<connect gate="-4" pin="S" pad="4"/> +<connect gate="-5" pin="S" pad="5"/> +<connect gate="-6" pin="S" pad="6"/> +<connect gate="-7" pin="S" pad="7"/> +<connect gate="-8" pin="S" pad="8"/> +<connect gate="-9" pin="S" pad="9"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="" constant="no"/> +<attribute name="OC_FARNELL" value="unknown" constant="no"/> +<attribute name="OC_NEWARK" value="unknown" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="resistor"> +<description><b>Resistors, Capacitors, Inductors</b><p> +Based on the previous libraries: +<ul> +<li>r.lbr +<li>cap.lbr +<li>cap-fe.lbr +<li>captant.lbr +<li>polcap.lbr +<li>ipc-smd.lbr +</ul> +All SMD packages are defined according to the IPC specifications and CECC<p> +<author>Created by librarian@cadsoft.de</author><p> +<p> +for Electrolyt Capacitors see also :<p> +www.bccomponents.com <p> +www.panasonic.com<p> +www.kemet.com<p> +<p> +for trimmer refence see : <u>www.electrospec-inc.com/cross_references/trimpotcrossref.asp</u><p> + +<map name="nav_main"> +<area shape="rect" coords="0,1,140,23" href="../military_specs.asp" title=""> +<area shape="rect" coords="0,24,140,51" href="../about.asp" title=""> +<area shape="rect" coords="1,52,140,77" href="../rfq.asp" title=""> +<area shape="rect" coords="0,78,139,103" href="../products.asp" title=""> +<area shape="rect" coords="1,102,138,128" href="../excess_inventory.asp" title=""> +<area shape="rect" coords="1,129,138,150" href="../edge.asp" title=""> +<area shape="rect" coords="1,151,139,178" href="../industry_links.asp" title=""> +<area shape="rect" coords="0,179,139,201" href="../comments.asp" title=""> +<area shape="rect" coords="1,203,138,231" href="../directory.asp" title=""> +<area shape="default" nohref> +</map> + +<html> + +<title></title> + + <LINK REL="StyleSheet" TYPE="text/css" HREF="style-sheet.css"> + +<body bgcolor="#ffffff" text="#000000" marginwidth="0" marginheight="0" topmargin="0" leftmargin="0"> +<table border=0 cellspacing=0 cellpadding=0 width="100%" cellpaddding=0 height="55%"> +<tr valign="top"> + +</td> +<! <td width="10">&nbsp;</td> +<td width="90%"> + +<b><font color="#0000FF" size="4">TRIM-POT CROSS REFERENCE</font></b> +<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=2> + <TR> + <TD COLSPAN=8> + <FONT SIZE=3 FACE=ARIAL><B>RECTANGULAR MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BOURNS</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">BI&nbsp;TECH</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">DALE-VISHAY</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PHILIPS/MEPCO</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MURATA</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">PANASONIC</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">SPECTROL</FONT> + </B> + </TD> + <TD ALIGN=CENTER> + <B> + <FONT SIZE=3 FACE=ARIAL color="#FF0000">MILSPEC</FONT> + </B> + </TD><TD>&nbsp;</TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3 > + 3005P<BR> + 3006P<BR> + 3006W<BR> + 3006Y<BR> + 3009P<BR> + 3009W<BR> + 3009Y<BR> + 3057J<BR> + 3057L<BR> + 3057P<BR> + 3057Y<BR> + 3059J<BR> + 3059L<BR> + 3059P<BR> + 3059Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 89P<BR> + 89W<BR> + 89X<BR> + 89PH<BR> + 76P<BR> + 89XH<BR> + 78SLT<BR> + 78L&nbsp;ALT<BR> + 56P&nbsp;ALT<BR> + 78P&nbsp;ALT<BR> + T8S<BR> + 78L<BR> + 56P<BR> + 78P<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + T18/784<BR> + 783<BR> + 781<BR> + -<BR> + -<BR> + -<BR> + 2199<BR> + 1697/1897<BR> + 1680/1880<BR> + 2187<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 8035EKP/CT20/RJ-20P<BR> + -<BR> + RJ-20X<BR> + -<BR> + -<BR> + -<BR> + 1211L<BR> + 8012EKQ&nbsp;ALT<BR> + 8012EKR&nbsp;ALT<BR> + 1211P<BR> + 8012EKJ<BR> + 8012EKL<BR> + 8012EKQ<BR> + 8012EKR<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 2101P<BR> + 2101W<BR> + 2101Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 2102L<BR> + 2102S<BR> + 2102Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + EVMCOG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 43P<BR> + 43W<BR> + 43Y<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 40L<BR> + 40P<BR> + 40Y<BR> + 70Y-T602<BR> + 70L<BR> + 70P<BR> + 70Y<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + RT/RTR12<BR> + RT/RTR12<BR> + RT/RTR12<BR> + -<BR> + RJ/RJR12<BR> + RJ/RJR12<BR> + RJ/RJR12<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SQUARE MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3250L<BR> + 3250P<BR> + 3250W<BR> + 3250X<BR> + 3252P<BR> + 3252W<BR> + 3252X<BR> + 3260P<BR> + 3260W<BR> + 3260X<BR> + 3262P<BR> + 3262W<BR> + 3262X<BR> + 3266P<BR> + 3266W<BR> + 3266X<BR> + 3290H<BR> + 3290P<BR> + 3290W<BR> + 3292P<BR> + 3292W<BR> + 3292X<BR> + 3296P<BR> + 3296W<BR> + 3296X<BR> + 3296Y<BR> + 3296Z<BR> + 3299P<BR> + 3299W<BR> + 3299X<BR> + 3299Y<BR> + 3299Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66X&nbsp;ALT<BR> + -<BR> + 64W&nbsp;ALT<BR> + -<BR> + 64P&nbsp;ALT<BR> + 64W&nbsp;ALT<BR> + 64X&nbsp;ALT<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 66X&nbsp;ALT<BR> + 66P&nbsp;ALT<BR> + 66W&nbsp;ALT<BR> + 66P<BR> + 66W<BR> + 66X<BR> + 67P<BR> + 67W<BR> + 67X<BR> + 67Y<BR> + 67Z<BR> + 68P<BR> + 68W<BR> + 68X<BR> + 67Y&nbsp;ALT<BR> + 67Z&nbsp;ALT<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 5050<BR> + 5091<BR> + 5080<BR> + 5087<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + T63YB<BR> + T63XB<BR> + -<BR> + -<BR> + -<BR> + 5887<BR> + 5891<BR> + 5880<BR> + -<BR> + -<BR> + -<BR> + T93Z<BR> + T93YA<BR> + T93XA<BR> + T93YB<BR> + T93XB<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 8026EKP<BR> + 8026EKW<BR> + 8026EKM<BR> + 8026EKP<BR> + 8026EKB<BR> + 8026EKM<BR> + 1309X<BR> + 1309P<BR> + 1309W<BR> + 8024EKP<BR> + 8024EKW<BR> + 8024EKN<BR> + RJ-9P/CT9P<BR> + RJ-9W<BR> + RJ-9X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + 3103P<BR> + 3103Y<BR> + 3103Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3105P/3106P<BR> + 3105W/3106W<BR> + 3105X/3106X<BR> + 3105Y/3106Y<BR> + 3105Z/3105Z<BR> + 3102P<BR> + 3102W<BR> + 3102X<BR> + 3102Y<BR> + 3102Z<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMCBG<BR> + EVMCCG<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 55-1-X<BR> + 55-4-X<BR> + 55-3-X<BR> + 55-2-X<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 50-2-X<BR> + 50-4-X<BR> + 50-3-X<BR> + -<BR> + -<BR> + -<BR> + 64P<BR> + 64W<BR> + 64X<BR> + 64Y<BR> + 64Z<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RT/RTR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RJ/RJR22<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RT/RTR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RJ/RJR26<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RT/RTR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + RJ/RJR24<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=8>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=8> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BOURN</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MURATA</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>SPECTROL</B></FONT> + </TD> + <TD ALIGN=CENTER> + <FONT SIZE=3 FACE=ARIAL><B>MILSPEC</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3323P<BR> + 3323S<BR> + 3323W<BR> + 3329H<BR> + 3329P<BR> + 3329W<BR> + 3339H<BR> + 3339P<BR> + 3339W<BR> + 3352E<BR> + 3352H<BR> + 3352K<BR> + 3352P<BR> + 3352T<BR> + 3352V<BR> + 3352W<BR> + 3362H<BR> + 3362M<BR> + 3362P<BR> + 3362R<BR> + 3362S<BR> + 3362U<BR> + 3362W<BR> + 3362X<BR> + 3386B<BR> + 3386C<BR> + 3386F<BR> + 3386H<BR> + 3386K<BR> + 3386M<BR> + 3386P<BR> + 3386S<BR> + 3386W<BR> + 3386X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 25P<BR> + 25S<BR> + 25RX<BR> + 82P<BR> + 82M<BR> + 82PA<BR> + -<BR> + -<BR> + -<BR> + 91E<BR> + 91X<BR> + 91T<BR> + 91B<BR> + 91A<BR> + 91V<BR> + 91W<BR> + 25W<BR> + 25V<BR> + 25P<BR> + -<BR> + 25S<BR> + 25U<BR> + 25RX<BR> + 25X<BR> + 72XW<BR> + 72XL<BR> + 72PM<BR> + 72RX<BR> + -<BR> + 72PX<BR> + 72P<BR> + 72RXW<BR> + 72RXL<BR> + 72X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + T7YB<BR> + T7YA<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + TXD<BR> + TYA<BR> + TYP<BR> + -<BR> + TYD<BR> + TX<BR> + -<BR> + 150SX<BR> + 100SX<BR> + 102T<BR> + 101S<BR> + 190T<BR> + 150TX<BR> + 101<BR> + -<BR> + -<BR> + 101SX<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + ET6P<BR> + ET6S<BR> + ET6X<BR> + RJ-6W/8014EMW<BR> + RJ-6P/8014EMP<BR> + RJ-6X/8014EMX<BR> + TM7W<BR> + TM7P<BR> + TM7X<BR> + -<BR> + 8017SMS<BR> + -<BR> + 8017SMB<BR> + 8017SMA<BR> + -<BR> + -<BR> + CT-6W<BR> + CT-6H<BR> + CT-6P<BR> + CT-6R<BR> + -<BR> + CT-6V<BR> + CT-6X<BR> + -<BR> + -<BR> + 8038EKV<BR> + -<BR> + 8038EKX<BR> + -<BR> + -<BR> + 8038EKP<BR> + 8038EKZ<BR> + 8038EKW<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 3321H<BR> + 3321P<BR> + 3321N<BR> + 1102H<BR> + 1102P<BR> + 1102T<BR> + RVA0911V304A<BR> + -<BR> + RVA0911H413A<BR> + RVG0707V100A<BR> + RVA0607V(H)306A<BR> + RVA1214H213A<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 3104B<BR> + 3104C<BR> + 3104F<BR> + 3104H<BR> + -<BR> + 3104M<BR> + 3104P<BR> + 3104S<BR> + 3104W<BR> + 3104X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + EVMQ0G<BR> + EVMQIG<BR> + EVMQ3G<BR> + EVMS0G<BR> + EVMQ0G<BR> + EVMG0G<BR> + -<BR> + -<BR> + -<BR> + EVMK4GA00B<BR> + EVM30GA00B<BR> + EVMK0GA00B<BR> + EVM38GA00B<BR> + EVMB6<BR> + EVLQ0<BR> + -<BR> + EVMMSG<BR> + EVMMBG<BR> + EVMMAG<BR> + -<BR> + -<BR> + EVMMCS<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + EVMM1<BR> + -<BR> + -<BR> + EVMM0<BR> + -<BR> + -<BR> + EVMM3<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + 62-3-1<BR> + 62-1-2<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67R<BR> + -<BR> + 67P<BR> + -<BR> + -<BR> + -<BR> + -<BR> + 67X<BR> + 63V<BR> + 63S<BR> + 63M<BR> + -<BR> + -<BR> + 63H<BR> + 63P<BR> + -<BR> + -<BR> + 63X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + RJ/RJR50<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> +</TABLE> +<P>&nbsp;<P> +<TABLE BORDER=0 CELLSPACING=1 CELLPADDING=3> + <TR> + <TD COLSPAN=7> + <FONT color="#0000FF" SIZE=4 FACE=ARIAL><B>SMD TRIM-POT CROSS REFERENCE</B></FONT> + <P> + <FONT SIZE=4 FACE=ARIAL><B>MULTI-TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> + <TR> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 3224G<BR> + 3224J<BR> + 3224W<BR> + 3269P<BR> + 3269W<BR> + 3269X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + 44G<BR> + 44J<BR> + 44W<BR> + 84P<BR> + 84W<BR> + 84X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST63Z<BR> + ST63Y<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + ST5P<BR> + ST5W<BR> + ST5X<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + <TD BGCOLOR="#cccccc" ALIGN=CENTER><FONT FACE=ARIAL SIZE=3> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR> + -<BR></FONT> + </TD> + </TR> + <TR> + <TD COLSPAN=7>&nbsp; + </TD> + </TR> + <TR> + <TD COLSPAN=7> + <FONT SIZE=4 FACE=ARIAL><B>SINGLE TURN</B></FONT> + </TD> + </TR> + <TR> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BOURNS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>BI&nbsp;TECH</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>DALE-VISHAY</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PHILIPS/MEPCO</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>PANASONIC</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>TOCOS</B></FONT> + </TD> + <TD> + <FONT SIZE=3 FACE=ARIAL><B>AUX/KYOCERA</B></FONT> + </TD> + </TR> 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name="025_050-055X075" package="C025_050-055X075"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="050-024X044" package="C050-024X044"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="050-025X075" package="C050-025X075"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="050-045X075" package="C050-045X075"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="050-030X075" package="C050-030X075"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="050-050X075" package="C050-050X075"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="050-055X075" package="C050-055X075"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="050-075X075" package="C050-075X075"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="050H075X075" package="C050H075X075"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="075-032X103" package="C075-032X103"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="075-042X103" package="C075-042X103"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="075-052X106" package="C075-052X106"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="102-043X133" package="C102-043X133"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="102-054X133" package="C102-054X133"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="102-064X133" package="C102-064X133"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="102_152-062X184" package="C102_152-062X184"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="150-054X183" package="C150-054X183"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="150-064X183" package="C150-064X183"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="150-072X183" package="C150-072X183"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="150-084X183" package="C150-084X183"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="150-091X182" package="C150-091X182"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="225-062X268" package="C225-062X268"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="225-074X268" package="C225-074X268"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="225-087X268" package="C225-087X268"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="225-108X268" package="C225-108X268"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="225-113X268" package="C225-113X268"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="275-093X316" package="C275-093X316"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="275-113X316" package="C275-113X316"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="275-134X316" package="C275-134X316"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="275-205X316" package="C275-205X316"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="325-137X374" package="C325-137X374"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="325-162X374" package="C325-162X374"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="325-182X374" package="C325-182X374"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="375-192X418" package="C375-192X418"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="375-203X418" package="C375-203X418"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="050-035X075" package="C050-035X075"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="375-155X418" package="C375-155X418"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="075-063X106" package="C075-063X106"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="275-154X316" package="C275-154X316"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="275-173X316" package="C275-173X316"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="C0402K" package="C0402K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="C0603K" package="C0603K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="C0805K" package="C0805K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="C1206K" package="C1206K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="C1210K" package="C1210K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="C1812K" package="C1812K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="C1825K" package="C1825K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="C2220K" package="C2220K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +<device name="C2225K" package="C2225K"> +<connects> +<connect gate="G$1" pin="1" pad="1"/> +<connect gate="G$1" pin="2" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +<library name="con-lstb"> +<description><b>Pin Headers</b><p> +Naming:<p> +MA = male<p> +# contacts - # rows<p> +W = angled<p> +<author>Created by librarian@cadsoft.de</author></description> +<packages> +<package name="MA06-1"> +<description><b>PIN HEADER</b></description> +<wire x1="-6.985" y1="1.27" x2="-5.715" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-5.715" y1="1.27" x2="-5.08" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-5.08" y1="-0.635" x2="-5.715" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-5.08" y1="0.635" x2="-4.445" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-4.445" y1="1.27" x2="-3.175" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-3.175" y1="1.27" x2="-2.54" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-2.54" y1="-0.635" x2="-3.175" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-3.175" y1="-1.27" x2="-4.445" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-4.445" y1="-1.27" x2="-5.08" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="-7.62" y1="0.635" x2="-7.62" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="-6.985" y1="1.27" x2="-7.62" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-7.62" y1="-0.635" x2="-6.985" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-5.715" y1="-1.27" x2="-6.985" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-2.54" y1="0.635" x2="-1.905" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-1.905" y1="1.27" x2="-0.635" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-0.635" y1="1.27" x2="0" y2="0.635" width="0.1524" layer="21"/> +<wire x1="0" y1="-0.635" x2="-0.635" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-0.635" y1="-1.27" x2="-1.905" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-1.905" y1="-1.27" x2="-2.54" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="0.635" y1="1.27" x2="1.905" y2="1.27" width="0.1524" layer="21"/> +<wire x1="1.905" y1="1.27" x2="2.54" y2="0.635" width="0.1524" layer="21"/> +<wire x1="2.54" y1="-0.635" x2="1.905" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="2.54" y1="0.635" x2="3.175" y2="1.27" width="0.1524" layer="21"/> +<wire x1="3.175" y1="1.27" x2="4.445" y2="1.27" width="0.1524" layer="21"/> +<wire x1="4.445" y1="1.27" x2="5.08" y2="0.635" width="0.1524" layer="21"/> +<wire x1="5.08" y1="-0.635" x2="4.445" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="4.445" y1="-1.27" x2="3.175" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="3.175" y1="-1.27" x2="2.54" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="0.635" y1="1.27" x2="0" y2="0.635" width="0.1524" layer="21"/> +<wire x1="0" y1="-0.635" x2="0.635" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="1.905" y1="-1.27" x2="0.635" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="5.08" y1="0.635" x2="5.715" y2="1.27" width="0.1524" layer="21"/> +<wire x1="5.715" y1="1.27" x2="6.985" y2="1.27" width="0.1524" layer="21"/> +<wire x1="6.985" y1="1.27" x2="7.62" y2="0.635" width="0.1524" layer="21"/> +<wire x1="7.62" y1="-0.635" x2="6.985" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="6.985" y1="-1.27" x2="5.715" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="5.715" y1="-1.27" x2="5.08" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="7.62" y1="0.635" x2="7.62" y2="-0.635" width="0.1524" layer="21"/> +<pad name="1" x="-6.35" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="2" x="-3.81" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="3" x="-1.27" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="4" x="1.27" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="5" x="3.81" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="6" x="6.35" y="0" drill="1.016" shape="long" rot="R90"/> +<text x="-7.62" y="1.651" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="-6.985" y="-2.921" size="1.27" layer="21" ratio="10">1</text> +<text x="5.715" y="1.651" size="1.27" layer="21" ratio="10">6</text> +<text x="-2.54" y="-2.921" size="1.27" layer="27" ratio="10">>VALUE</text> +<rectangle x1="-4.064" y1="-0.254" x2="-3.556" y2="0.254" layer="51"/> +<rectangle x1="-6.604" y1="-0.254" x2="-6.096" y2="0.254" layer="51"/> +<rectangle x1="-1.524" y1="-0.254" x2="-1.016" y2="0.254" layer="51"/> +<rectangle x1="3.556" y1="-0.254" x2="4.064" y2="0.254" layer="51"/> +<rectangle x1="1.016" y1="-0.254" x2="1.524" y2="0.254" layer="51"/> +<rectangle x1="6.096" y1="-0.254" x2="6.604" y2="0.254" layer="51"/> +</package> +</packages> +<symbols> +<symbol name="MA06-1"> +<wire x1="3.81" y1="-10.16" x2="-1.27" y2="-10.16" width="0.4064" layer="94"/> +<wire x1="1.27" y1="-2.54" x2="2.54" y2="-2.54" width="0.6096" layer="94"/> +<wire x1="1.27" y1="-5.08" x2="2.54" y2="-5.08" width="0.6096" layer="94"/> +<wire x1="1.27" y1="-7.62" x2="2.54" y2="-7.62" width="0.6096" layer="94"/> +<wire x1="1.27" y1="2.54" x2="2.54" y2="2.54" width="0.6096" layer="94"/> +<wire x1="1.27" y1="0" x2="2.54" y2="0" width="0.6096" layer="94"/> +<wire x1="1.27" y1="5.08" x2="2.54" y2="5.08" width="0.6096" layer="94"/> +<wire x1="-1.27" y1="7.62" x2="-1.27" y2="-10.16" width="0.4064" layer="94"/> +<wire x1="3.81" y1="-10.16" x2="3.81" y2="7.62" width="0.4064" layer="94"/> +<wire x1="-1.27" y1="7.62" x2="3.81" y2="7.62" width="0.4064" layer="94"/> +<text x="-1.27" y="-12.7" size="1.778" layer="96">>VALUE</text> +<text x="-1.27" y="8.382" size="1.778" layer="95">>NAME</text> +<pin name="1" x="7.62" y="-7.62" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="2" x="7.62" y="-5.08" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="3" x="7.62" y="-2.54" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="4" x="7.62" y="0" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="5" x="7.62" y="2.54" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="6" x="7.62" y="5.08" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="MA06-1" prefix="SV" uservalue="yes"> +<description><b>PIN HEADER</b></description> +<gates> +<gate name="1" symbol="MA06-1" x="0" y="0"/> +</gates> +<devices> +<device name="" package="MA06-1"> +<connects> +<connect gate="1" pin="1" pad="1"/> +<connect gate="1" pin="2" pad="2"/> +<connect gate="1" pin="3" pad="3"/> +<connect gate="1" pin="4" pad="4"/> +<connect gate="1" pin="5" pad="5"/> +<connect gate="1" pin="6" pad="6"/> +</connects> +<technologies> +<technology name=""> +<attribute name="MF" value="" constant="no"/> +<attribute name="MPN" value="" constant="no"/> +<attribute name="OC_FARNELL" value="unknown" constant="no"/> +<attribute name="OC_NEWARK" value="unknown" constant="no"/> +</technology> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</libraries> +<attributes> +</attributes> +<variantdefs> +</variantdefs> +<classes> +<class number="0" name="default" width="0" drill="0"> +</class> +</classes> +<parts> +<part name="IC1" library="74xx-eu" deviceset="74*165" device="D" technology="AC"/> +<part name="IC2" library="74xx-eu" deviceset="74*595" device="D" technology="HC"/> +<part name="IC3" library="74xx-eu" deviceset="74*595" device="D" technology="HC"/> +<part name="IC4" library="74xx-eu" deviceset="74*595" device="D" technology="HC"/> +<part name="IC5" library="memory-idt" deviceset="71256S" device=""/> +<part name="P+1" library="supply1" deviceset="VCC" device=""/> +<part name="X1" library="con-molex" deviceset="C-GRID-14" device="-70543"/> +<part name="X2" library="con-molex" deviceset="C-GRID-14" device="-70543"/> +<part name="P+2" library="supply1" deviceset="VCC" device=""/> +<part name="GND1" library="supply1" deviceset="GND" device=""/> +<part name="C1" library="resistor" deviceset="C-EU" device="C1206"/> +<part name="C2" library="resistor" deviceset="C-EU" device="C1206"/> +<part name="C3" library="resistor" deviceset="C-EU" device="C1206"/> +<part name="C4" library="resistor" deviceset="C-EU" device="C1206"/> +<part name="C5" library="resistor" deviceset="C-EU" device="C1206"/> +<part name="GND2" library="supply1" deviceset="GND" device=""/> +<part name="P+3" library="supply1" deviceset="VCC" device=""/> +<part name="SV1" library="con-lstb" deviceset="MA06-1" device=""/> +<part name="P+4" library="supply1" deviceset="VCC" device=""/> +<part name="GND3" library="supply1" deviceset="GND" device=""/> +<part name="GND4" library="supply1" deviceset="GND" device=""/> +</parts> +<sheets> +<sheet> +<plain> +</plain> +<instances> +<instance part="IC1" gate="A" x="162.56" y="83.82"/> +<instance part="IC2" gate="A" x="162.56" y="40.64" rot="R180"/> +<instance part="IC3" gate="A" x="45.72" y="88.9"/> +<instance part="IC4" gate="A" x="45.72" y="45.72"/> +<instance part="IC5" gate="G$1" x="101.6" y="55.88"/> +<instance part="P+1" gate="VCC" x="27.94" y="109.22"/> +<instance part="X1" gate="-1" x="91.44" y="142.24"/> +<instance part="X1" gate="-2" x="91.44" y="139.7"/> +<instance part="X1" gate="-3" x="91.44" y="137.16"/> +<instance part="X1" gate="-4" x="91.44" y="134.62"/> +<instance part="X1" gate="-5" x="91.44" y="132.08"/> +<instance part="X1" gate="-6" x="91.44" y="129.54"/> +<instance part="X1" gate="-7" x="91.44" y="127"/> +<instance part="X1" gate="-8" x="91.44" y="124.46"/> +<instance part="X1" gate="-9" x="91.44" y="121.92"/> +<instance part="X1" gate="-10" x="91.44" y="119.38"/> +<instance part="X1" gate="-11" x="91.44" y="116.84"/> +<instance part="X1" gate="-12" x="91.44" y="114.3"/> +<instance part="X1" gate="-13" x="91.44" y="111.76"/> +<instance part="X1" gate="-14" x="91.44" y="109.22"/> +<instance part="X2" gate="-1" x="111.76" y="109.22" rot="R180"/> +<instance part="X2" gate="-2" x="111.76" y="111.76" rot="R180"/> +<instance part="X2" gate="-3" x="111.76" y="114.3" rot="R180"/> +<instance part="X2" gate="-4" x="111.76" y="116.84" rot="R180"/> +<instance part="X2" gate="-5" x="111.76" y="119.38" rot="R180"/> +<instance part="X2" gate="-6" x="111.76" y="121.92" rot="R180"/> +<instance part="X2" gate="-7" x="111.76" y="124.46" rot="R180"/> +<instance part="X2" gate="-8" x="111.76" y="127" rot="R180"/> +<instance part="X2" gate="-9" x="111.76" y="129.54" rot="R180"/> +<instance part="X2" gate="-10" x="111.76" y="132.08" rot="R180"/> +<instance part="X2" gate="-11" x="111.76" y="134.62" rot="R180"/> +<instance part="X2" gate="-12" x="111.76" y="137.16" rot="R180"/> +<instance part="X2" gate="-13" x="111.76" y="139.7" rot="R180"/> +<instance part="X2" gate="-14" x="111.76" y="142.24" rot="R180"/> +<instance part="P+2" gate="VCC" x="116.84" y="147.32"/> +<instance part="GND1" gate="1" x="86.36" y="104.14"/> +<instance part="C1" gate="G$1" x="22.86" y="147.32"/> +<instance part="C2" gate="G$1" x="30.48" y="147.32"/> +<instance part="C3" gate="G$1" x="38.1" y="147.32"/> +<instance part="C4" gate="G$1" x="45.72" y="147.32"/> +<instance part="C5" gate="G$1" x="53.34" y="147.32"/> +<instance part="GND2" gate="1" x="58.42" y="134.62"/> +<instance part="P+3" gate="VCC" x="58.42" y="157.48"/> +<instance part="SV1" gate="1" x="-20.32" y="35.56"/> +<instance part="P+4" gate="VCC" x="-10.16" y="45.72"/> +<instance part="GND3" gate="1" x="-10.16" y="22.86"/> +<instance part="GND4" gate="1" x="137.16" y="66.04"/> +</instances> +<busses> +<bus name="D[0..7],A[0..14],!OE,!WE,!CS"> +<segment> +<wire x1="127" y1="27.94" x2="127" y2="99.06" width="0.762" layer="92"/> +</segment> +<segment> +<wire x1="63.5" y1="99.06" x2="63.5" y2="81.28" width="0.762" layer="92"/> +<wire x1="63.5" y1="81.28" x2="76.2" y2="81.28" width="0.762" layer="92"/> +<wire x1="76.2" y1="81.28" x2="76.2" y2="30.48" width="0.762" layer="92"/> +<wire x1="76.2" y1="30.48" x2="63.5" y2="30.48" width="0.762" layer="92"/> +<wire x1="63.5" y1="30.48" x2="63.5" y2="55.88" width="0.762" layer="92"/> +<wire x1="76.2" y1="142.24" x2="76.2" y2="109.22" width="0.762" layer="92"/> +<wire x1="127" y1="142.24" x2="127" y2="109.22" width="0.762" layer="92"/> +</segment> +</bus> +</busses> +<nets> +<net name="A1" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="QB"/> +<wire x1="58.42" y1="96.52" x2="63.5" y2="96.52" width="0.1524" layer="91"/> +<label x="58.42" y="96.52" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A1"/> +<wire x1="76.2" y1="76.2" x2="88.9" y2="76.2" width="0.1524" layer="91"/> +<label x="88.9" y="76.2" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-9" pin="S"/> +<wire x1="88.9" y1="121.92" x2="76.2" y2="121.92" width="0.1524" layer="91"/> +<label x="88.9" y="121.92" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="A0" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="QA"/> +<wire x1="58.42" y1="99.06" x2="63.5" y2="99.06" width="0.1524" layer="91"/> +<label x="58.42" y="99.06" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A0"/> +<wire x1="76.2" y1="78.74" x2="88.9" y2="78.74" width="0.1524" layer="91"/> +<label x="88.9" y="78.74" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-10" pin="S"/> +<wire x1="88.9" y1="119.38" x2="76.2" y2="119.38" width="0.1524" layer="91"/> +<label x="88.9" y="119.38" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="A3" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="QD"/> +<wire x1="63.5" y1="91.44" x2="58.42" y2="91.44" width="0.1524" layer="91"/> +<label x="58.42" y="91.44" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A3"/> +<wire x1="76.2" y1="71.12" x2="88.9" y2="71.12" width="0.1524" layer="91"/> +<label x="88.9" y="71.12" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-7" pin="S"/> +<wire x1="88.9" y1="127" x2="76.2" y2="127" width="0.1524" layer="91"/> +<label x="88.9" y="127" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="A2" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="QC"/> +<wire x1="63.5" y1="93.98" x2="58.42" y2="93.98" width="0.1524" layer="91"/> +<label x="58.42" y="93.98" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A2"/> +<wire x1="76.2" y1="73.66" x2="88.9" y2="73.66" width="0.1524" layer="91"/> +<label x="88.9" y="73.66" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-8" pin="S"/> +<wire x1="88.9" y1="124.46" x2="76.2" y2="124.46" width="0.1524" layer="91"/> +<label x="88.9" y="124.46" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="A4" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="QE"/> +<wire x1="63.5" y1="88.9" x2="58.42" y2="88.9" width="0.1524" layer="91"/> +<label x="58.42" y="88.9" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A4"/> +<wire x1="88.9" y1="68.58" x2="76.2" y2="68.58" width="0.1524" layer="91"/> +<label x="88.9" y="68.58" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-6" pin="S"/> +<wire x1="88.9" y1="129.54" x2="76.2" y2="129.54" width="0.1524" layer="91"/> +<label x="88.9" y="129.54" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="A5" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="QF"/> +<wire x1="63.5" y1="86.36" x2="58.42" y2="86.36" width="0.1524" layer="91"/> +<label x="58.42" y="86.36" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A5"/> +<wire x1="88.9" y1="66.04" x2="76.2" y2="66.04" width="0.1524" layer="91"/> +<label x="88.9" y="66.04" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-5" pin="S"/> +<wire x1="88.9" y1="132.08" x2="76.2" y2="132.08" width="0.1524" layer="91"/> +<label x="88.9" y="132.08" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="A6" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="QG"/> +<wire x1="63.5" y1="83.82" x2="58.42" y2="83.82" width="0.1524" layer="91"/> +<label x="58.42" y="83.82" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A6"/> +<wire x1="88.9" y1="63.5" x2="76.2" y2="63.5" width="0.1524" layer="91"/> +<label x="88.9" y="63.5" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-4" pin="S"/> +<wire x1="88.9" y1="134.62" x2="76.2" y2="134.62" width="0.1524" layer="91"/> +<label x="88.9" y="134.62" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="A7" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="QH"/> +<wire x1="63.5" y1="81.28" x2="58.42" y2="81.28" width="0.1524" layer="91"/> +<label x="58.42" y="81.28" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A7"/> +<wire x1="88.9" y1="60.96" x2="76.2" y2="60.96" width="0.1524" layer="91"/> +<label x="88.9" y="60.96" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-3" pin="S"/> +<wire x1="88.9" y1="137.16" x2="76.2" y2="137.16" width="0.1524" layer="91"/> +<label x="88.9" y="137.16" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="A8" class="0"> +<segment> +<pinref part="IC4" gate="A" pin="QA"/> +<wire x1="58.42" y1="55.88" x2="63.5" y2="55.88" width="0.1524" layer="91"/> +<label x="58.42" y="55.88" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A8"/> +<wire x1="88.9" y1="58.42" x2="76.2" y2="58.42" width="0.1524" layer="91"/> +<label x="88.9" y="58.42" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X2" gate="-11" pin="S"/> +<wire x1="114.3" y1="134.62" x2="127" y2="134.62" width="0.1524" layer="91"/> +<label x="114.3" y="134.62" size="1.778" layer="95"/> +</segment> +</net> +<net name="A9" class="0"> +<segment> +<pinref part="IC4" gate="A" pin="QB"/> +<wire x1="58.42" y1="53.34" x2="63.5" y2="53.34" width="0.1524" layer="91"/> +<label x="58.42" y="53.34" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A9"/> +<wire x1="88.9" y1="55.88" x2="76.2" y2="55.88" width="0.1524" layer="91"/> +<label x="88.9" y="55.88" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X2" gate="-10" pin="S"/> +<wire x1="114.3" y1="132.08" x2="127" y2="132.08" width="0.1524" layer="91"/> +<label x="114.3" y="132.08" size="1.778" layer="95"/> +</segment> +</net> +<net name="A10" class="0"> +<segment> +<pinref part="IC4" gate="A" pin="QC"/> +<wire x1="58.42" y1="50.8" x2="63.5" y2="50.8" width="0.1524" layer="91"/> +<label x="58.42" y="50.8" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A10"/> +<wire x1="88.9" y1="53.34" x2="76.2" y2="53.34" width="0.1524" layer="91"/> +<label x="88.9" y="53.34" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X2" gate="-7" pin="S"/> +<wire x1="114.3" y1="124.46" x2="127" y2="124.46" width="0.1524" layer="91"/> +<label x="114.3" y="124.46" size="1.778" layer="95"/> +</segment> +</net> +<net name="A11" class="0"> +<segment> +<pinref part="IC4" gate="A" pin="QD"/> +<wire x1="58.42" y1="48.26" x2="63.5" y2="48.26" width="0.1524" layer="91"/> +<label x="58.42" y="48.26" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A11"/> +<wire x1="88.9" y1="50.8" x2="76.2" y2="50.8" width="0.1524" layer="91"/> +<label x="88.9" y="50.8" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X2" gate="-9" pin="S"/> +<wire x1="114.3" y1="129.54" x2="127" y2="129.54" width="0.1524" layer="91"/> +<label x="114.3" y="129.54" size="1.778" layer="95"/> +</segment> +</net> +<net name="A12" class="0"> +<segment> +<pinref part="IC4" gate="A" pin="QE"/> +<wire x1="58.42" y1="45.72" x2="63.5" y2="45.72" width="0.1524" layer="91"/> +<label x="58.42" y="45.72" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A12"/> +<wire x1="88.9" y1="48.26" x2="76.2" y2="48.26" width="0.1524" layer="91"/> +<label x="88.9" y="48.26" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-2" pin="S"/> +<wire x1="76.2" y1="139.7" x2="88.9" y2="139.7" width="0.1524" layer="91"/> +<label x="88.9" y="139.7" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="A13" class="0"> +<segment> +<pinref part="IC4" gate="A" pin="QF"/> +<wire x1="58.42" y1="43.18" x2="63.5" y2="43.18" width="0.1524" layer="91"/> +<label x="58.42" y="43.18" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A13"/> +<wire x1="76.2" y1="45.72" x2="88.9" y2="45.72" width="0.1524" layer="91"/> +<label x="88.9" y="45.72" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X2" gate="-12" pin="S"/> +<wire x1="114.3" y1="137.16" x2="127" y2="137.16" width="0.1524" layer="91"/> +<label x="114.3" y="137.16" size="1.778" layer="95"/> +</segment> +</net> +<net name="A14" class="0"> +<segment> +<pinref part="IC4" gate="A" pin="QG"/> +<wire x1="58.42" y1="40.64" x2="63.5" y2="40.64" width="0.1524" layer="91"/> +<label x="58.42" y="40.64" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="A14"/> +<wire x1="88.9" y1="43.18" x2="76.2" y2="43.18" width="0.1524" layer="91"/> +<label x="88.9" y="43.18" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X1" gate="-1" pin="S"/> +<wire x1="88.9" y1="142.24" x2="76.2" y2="142.24" width="0.1524" layer="91"/> +<label x="88.9" y="142.24" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="N$1" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="QH*"/> +<wire x1="58.42" y1="76.2" x2="58.42" y2="66.04" width="0.1524" layer="91"/> +<wire x1="58.42" y1="66.04" x2="30.48" y2="66.04" width="0.1524" layer="91"/> +<wire x1="30.48" y1="66.04" x2="30.48" y2="55.88" width="0.1524" layer="91"/> +<pinref part="IC4" gate="A" pin="SER"/> +<wire x1="30.48" y1="55.88" x2="33.02" y2="55.88" width="0.1524" layer="91"/> +</segment> +</net> +<net name="A_EN" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="G"/> +<wire x1="33.02" y1="76.2" x2="22.86" y2="76.2" width="0.1524" layer="91"/> +<wire x1="22.86" y1="76.2" x2="22.86" y2="33.02" width="0.1524" layer="91"/> +<pinref part="IC4" gate="A" pin="G"/> +<wire x1="22.86" y1="33.02" x2="22.86" y2="30.48" width="0.1524" layer="91"/> +<wire x1="33.02" y1="33.02" x2="22.86" y2="33.02" width="0.1524" layer="91"/> +<label x="-10.16" y="30.48" size="1.778" layer="95"/> +<junction x="22.86" y="33.02"/> +<pinref part="SV1" gate="1" pin="2"/> +<wire x1="-12.7" y1="30.48" x2="22.86" y2="30.48" width="0.1524" layer="91"/> +</segment> +</net> +<net name="D0" class="0"> +<segment> +<pinref part="IC1" gate="A" pin="A"/> +<wire x1="127" y1="96.52" x2="149.86" y2="96.52" width="0.1524" layer="91"/> +<label x="137.16" y="96.52" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="QA"/> +<wire x1="127" y1="30.48" x2="149.86" y2="30.48" width="0.1524" layer="91"/> +<label x="137.16" y="30.48" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="I/O1"/> +<label x="116.84" y="78.74" size="1.778" layer="95"/> +<wire x1="114.3" y1="78.74" x2="127" y2="78.74" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="X1" gate="-11" pin="S"/> +<wire x1="88.9" y1="116.84" x2="76.2" y2="116.84" width="0.1524" layer="91"/> +<label x="88.9" y="116.84" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="D1" class="0"> +<segment> +<pinref part="IC1" gate="A" pin="B"/> +<wire x1="127" y1="93.98" x2="149.86" y2="93.98" width="0.1524" layer="91"/> +<label x="137.16" y="93.98" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="QB"/> +<wire x1="127" y1="33.02" x2="149.86" y2="33.02" width="0.1524" layer="91"/> +<label x="137.16" y="33.02" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="I/O2"/> +<label x="116.84" y="76.2" size="1.778" layer="95"/> +<wire x1="114.3" y1="76.2" x2="127" y2="76.2" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="X1" gate="-12" pin="S"/> +<wire x1="88.9" y1="114.3" x2="76.2" y2="114.3" width="0.1524" layer="91"/> +<label x="88.9" y="114.3" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="D2" class="0"> +<segment> +<pinref part="IC1" gate="A" pin="C"/> +<wire x1="127" y1="91.44" x2="149.86" y2="91.44" width="0.1524" layer="91"/> +<label x="137.16" y="91.44" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="QC"/> +<wire x1="127" y1="35.56" x2="149.86" y2="35.56" width="0.1524" layer="91"/> +<label x="137.16" y="35.56" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="I/O3"/> +<label x="116.84" y="73.66" size="1.778" layer="95"/> +<wire x1="114.3" y1="73.66" x2="127" y2="73.66" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="X1" gate="-13" pin="S"/> +<wire x1="88.9" y1="111.76" x2="76.2" y2="111.76" width="0.1524" layer="91"/> +<label x="88.9" y="111.76" size="1.778" layer="95" rot="MR0"/> +</segment> +</net> +<net name="D3" class="0"> +<segment> +<pinref part="IC1" gate="A" pin="D"/> +<wire x1="127" y1="88.9" x2="149.86" y2="88.9" width="0.1524" layer="91"/> +<label x="137.16" y="88.9" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="QD"/> +<wire x1="127" y1="38.1" x2="149.86" y2="38.1" width="0.1524" layer="91"/> +<label x="137.16" y="38.1" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="I/O4"/> +<label x="116.84" y="71.12" size="1.778" layer="95"/> +<wire x1="114.3" y1="71.12" x2="127" y2="71.12" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="X2" gate="-1" pin="S"/> +<wire x1="114.3" y1="109.22" x2="127" y2="109.22" width="0.1524" layer="91"/> +<label x="114.3" y="109.22" size="1.778" layer="95"/> +</segment> +</net> +<net name="D4" class="0"> +<segment> +<pinref part="IC1" gate="A" pin="E"/> +<wire x1="127" y1="86.36" x2="149.86" y2="86.36" width="0.1524" layer="91"/> +<label x="137.16" y="86.36" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="QE"/> +<wire x1="127" y1="40.64" x2="149.86" y2="40.64" width="0.1524" layer="91"/> +<label x="137.16" y="40.64" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="I/O5"/> +<label x="116.84" y="68.58" size="1.778" layer="95"/> +<wire x1="114.3" y1="68.58" x2="127" y2="68.58" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="X2" gate="-2" pin="S"/> +<wire x1="114.3" y1="111.76" x2="127" y2="111.76" width="0.1524" layer="91"/> +<label x="114.3" y="111.76" size="1.778" layer="95"/> +</segment> +</net> +<net name="D5" class="0"> +<segment> +<pinref part="IC1" gate="A" pin="F"/> +<wire x1="127" y1="83.82" x2="149.86" y2="83.82" width="0.1524" layer="91"/> +<label x="137.16" y="83.82" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="QF"/> +<wire x1="127" y1="43.18" x2="149.86" y2="43.18" width="0.1524" layer="91"/> +<label x="137.16" y="43.18" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="I/O6"/> +<label x="116.84" y="66.04" size="1.778" layer="95"/> +<wire x1="114.3" y1="66.04" x2="127" y2="66.04" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="X2" gate="-3" pin="S"/> +<wire x1="114.3" y1="114.3" x2="127" y2="114.3" width="0.1524" layer="91"/> +<label x="114.3" y="114.3" size="1.778" layer="95"/> +</segment> +</net> +<net name="D6" class="0"> +<segment> +<pinref part="IC1" gate="A" pin="G"/> +<wire x1="127" y1="81.28" x2="149.86" y2="81.28" width="0.1524" layer="91"/> +<label x="137.16" y="81.28" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="QG"/> +<wire x1="127" y1="45.72" x2="149.86" y2="45.72" width="0.1524" layer="91"/> +<label x="137.16" y="45.72" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="I/O7"/> +<label x="116.84" y="63.5" size="1.778" layer="95"/> +<wire x1="114.3" y1="63.5" x2="127" y2="63.5" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="X2" gate="-4" pin="S"/> +<wire x1="114.3" y1="116.84" x2="127" y2="116.84" width="0.1524" layer="91"/> +<label x="114.3" y="116.84" size="1.778" layer="95"/> +</segment> +</net> +<net name="D7" class="0"> +<segment> +<pinref part="IC1" gate="A" pin="H"/> +<wire x1="127" y1="78.74" x2="149.86" y2="78.74" width="0.1524" layer="91"/> +<label x="137.16" y="78.74" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="QH"/> +<wire x1="127" y1="48.26" x2="149.86" y2="48.26" width="0.1524" layer="91"/> +<label x="137.16" y="48.26" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC5" gate="G$1" pin="I/O8"/> +<label x="116.84" y="60.96" size="1.778" layer="95"/> +<wire x1="114.3" y1="60.96" x2="127" y2="60.96" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="X2" gate="-5" pin="S"/> +<wire x1="114.3" y1="119.38" x2="127" y2="119.38" width="0.1524" layer="91"/> +<label x="114.3" y="119.38" size="1.778" layer="95"/> +</segment> +</net> +<net name="N$2" class="0"> +<segment> +<pinref part="IC4" gate="A" pin="QH*"/> +<wire x1="58.42" y1="33.02" x2="60.96" y2="33.02" width="0.1524" layer="91"/> +<wire x1="60.96" y1="33.02" x2="60.96" y2="15.24" width="0.1524" layer="91"/> +<wire x1="60.96" y1="15.24" x2="180.34" y2="15.24" width="0.1524" layer="91"/> +<wire x1="180.34" y1="15.24" x2="180.34" y2="30.48" width="0.1524" layer="91"/> +<pinref part="IC2" gate="A" pin="SER"/> +<wire x1="180.34" y1="30.48" x2="175.26" y2="30.48" width="0.1524" layer="91"/> +</segment> +</net> +<net name="N$3" class="0"> +<segment> +<pinref part="IC2" gate="A" pin="QH*"/> +<wire x1="149.86" y1="53.34" x2="142.24" y2="53.34" width="0.1524" layer="91"/> +<wire x1="142.24" y1="53.34" x2="142.24" y2="99.06" width="0.1524" layer="91"/> +<pinref part="IC1" gate="A" pin="SER"/> +<wire x1="142.24" y1="99.06" x2="149.86" y2="99.06" width="0.1524" layer="91"/> +</segment> +</net> +<net name="D_IN" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="SER"/> +<wire x1="33.02" y1="99.06" x2="20.32" y2="99.06" width="0.1524" layer="91"/> +<wire x1="20.32" y1="99.06" x2="20.32" y2="33.02" width="0.1524" layer="91"/> +<label x="-10.16" y="33.02" size="1.778" layer="95"/> +<pinref part="SV1" gate="1" pin="3"/> +<wire x1="20.32" y1="33.02" x2="-12.7" y2="33.02" width="0.1524" layer="91"/> +</segment> +</net> +<net name="D_CLK" class="0"> +<segment> +<pinref part="IC3" gate="A" pin="SCK"/> +<wire x1="33.02" y1="93.98" x2="17.78" y2="93.98" width="0.1524" layer="91"/> +<wire x1="17.78" y1="93.98" x2="17.78" y2="50.8" width="0.1524" layer="91"/> +<pinref part="IC4" gate="A" pin="SCK"/> +<wire x1="17.78" y1="50.8" x2="33.02" y2="50.8" width="0.1524" layer="91"/> +<wire x1="17.78" y1="50.8" x2="17.78" y2="35.56" width="0.1524" layer="91"/> +<label x="-10.16" y="35.56" size="1.778" layer="95"/> +<wire x1="17.78" y1="35.56" x2="17.78" y2="7.62" width="0.1524" layer="91"/> +<wire x1="17.78" y1="7.62" x2="187.96" y2="7.62" width="0.1524" layer="91"/> +<wire x1="187.96" y1="7.62" x2="187.96" y2="35.56" width="0.1524" layer="91"/> +<pinref part="IC2" gate="A" pin="SCK"/> +<wire x1="175.26" y1="35.56" x2="187.96" y2="35.56" width="0.1524" layer="91"/> +<wire x1="187.96" y1="35.56" x2="187.96" y2="60.96" width="0.1524" layer="91"/> +<wire x1="187.96" y1="60.96" x2="144.78" y2="60.96" width="0.1524" layer="91"/> +<pinref part="IC1" gate="A" pin="CLK"/> +<wire x1="149.86" y1="73.66" x2="144.78" y2="73.66" width="0.1524" layer="91"/> +<wire x1="144.78" y1="73.66" x2="144.78" y2="60.96" width="0.1524" layer="91"/> +<junction x="187.96" y="35.56"/> +<pinref part="SV1" gate="1" pin="4"/> +<wire x1="-12.7" y1="35.56" x2="17.78" y2="35.56" width="0.1524" layer="91"/> +<junction x="17.78" y="35.56"/> +</segment> +</net> +<net name="N$5" class="0"> +<segment> +<pinref part="IC2" gate="A" pin="RCK"/> +<wire x1="175.26" y1="43.18" x2="185.42" y2="43.18" width="0.1524" layer="91"/> +<wire x1="185.42" y1="43.18" x2="185.42" y2="10.16" width="0.1524" layer="91"/> +<wire x1="185.42" y1="10.16" x2="25.4" y2="10.16" width="0.1524" layer="91"/> +<wire x1="25.4" y1="10.16" x2="25.4" y2="43.18" width="0.1524" layer="91"/> +<pinref part="IC4" gate="A" pin="RCK"/> +<wire x1="33.02" y1="43.18" x2="25.4" y2="43.18" width="0.1524" layer="91"/> +<pinref part="IC3" gate="A" pin="RCK"/> +<wire x1="33.02" y1="86.36" x2="25.4" y2="86.36" width="0.1524" layer="91"/> +<wire x1="25.4" y1="86.36" x2="25.4" y2="43.18" width="0.1524" layer="91"/> +<pinref part="IC1" gate="A" pin="SH/!LD"/> +<wire x1="149.86" y1="68.58" x2="147.32" y2="68.58" width="0.1524" layer="91"/> +<wire x1="147.32" y1="68.58" x2="147.32" y2="63.5" width="0.1524" layer="91"/> +<wire x1="147.32" y1="63.5" x2="185.42" y2="63.5" width="0.1524" layer="91"/> +<wire x1="185.42" y1="63.5" x2="185.42" y2="43.18" width="0.1524" layer="91"/> +<junction x="25.4" y="43.18"/> +<junction x="185.42" y="43.18"/> +</segment> +</net> +<net name="VCC" class="0"> +<segment> +<pinref part="IC4" gate="A" pin="SCL"/> +<wire x1="33.02" y1="48.26" x2="27.94" y2="48.26" width="0.1524" layer="91"/> +<wire x1="27.94" y1="48.26" x2="27.94" y2="91.44" width="0.1524" layer="91"/> +<pinref part="IC3" gate="A" pin="SCL"/> +<wire x1="27.94" y1="91.44" x2="27.94" y2="106.68" width="0.1524" layer="91"/> +<wire x1="33.02" y1="91.44" x2="27.94" y2="91.44" width="0.1524" layer="91"/> +<junction x="27.94" y="91.44"/> +<pinref part="P+1" gate="VCC" pin="VCC"/> +</segment> +<segment> +<pinref part="X2" gate="-14" pin="S"/> +<wire x1="114.3" y1="142.24" x2="116.84" y2="142.24" width="0.1524" layer="91"/> +<wire x1="116.84" y1="142.24" x2="116.84" y2="144.78" width="0.1524" layer="91"/> +<pinref part="P+2" gate="VCC" pin="VCC"/> +</segment> +<segment> +<pinref part="C1" gate="G$1" pin="1"/> +<wire x1="22.86" y1="149.86" x2="22.86" y2="152.4" width="0.1524" layer="91"/> +<pinref part="P+3" gate="VCC" pin="VCC"/> +<wire x1="22.86" y1="152.4" x2="30.48" y2="152.4" width="0.1524" layer="91"/> +<wire x1="30.48" y1="152.4" x2="38.1" y2="152.4" width="0.1524" layer="91"/> +<wire x1="38.1" y1="152.4" x2="45.72" y2="152.4" width="0.1524" layer="91"/> +<wire x1="45.72" y1="152.4" x2="53.34" y2="152.4" width="0.1524" layer="91"/> +<wire x1="53.34" y1="152.4" x2="58.42" y2="152.4" width="0.1524" layer="91"/> +<wire x1="58.42" y1="152.4" x2="58.42" y2="154.94" width="0.1524" layer="91"/> +<pinref part="C5" gate="G$1" pin="1"/> +<wire x1="53.34" y1="152.4" x2="53.34" y2="149.86" width="0.1524" layer="91"/> +<pinref part="C4" gate="G$1" pin="1"/> +<wire x1="45.72" y1="152.4" x2="45.72" y2="149.86" width="0.1524" layer="91"/> +<pinref part="C3" gate="G$1" pin="1"/> +<wire x1="38.1" y1="152.4" x2="38.1" y2="149.86" width="0.1524" layer="91"/> +<pinref part="C2" gate="G$1" pin="1"/> +<wire x1="30.48" y1="152.4" x2="30.48" y2="149.86" width="0.1524" layer="91"/> +<junction x="30.48" y="152.4"/> +<junction x="38.1" y="152.4"/> +<junction x="45.72" y="152.4"/> +<junction x="53.34" y="152.4"/> +</segment> +<segment> +<pinref part="SV1" gate="1" pin="6"/> +<pinref part="P+4" gate="VCC" pin="VCC"/> +<wire x1="-12.7" y1="40.64" x2="-10.16" y2="40.64" width="0.1524" layer="91"/> +<wire x1="-10.16" y1="40.64" x2="-10.16" y2="43.18" width="0.1524" layer="91"/> +</segment> +</net> +<net name="!WE" class="0"> +<segment> +<pinref part="IC5" gate="G$1" pin="!WE"/> +<wire x1="76.2" y1="35.56" x2="88.9" y2="35.56" width="0.1524" layer="91"/> +<label x="88.9" y="35.56" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X2" gate="-13" pin="S"/> +<wire x1="114.3" y1="139.7" x2="127" y2="139.7" width="0.1524" layer="91"/> +<label x="114.3" y="139.7" size="1.778" layer="95"/> +</segment> +</net> +<net name="!RAM_CS" class="0"> +<segment> +<pinref part="IC5" gate="G$1" pin="!CS"/> +<wire x1="76.2" y1="33.02" x2="88.9" y2="33.02" width="0.1524" layer="91"/> +<label x="88.9" y="33.02" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X2" gate="-6" pin="S"/> +<wire x1="114.3" y1="121.92" x2="127" y2="121.92" width="0.1524" layer="91"/> +<label x="114.3" y="121.92" size="1.778" layer="95"/> +</segment> +</net> +<net name="!OE" class="0"> +<segment> +<pinref part="IC5" gate="G$1" pin="!OE"/> +<wire x1="76.2" y1="38.1" x2="88.9" y2="38.1" width="0.1524" layer="91"/> +<label x="88.9" y="38.1" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X2" gate="-8" pin="S"/> +<wire x1="114.3" y1="127" x2="127" y2="127" width="0.1524" layer="91"/> +<label x="114.3" y="127" size="1.778" layer="95"/> +</segment> +</net> +<net name="GND" class="0"> +<segment> +<pinref part="X1" gate="-14" pin="S"/> +<wire x1="88.9" y1="109.22" x2="86.36" y2="109.22" width="0.1524" layer="91"/> +<wire x1="86.36" y1="109.22" x2="86.36" y2="106.68" width="0.1524" layer="91"/> +<pinref part="GND1" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="C1" gate="G$1" pin="2"/> +<wire x1="22.86" y1="142.24" x2="22.86" y2="139.7" width="0.1524" layer="91"/> +<wire x1="22.86" y1="139.7" x2="30.48" y2="139.7" width="0.1524" layer="91"/> +<wire x1="30.48" y1="139.7" x2="38.1" y2="139.7" width="0.1524" layer="91"/> +<wire x1="38.1" y1="139.7" x2="45.72" y2="139.7" width="0.1524" layer="91"/> +<wire x1="53.34" y1="139.7" x2="58.42" y2="139.7" width="0.1524" layer="91"/> +<wire x1="58.42" y1="139.7" x2="58.42" y2="137.16" width="0.1524" layer="91"/> +<pinref part="C5" gate="G$1" pin="2"/> +<wire x1="53.34" y1="142.24" x2="53.34" y2="139.7" width="0.1524" layer="91"/> +<pinref part="C4" gate="G$1" pin="2"/> +<wire x1="53.34" y1="139.7" x2="45.72" y2="139.7" width="0.1524" layer="91"/> +<wire x1="45.72" y1="139.7" x2="45.72" y2="142.24" width="0.1524" layer="91"/> +<pinref part="C2" gate="G$1" pin="2"/> +<wire x1="30.48" y1="142.24" x2="30.48" y2="139.7" width="0.1524" layer="91"/> +<pinref part="C3" gate="G$1" pin="2"/> +<wire x1="38.1" y1="142.24" x2="38.1" y2="139.7" width="0.1524" layer="91"/> +<junction x="30.48" y="139.7"/> +<junction x="38.1" y="139.7"/> +<junction x="53.34" y="139.7"/> +<junction x="45.72" y="139.7"/> +<pinref part="GND2" gate="1" pin="GND"/> +</segment> +<segment> +<pinref part="SV1" gate="1" pin="1"/> +<pinref part="GND3" gate="1" pin="GND"/> +<wire x1="-12.7" y1="27.94" x2="-10.16" y2="27.94" width="0.1524" layer="91"/> +<wire x1="-10.16" y1="27.94" x2="-10.16" y2="25.4" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="IC1" gate="A" pin="INH"/> +<pinref part="GND4" gate="1" pin="GND"/> +<wire x1="149.86" y1="71.12" x2="137.16" y2="71.12" width="0.1524" layer="91"/> +<wire x1="137.16" y1="71.12" x2="137.16" y2="68.58" width="0.1524" layer="91"/> +</segment> +</net> +<net name="D_OUT" class="0"> +<segment> +<pinref part="SV1" gate="1" pin="5"/> +<wire x1="-12.7" y1="38.1" x2="15.24" y2="38.1" width="0.1524" layer="91"/> +<wire x1="15.24" y1="38.1" x2="15.24" y2="5.08" width="0.1524" layer="91"/> +<wire x1="15.24" y1="5.08" x2="190.5" y2="5.08" width="0.1524" layer="91"/> +<wire x1="190.5" y1="5.08" x2="190.5" y2="96.52" width="0.1524" layer="91"/> +<pinref part="IC1" gate="A" pin="QH"/> +<wire x1="190.5" y1="96.52" x2="175.26" y2="96.52" width="0.1524" layer="91"/> +<label x="-10.16" y="38.1" size="1.778" layer="95"/> +<label x="177.8" y="96.52" size="1.778" layer="95"/> +</segment> +</net> +</nets> +</sheet> +</sheets> +</schematic> +</drawing> +</eagle> diff --git a/hardware/ram-ice.brd b/hardware/ram-ice.brd index e31fae3..4bdd1e2 100644 --- a/hardware/ram-ice.brd +++ b/hardware/ram-ice.brd @@ -6,7 +6,7 @@ <setting alwaysvectorfont="no"/> <setting verticaltext="up"/> </settings> -<grid distance="25" unitdist="mil" unit="mil" style="lines" multiple="1" display="yes" altdistance="0.000000123031" altunitdist="inch" altunit="inch"/> +<grid distance="0.635" unitdist="mm" unit="mm" style="lines" multiple="1" display="yes" altdistance="0.000000123031" altunitdist="inch" altunit="inch"/> <layers> <layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> <layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> @@ -1356,62 +1356,94 @@ MA = male<p> W = angled<p> <author>Created by librarian@cadsoft.de</author></description> <packages> -<package name="MA06-1"> +<package name="MA10-1"> <description><b>PIN HEADER</b></description> +<wire x1="-12.065" y1="1.27" x2="-10.795" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-10.795" y1="1.27" x2="-10.16" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-10.16" y1="-0.635" x2="-10.795" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-10.16" y1="0.635" x2="-9.525" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-9.525" y1="1.27" x2="-8.255" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-8.255" y1="1.27" x2="-7.62" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-7.62" y1="-0.635" x2="-8.255" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-8.255" y1="-1.27" x2="-9.525" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-9.525" y1="-1.27" x2="-10.16" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="-12.7" y1="0.635" x2="-12.7" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="-12.065" y1="1.27" x2="-12.7" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-12.7" y1="-0.635" x2="-12.065" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-10.795" y1="-1.27" x2="-12.065" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-7.62" y1="0.635" x2="-6.985" y2="1.27" width="0.1524" layer="21"/> <wire x1="-6.985" y1="1.27" x2="-5.715" y2="1.27" width="0.1524" layer="21"/> <wire x1="-5.715" y1="1.27" x2="-5.08" y2="0.635" width="0.1524" layer="21"/> <wire x1="-5.08" y1="-0.635" x2="-5.715" y2="-1.27" width="0.1524" layer="21"/> -<wire x1="-5.08" y1="0.635" x2="-4.445" y2="1.27" width="0.1524" layer="21"/> +<wire x1="-5.715" y1="-1.27" x2="-6.985" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-6.985" y1="-1.27" x2="-7.62" y2="-0.635" width="0.1524" layer="21"/> <wire x1="-4.445" y1="1.27" x2="-3.175" y2="1.27" width="0.1524" layer="21"/> <wire x1="-3.175" y1="1.27" x2="-2.54" y2="0.635" width="0.1524" layer="21"/> <wire x1="-2.54" y1="-0.635" x2="-3.175" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-4.445" y1="1.27" x2="-5.08" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-5.08" y1="-0.635" x2="-4.445" y2="-1.27" width="0.1524" layer="21"/> <wire x1="-3.175" y1="-1.27" x2="-4.445" y2="-1.27" width="0.1524" layer="21"/> -<wire x1="-4.445" y1="-1.27" x2="-5.08" y2="-0.635" width="0.1524" layer="21"/> -<wire x1="-7.62" y1="0.635" x2="-7.62" y2="-0.635" width="0.1524" layer="21"/> -<wire x1="-6.985" y1="1.27" x2="-7.62" y2="0.635" width="0.1524" layer="21"/> -<wire x1="-7.62" y1="-0.635" x2="-6.985" y2="-1.27" width="0.1524" layer="21"/> -<wire x1="-5.715" y1="-1.27" x2="-6.985" y2="-1.27" width="0.1524" layer="21"/> -<wire x1="-2.54" y1="0.635" x2="-1.905" y2="1.27" width="0.1524" layer="21"/> <wire x1="-1.905" y1="1.27" x2="-0.635" y2="1.27" width="0.1524" layer="21"/> <wire x1="-0.635" y1="1.27" x2="0" y2="0.635" width="0.1524" layer="21"/> <wire x1="0" y1="-0.635" x2="-0.635" y2="-1.27" width="0.1524" layer="21"/> -<wire x1="-0.635" y1="-1.27" x2="-1.905" y2="-1.27" width="0.1524" layer="21"/> -<wire x1="-1.905" y1="-1.27" x2="-2.54" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="0" y1="0.635" x2="0.635" y2="1.27" width="0.1524" layer="21"/> <wire x1="0.635" y1="1.27" x2="1.905" y2="1.27" width="0.1524" layer="21"/> <wire x1="1.905" y1="1.27" x2="2.54" y2="0.635" width="0.1524" layer="21"/> <wire x1="2.54" y1="-0.635" x2="1.905" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="1.905" y1="-1.27" x2="0.635" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="0.635" y1="-1.27" x2="0" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="-1.905" y1="1.27" x2="-2.54" y2="0.635" width="0.1524" layer="21"/> +<wire x1="-2.54" y1="-0.635" x2="-1.905" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="-0.635" y1="-1.27" x2="-1.905" y2="-1.27" width="0.1524" layer="21"/> <wire x1="2.54" y1="0.635" x2="3.175" y2="1.27" width="0.1524" layer="21"/> <wire x1="3.175" y1="1.27" x2="4.445" y2="1.27" width="0.1524" layer="21"/> <wire x1="4.445" y1="1.27" x2="5.08" y2="0.635" width="0.1524" layer="21"/> <wire x1="5.08" y1="-0.635" x2="4.445" y2="-1.27" width="0.1524" layer="21"/> <wire x1="4.445" y1="-1.27" x2="3.175" y2="-1.27" width="0.1524" layer="21"/> <wire x1="3.175" y1="-1.27" x2="2.54" y2="-0.635" width="0.1524" layer="21"/> -<wire x1="0.635" y1="1.27" x2="0" y2="0.635" width="0.1524" layer="21"/> -<wire x1="0" y1="-0.635" x2="0.635" y2="-1.27" width="0.1524" layer="21"/> -<wire x1="1.905" y1="-1.27" x2="0.635" y2="-1.27" width="0.1524" layer="21"/> -<wire x1="5.08" y1="0.635" x2="5.715" y2="1.27" width="0.1524" layer="21"/> <wire x1="5.715" y1="1.27" x2="6.985" y2="1.27" width="0.1524" layer="21"/> <wire x1="6.985" y1="1.27" x2="7.62" y2="0.635" width="0.1524" layer="21"/> <wire x1="7.62" y1="-0.635" x2="6.985" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="5.715" y1="1.27" x2="5.08" y2="0.635" width="0.1524" layer="21"/> +<wire x1="5.08" y1="-0.635" x2="5.715" y2="-1.27" width="0.1524" layer="21"/> <wire x1="6.985" y1="-1.27" x2="5.715" y2="-1.27" width="0.1524" layer="21"/> -<wire x1="5.715" y1="-1.27" x2="5.08" y2="-0.635" width="0.1524" layer="21"/> -<wire x1="7.62" y1="0.635" x2="7.62" y2="-0.635" width="0.1524" layer="21"/> -<pad name="1" x="-6.35" y="0" drill="1.016" shape="long" rot="R90"/> -<pad name="2" x="-3.81" y="0" drill="1.016" shape="long" rot="R90"/> -<pad name="3" x="-1.27" y="0" drill="1.016" shape="long" rot="R90"/> -<pad name="4" x="1.27" y="0" drill="1.016" shape="long" rot="R90"/> -<pad name="5" x="3.81" y="0" drill="1.016" shape="long" rot="R90"/> -<pad name="6" x="6.35" y="0" drill="1.016" shape="long" rot="R90"/> -<text x="-7.62" y="1.651" size="1.27" layer="25" ratio="10">>NAME</text> -<text x="-6.985" y="-2.921" size="1.27" layer="21" ratio="10">1</text> -<text x="5.715" y="1.651" size="1.27" layer="21" ratio="10">6</text> -<text x="-2.54" y="-2.921" size="1.27" layer="27" ratio="10">>VALUE</text> -<rectangle x1="-4.064" y1="-0.254" x2="-3.556" y2="0.254" layer="51"/> +<wire x1="8.255" y1="1.27" x2="9.525" y2="1.27" width="0.1524" layer="21"/> +<wire x1="9.525" y1="1.27" x2="10.16" y2="0.635" width="0.1524" layer="21"/> +<wire x1="10.16" y1="-0.635" x2="9.525" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="10.16" y1="0.635" x2="10.795" y2="1.27" width="0.1524" layer="21"/> +<wire x1="10.795" y1="1.27" x2="12.065" y2="1.27" width="0.1524" layer="21"/> +<wire x1="12.065" y1="1.27" x2="12.7" y2="0.635" width="0.1524" layer="21"/> +<wire x1="12.7" y1="-0.635" x2="12.065" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="12.065" y1="-1.27" x2="10.795" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="10.795" y1="-1.27" x2="10.16" y2="-0.635" width="0.1524" layer="21"/> +<wire x1="8.255" y1="1.27" x2="7.62" y2="0.635" width="0.1524" layer="21"/> +<wire x1="7.62" y1="-0.635" x2="8.255" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="9.525" y1="-1.27" x2="8.255" y2="-1.27" width="0.1524" layer="21"/> +<wire x1="12.7" y1="0.635" x2="12.7" y2="-0.635" width="0.1524" layer="21"/> +<pad name="1" x="-11.43" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="2" x="-8.89" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="3" x="-6.35" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="4" x="-3.81" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="5" x="-1.27" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="6" x="1.27" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="7" x="3.81" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="8" x="6.35" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="9" x="8.89" y="0" drill="1.016" shape="long" rot="R90"/> +<pad name="10" x="11.43" y="0" drill="1.016" shape="long" rot="R90"/> +<text x="-12.7" y="1.651" size="1.27" layer="25" ratio="10">>NAME</text> +<text x="-11.938" y="-2.921" size="1.27" layer="21" ratio="10">1</text> +<text x="10.795" y="1.651" size="1.27" layer="21" ratio="10">10</text> +<text x="1.27" y="-2.921" size="1.27" layer="27" ratio="10">>VALUE</text> +<rectangle x1="-9.144" y1="-0.254" x2="-8.636" y2="0.254" layer="51"/> +<rectangle x1="-11.684" y1="-0.254" x2="-11.176" y2="0.254" layer="51"/> <rectangle x1="-6.604" y1="-0.254" x2="-6.096" y2="0.254" layer="51"/> +<rectangle x1="-4.064" y1="-0.254" x2="-3.556" y2="0.254" layer="51"/> +<rectangle x1="1.016" y1="-0.254" x2="1.524" y2="0.254" layer="51"/> <rectangle x1="-1.524" y1="-0.254" x2="-1.016" y2="0.254" layer="51"/> <rectangle x1="3.556" y1="-0.254" x2="4.064" y2="0.254" layer="51"/> -<rectangle x1="1.016" y1="-0.254" x2="1.524" y2="0.254" layer="51"/> <rectangle x1="6.096" y1="-0.254" x2="6.604" y2="0.254" layer="51"/> +<rectangle x1="11.176" y1="-0.254" x2="11.684" y2="0.254" layer="51"/> +<rectangle x1="8.636" y1="-0.254" x2="9.144" y2="0.254" layer="51"/> </package> </packages> </library> @@ -1595,38 +1627,38 @@ design rules under a new name. </pass> </autorouter> <elements> -<element name="IC1" library="74xx-eu" package="SO16" value="74AC165D" x="49.53" y="45.085" rot="R270"/> -<element name="IC2" library="74xx-eu" package="SO16" value="74HC595D" x="16.51" y="38.735" rot="R90"/> -<element name="IC3" library="74xx-eu" package="SO16" value="74HC595D" x="81.915" y="20.32" rot="R270"/> -<element name="IC4" library="74xx-eu" package="SO16" value="74HC595D" x="16.51" y="15.24" rot="R90"/> -<element name="IC5" library="memory-idt" package="SO28-3" value="" x="49.53" y="22.86" rot="R90"> -<attribute name="OC_NEWARK" value="34M6449" x="49.53" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> -<attribute name="MPN" value="IDT71256SA20YG" x="49.53" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> -<attribute name="MF" value="" x="49.53" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> -<attribute name="OC_FARNELL" value="1218010" x="49.53" y="22.86" size="1.778" layer="27" rot="R90" display="off"/> +<element name="IC1" library="74xx-eu" package="SO16" value="74AC165D" x="54.61" y="51.435" rot="R270"/> +<element name="IC2" library="74xx-eu" package="SO16" value="74HC595D" x="21.59" y="45.085" rot="R90"/> +<element name="IC3" library="74xx-eu" package="SO16" value="74HC595D" x="86.995" y="26.67" rot="R270"/> +<element name="IC4" library="74xx-eu" package="SO16" value="74HC595D" x="21.59" y="21.59" rot="R90"/> +<element name="IC5" library="memory-idt" package="SO28-3" value="" x="54.61" y="29.21" rot="R90"> +<attribute name="OC_NEWARK" value="34M6449" x="54.61" y="29.21" size="1.778" layer="27" rot="R90" display="off"/> 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display="off"/> +<element name="X2" library="con-molex" package="70543-14" value="C-GRID-14-70543" x="41.91" y="29.21" rot="R270"> +<attribute name="OC_NEWARK" value="unknown" x="41.91" y="29.21" size="1.778" layer="27" rot="R270" display="off"/> +<attribute name="MPN" value="" x="41.91" y="29.21" size="1.778" layer="27" rot="R270" display="off"/> +<attribute name="MF" value="" x="41.91" y="29.21" size="1.778" layer="27" rot="R270" display="off"/> +<attribute name="OC_FARNELL" value="unknown" x="41.91" y="29.21" size="1.778" layer="27" rot="R270" display="off"/> </element> -<element name="C1" library="resistor" package="C1206" value="" x="16.51" y="7.62"/> -<element name="C2" library="resistor" package="C1206" value="" x="16.51" y="31.115"/> -<element name="C3" library="resistor" package="C1206" value="" x="49.53" y="52.07" rot="R180"/> -<element name="C4" library="resistor" package="C1206" value="" x="81.915" y="12.7" rot="R180"/> -<element name="C5" library="resistor" package="C1206" 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width="0.4064" layer="94"/> +<wire x1="-1.27" y1="15.24" x2="3.81" y2="15.24" width="0.4064" layer="94"/> +<text x="-1.27" y="-15.24" size="1.778" layer="96">>VALUE</text> +<text x="-1.27" y="16.002" size="1.778" layer="95">>NAME</text> +<pin name="1" x="7.62" y="-10.16" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="2" x="7.62" y="-7.62" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="3" x="7.62" y="-5.08" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="4" x="7.62" y="-2.54" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="5" x="7.62" y="0" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="6" x="7.62" y="2.54" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="7" x="7.62" y="5.08" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="8" x="7.62" y="7.62" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="9" x="7.62" y="10.16" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> +<pin name="10" x="7.62" y="12.7" visible="pad" length="middle" direction="pas" swaplevel="1" rot="R180"/> </symbol> </symbols> <devicesets> -<deviceset name="MA06-1" prefix="SV" uservalue="yes"> +<deviceset name="MA10-1" prefix="SV" uservalue="yes"> <description><b>PIN HEADER</b></description> <gates> -<gate name="1" symbol="MA06-1" x="0" y="0"/> +<gate name="1" symbol="MA10-1" x="0" y="0"/> </gates> <devices> -<device name="" package="MA06-1"> +<device name="" package="MA10-1"> <connects> <connect gate="1" pin="1" pad="1"/> +<connect gate="1" pin="10" pad="10"/> <connect gate="1" pin="2" pad="2"/> <connect gate="1" pin="3" pad="3"/> <connect gate="1" pin="4" pad="4"/> <connect gate="1" pin="5" pad="5"/> <connect gate="1" pin="6" pad="6"/> +<connect gate="1" pin="7" pad="7"/> +<connect gate="1" pin="8" pad="8"/> +<connect gate="1" pin="9" pad="9"/> </connects> <technologies> <technology name=""> @@ -4707,77 +4751,84 @@ W = angled<p> <part name="C5" library="resistor" deviceset="C-EU" device="C1206"/> <part name="GND2" library="supply1" deviceset="GND" device=""/> <part name="P+3" library="supply1" deviceset="VCC" device=""/> -<part name="SV1" library="con-lstb" deviceset="MA06-1" device=""/> +<part name="SV1" library="con-lstb" deviceset="MA10-1" device=""/> <part name="P+4" library="supply1" deviceset="VCC" device=""/> <part name="GND3" library="supply1" deviceset="GND" device=""/> <part name="GND4" library="supply1" deviceset="GND" device=""/> +<part name="GND5" library="supply1" deviceset="GND" device=""/> </parts> <sheets> <sheet> <plain> </plain> <instances> -<instance part="IC1" gate="A" x="162.56" y="83.82"/> -<instance part="IC2" gate="A" x="162.56" y="40.64" rot="R180"/> -<instance part="IC3" gate="A" x="45.72" y="88.9"/> -<instance part="IC4" gate="A" x="45.72" y="45.72"/> -<instance part="IC5" gate="G$1" x="101.6" y="55.88"/> -<instance part="P+1" gate="VCC" x="27.94" y="109.22"/> -<instance part="X1" gate="-1" x="91.44" y="142.24"/> -<instance part="X1" gate="-2" x="91.44" y="139.7"/> -<instance part="X1" gate="-3" x="91.44" y="137.16"/> -<instance part="X1" gate="-4" x="91.44" y="134.62"/> -<instance part="X1" gate="-5" x="91.44" y="132.08"/> -<instance part="X1" gate="-6" x="91.44" y="129.54"/> -<instance part="X1" gate="-7" x="91.44" y="127"/> -<instance part="X1" gate="-8" x="91.44" y="124.46"/> -<instance part="X1" gate="-9" x="91.44" y="121.92"/> -<instance part="X1" gate="-10" x="91.44" y="119.38"/> -<instance part="X1" gate="-11" x="91.44" y="116.84"/> -<instance part="X1" gate="-12" x="91.44" y="114.3"/> -<instance part="X1" gate="-13" x="91.44" y="111.76"/> -<instance part="X1" gate="-14" x="91.44" y="109.22"/> -<instance part="X2" gate="-1" x="111.76" y="109.22" rot="R180"/> -<instance part="X2" gate="-2" x="111.76" y="111.76" rot="R180"/> -<instance part="X2" gate="-3" x="111.76" y="114.3" rot="R180"/> -<instance part="X2" gate="-4" x="111.76" y="116.84" rot="R180"/> -<instance part="X2" gate="-5" x="111.76" y="119.38" rot="R180"/> -<instance part="X2" gate="-6" x="111.76" y="121.92" rot="R180"/> -<instance part="X2" gate="-7" x="111.76" y="124.46" rot="R180"/> -<instance part="X2" gate="-8" x="111.76" y="127" rot="R180"/> -<instance part="X2" gate="-9" x="111.76" y="129.54" rot="R180"/> -<instance part="X2" gate="-10" x="111.76" y="132.08" rot="R180"/> -<instance part="X2" gate="-11" x="111.76" y="134.62" rot="R180"/> -<instance part="X2" gate="-12" x="111.76" y="137.16" rot="R180"/> -<instance part="X2" gate="-13" x="111.76" y="139.7" rot="R180"/> -<instance part="X2" gate="-14" x="111.76" y="142.24" rot="R180"/> -<instance part="P+2" gate="VCC" x="116.84" y="147.32"/> -<instance part="GND1" gate="1" x="86.36" y="104.14"/> -<instance part="C1" gate="G$1" x="22.86" y="147.32"/> -<instance part="C2" gate="G$1" x="30.48" y="147.32"/> -<instance part="C3" gate="G$1" x="38.1" y="147.32"/> -<instance part="C4" gate="G$1" x="45.72" y="147.32"/> -<instance part="C5" gate="G$1" x="53.34" y="147.32"/> -<instance part="GND2" gate="1" x="58.42" y="134.62"/> -<instance part="P+3" gate="VCC" x="58.42" y="157.48"/> -<instance part="SV1" gate="1" x="-20.32" y="35.56"/> -<instance part="P+4" gate="VCC" x="-10.16" y="45.72"/> -<instance part="GND3" gate="1" x="-10.16" y="22.86"/> -<instance part="GND4" gate="1" x="137.16" y="66.04"/> +<instance part="IC1" gate="A" x="187.96" y="81.28"/> +<instance part="IC2" gate="A" x="187.96" y="38.1" rot="R180"/> +<instance part="IC3" gate="A" x="71.12" y="86.36"/> +<instance part="IC4" gate="A" x="71.12" y="43.18"/> +<instance part="IC5" gate="G$1" x="127" y="53.34"/> +<instance part="P+1" gate="VCC" x="53.34" y="106.68"/> +<instance part="X1" gate="-1" x="116.84" y="139.7"/> +<instance part="X1" gate="-2" x="116.84" y="137.16"/> +<instance part="X1" gate="-3" x="116.84" y="134.62"/> +<instance part="X1" gate="-4" x="116.84" y="132.08"/> +<instance part="X1" gate="-5" x="116.84" y="129.54"/> +<instance part="X1" gate="-6" x="116.84" y="127"/> +<instance part="X1" gate="-7" x="116.84" y="124.46"/> +<instance part="X1" gate="-8" x="116.84" y="121.92"/> +<instance part="X1" gate="-9" x="116.84" y="119.38"/> +<instance part="X1" gate="-10" x="116.84" y="116.84"/> +<instance part="X1" gate="-11" x="116.84" y="114.3"/> +<instance part="X1" gate="-12" x="116.84" y="111.76"/> +<instance part="X1" gate="-13" x="116.84" y="109.22"/> +<instance part="X1" gate="-14" x="116.84" y="106.68"/> +<instance part="X2" gate="-1" x="137.16" y="106.68" rot="R180"/> +<instance part="X2" gate="-2" x="137.16" y="109.22" rot="R180"/> +<instance part="X2" gate="-3" x="137.16" y="111.76" rot="R180"/> +<instance part="X2" gate="-4" x="137.16" y="114.3" rot="R180"/> +<instance part="X2" gate="-5" x="137.16" y="116.84" rot="R180"/> +<instance part="X2" gate="-6" x="137.16" y="119.38" rot="R180"/> +<instance part="X2" gate="-7" x="137.16" y="121.92" rot="R180"/> +<instance part="X2" gate="-8" x="137.16" y="124.46" rot="R180"/> +<instance part="X2" gate="-9" x="137.16" y="127" rot="R180"/> +<instance part="X2" gate="-10" x="137.16" y="129.54" rot="R180"/> +<instance part="X2" gate="-11" x="137.16" y="132.08" rot="R180"/> +<instance part="X2" gate="-12" x="137.16" y="134.62" rot="R180"/> +<instance part="X2" gate="-13" x="137.16" y="137.16" rot="R180"/> +<instance part="X2" gate="-14" x="137.16" y="139.7" rot="R180"/> +<instance part="P+2" gate="VCC" x="142.24" y="144.78"/> +<instance part="GND1" gate="1" x="111.76" y="101.6"/> +<instance part="C1" gate="G$1" x="48.26" y="144.78"/> +<instance part="C2" gate="G$1" x="55.88" y="144.78"/> +<instance part="C3" gate="G$1" x="63.5" y="144.78"/> +<instance part="C4" gate="G$1" x="71.12" y="144.78"/> +<instance part="C5" gate="G$1" x="78.74" y="144.78"/> +<instance part="GND2" gate="1" x="83.82" y="132.08"/> +<instance part="P+3" gate="VCC" x="83.82" y="154.94"/> +<instance part="SV1" gate="1" x="5.08" y="33.02"/> +<instance part="P+4" gate="VCC" x="15.24" y="50.8"/> +<instance part="GND3" gate="1" x="15.24" y="17.78"/> +<instance part="GND4" gate="1" x="162.56" y="63.5"/> +<instance part="GND5" gate="1" x="205.74" y="17.78"/> </instances> <busses> -<bus name="D[0..7],A[0..14],!OE,!WE,!CS"> +<bus name="D[0..7],A[0..14],!RAM_OE,!RAM_WE,!RAM_CS"> <segment> -<wire x1="127" y1="27.94" x2="127" y2="99.06" width="0.762" layer="92"/> +<wire x1="152.4" y1="25.4" x2="152.4" y2="96.52" width="0.762" layer="92"/> </segment> +</bus> +<bus name="D[0..7],A[0..14],BIT_IN,BIT_OUT,BIT_CLK,BYTE_CLK,!CTRL_OE,!RAM_OE,!RAM_WE,!RAM_CS"> <segment> -<wire x1="63.5" y1="99.06" x2="63.5" y2="81.28" width="0.762" layer="92"/> -<wire x1="63.5" y1="81.28" x2="76.2" y2="81.28" width="0.762" layer="92"/> -<wire x1="76.2" y1="81.28" x2="76.2" y2="30.48" width="0.762" layer="92"/> -<wire x1="76.2" y1="30.48" x2="63.5" y2="30.48" width="0.762" layer="92"/> -<wire x1="63.5" y1="30.48" x2="63.5" y2="55.88" width="0.762" layer="92"/> -<wire x1="76.2" y1="142.24" x2="76.2" y2="109.22" width="0.762" layer="92"/> -<wire x1="127" y1="142.24" x2="127" y2="109.22" width="0.762" layer="92"/> +<wire x1="88.9" y1="96.52" x2="88.9" y2="78.74" width="0.762" layer="92"/> +<wire x1="88.9" y1="78.74" x2="101.6" y2="78.74" width="0.762" layer="92"/> +<wire x1="101.6" y1="78.74" x2="101.6" y2="27.94" width="0.762" layer="92"/> +<wire x1="101.6" y1="27.94" x2="88.9" y2="27.94" width="0.762" layer="92"/> +<wire x1="88.9" y1="27.94" x2="88.9" y2="53.34" width="0.762" layer="92"/> +<wire x1="101.6" y1="139.7" x2="101.6" y2="106.68" width="0.762" layer="92"/> +<wire x1="152.4" y1="139.7" x2="152.4" y2="106.68" width="0.762" layer="92"/> +<wire x1="38.1" y1="96.52" x2="38.1" y2="10.16" width="0.762" layer="92"/> +<wire x1="38.1" y1="10.16" x2="210.82" y2="10.16" width="0.762" layer="92"/> +<wire x1="210.82" y1="10.16" x2="210.82" y2="99.06" width="0.762" layer="92"/> </segment> </bus> </busses> @@ -4785,671 +4836,700 @@ W = angled<p> <net name="A1" class="0"> <segment> <pinref part="IC3" gate="A" pin="QB"/> -<wire x1="58.42" y1="96.52" x2="63.5" y2="96.52" width="0.1524" layer="91"/> -<label x="58.42" y="96.52" size="1.778" layer="95"/> +<wire x1="83.82" y1="93.98" x2="88.9" y2="93.98" width="0.1524" layer="91"/> +<label x="83.82" y="93.98" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A1"/> -<wire x1="76.2" y1="76.2" x2="88.9" y2="76.2" width="0.1524" layer="91"/> -<label x="88.9" y="76.2" size="1.778" layer="95" rot="MR0"/> +<wire x1="101.6" y1="73.66" x2="114.3" y2="73.66" width="0.1524" layer="91"/> +<label x="114.3" y="73.66" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-9" pin="S"/> -<wire x1="88.9" y1="121.92" x2="76.2" y2="121.92" width="0.1524" layer="91"/> -<label x="88.9" y="121.92" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="119.38" x2="101.6" y2="119.38" width="0.1524" layer="91"/> +<label x="114.3" y="119.38" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="A0" class="0"> <segment> <pinref part="IC3" gate="A" pin="QA"/> -<wire x1="58.42" y1="99.06" x2="63.5" y2="99.06" width="0.1524" layer="91"/> -<label x="58.42" y="99.06" size="1.778" layer="95"/> +<wire x1="83.82" y1="96.52" x2="88.9" y2="96.52" width="0.1524" layer="91"/> +<label x="83.82" y="96.52" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A0"/> -<wire x1="76.2" y1="78.74" x2="88.9" y2="78.74" width="0.1524" layer="91"/> -<label x="88.9" y="78.74" size="1.778" layer="95" rot="MR0"/> +<wire x1="101.6" y1="76.2" x2="114.3" y2="76.2" width="0.1524" layer="91"/> +<label x="114.3" y="76.2" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-10" pin="S"/> -<wire x1="88.9" y1="119.38" x2="76.2" y2="119.38" width="0.1524" layer="91"/> -<label x="88.9" y="119.38" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="116.84" x2="101.6" y2="116.84" width="0.1524" layer="91"/> +<label x="114.3" y="116.84" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="A3" class="0"> <segment> <pinref part="IC3" gate="A" pin="QD"/> -<wire x1="63.5" y1="91.44" x2="58.42" y2="91.44" width="0.1524" layer="91"/> -<label x="58.42" y="91.44" size="1.778" layer="95"/> +<wire x1="88.9" y1="88.9" x2="83.82" y2="88.9" width="0.1524" layer="91"/> +<label x="83.82" y="88.9" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A3"/> -<wire x1="76.2" y1="71.12" x2="88.9" y2="71.12" width="0.1524" layer="91"/> -<label x="88.9" y="71.12" size="1.778" layer="95" rot="MR0"/> +<wire x1="101.6" y1="68.58" x2="114.3" y2="68.58" width="0.1524" layer="91"/> +<label x="114.3" y="68.58" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-7" pin="S"/> -<wire x1="88.9" y1="127" x2="76.2" y2="127" width="0.1524" layer="91"/> -<label x="88.9" y="127" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="124.46" x2="101.6" y2="124.46" width="0.1524" layer="91"/> +<label x="114.3" y="124.46" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="A2" class="0"> <segment> <pinref part="IC3" gate="A" pin="QC"/> -<wire x1="63.5" y1="93.98" x2="58.42" y2="93.98" width="0.1524" layer="91"/> -<label x="58.42" y="93.98" size="1.778" layer="95"/> +<wire x1="88.9" y1="91.44" x2="83.82" y2="91.44" width="0.1524" layer="91"/> +<label x="83.82" y="91.44" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A2"/> -<wire x1="76.2" y1="73.66" x2="88.9" y2="73.66" width="0.1524" layer="91"/> -<label x="88.9" y="73.66" size="1.778" layer="95" rot="MR0"/> +<wire x1="101.6" y1="71.12" x2="114.3" y2="71.12" width="0.1524" layer="91"/> +<label x="114.3" y="71.12" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-8" pin="S"/> -<wire x1="88.9" y1="124.46" x2="76.2" y2="124.46" width="0.1524" layer="91"/> -<label x="88.9" y="124.46" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="121.92" x2="101.6" y2="121.92" width="0.1524" layer="91"/> +<label x="114.3" y="121.92" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="A4" class="0"> <segment> <pinref part="IC3" gate="A" pin="QE"/> -<wire x1="63.5" y1="88.9" x2="58.42" y2="88.9" width="0.1524" layer="91"/> -<label x="58.42" y="88.9" size="1.778" layer="95"/> +<wire x1="88.9" y1="86.36" x2="83.82" y2="86.36" width="0.1524" layer="91"/> +<label x="83.82" y="86.36" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A4"/> -<wire x1="88.9" y1="68.58" x2="76.2" y2="68.58" width="0.1524" layer="91"/> -<label x="88.9" y="68.58" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="66.04" x2="101.6" y2="66.04" width="0.1524" layer="91"/> +<label x="114.3" y="66.04" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-6" pin="S"/> -<wire x1="88.9" y1="129.54" x2="76.2" y2="129.54" width="0.1524" layer="91"/> -<label x="88.9" y="129.54" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="127" x2="101.6" y2="127" width="0.1524" layer="91"/> +<label x="114.3" y="127" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="A5" class="0"> <segment> <pinref part="IC3" gate="A" pin="QF"/> -<wire x1="63.5" y1="86.36" x2="58.42" y2="86.36" width="0.1524" layer="91"/> -<label x="58.42" y="86.36" size="1.778" layer="95"/> +<wire x1="88.9" y1="83.82" x2="83.82" y2="83.82" width="0.1524" layer="91"/> +<label x="83.82" y="83.82" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A5"/> -<wire x1="88.9" y1="66.04" x2="76.2" y2="66.04" width="0.1524" layer="91"/> -<label x="88.9" y="66.04" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="63.5" x2="101.6" y2="63.5" width="0.1524" layer="91"/> +<label x="114.3" y="63.5" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-5" pin="S"/> -<wire x1="88.9" y1="132.08" x2="76.2" y2="132.08" width="0.1524" layer="91"/> -<label x="88.9" y="132.08" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="129.54" x2="101.6" y2="129.54" width="0.1524" layer="91"/> +<label x="114.3" y="129.54" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="A6" class="0"> <segment> <pinref part="IC3" gate="A" pin="QG"/> -<wire x1="63.5" y1="83.82" x2="58.42" y2="83.82" width="0.1524" layer="91"/> -<label x="58.42" y="83.82" size="1.778" layer="95"/> +<wire x1="88.9" y1="81.28" x2="83.82" y2="81.28" width="0.1524" layer="91"/> +<label x="83.82" y="81.28" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A6"/> -<wire x1="88.9" y1="63.5" x2="76.2" y2="63.5" width="0.1524" layer="91"/> -<label x="88.9" y="63.5" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="60.96" x2="101.6" y2="60.96" width="0.1524" layer="91"/> +<label x="114.3" y="60.96" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-4" pin="S"/> -<wire x1="88.9" y1="134.62" x2="76.2" y2="134.62" width="0.1524" layer="91"/> -<label x="88.9" y="134.62" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="132.08" x2="101.6" y2="132.08" width="0.1524" layer="91"/> +<label x="114.3" y="132.08" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="A7" class="0"> <segment> <pinref part="IC3" gate="A" pin="QH"/> -<wire x1="63.5" y1="81.28" x2="58.42" y2="81.28" width="0.1524" layer="91"/> -<label x="58.42" y="81.28" size="1.778" layer="95"/> +<wire x1="88.9" y1="78.74" x2="83.82" y2="78.74" width="0.1524" layer="91"/> +<label x="83.82" y="78.74" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A7"/> -<wire x1="88.9" y1="60.96" x2="76.2" y2="60.96" width="0.1524" layer="91"/> -<label x="88.9" y="60.96" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="58.42" x2="101.6" y2="58.42" width="0.1524" layer="91"/> +<label x="114.3" y="58.42" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-3" pin="S"/> -<wire x1="88.9" y1="137.16" x2="76.2" y2="137.16" width="0.1524" layer="91"/> -<label x="88.9" y="137.16" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="134.62" x2="101.6" y2="134.62" width="0.1524" layer="91"/> +<label x="114.3" y="134.62" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="A8" class="0"> <segment> <pinref part="IC4" gate="A" pin="QA"/> -<wire x1="58.42" y1="55.88" x2="63.5" y2="55.88" width="0.1524" layer="91"/> -<label x="58.42" y="55.88" size="1.778" layer="95"/> +<wire x1="83.82" y1="53.34" x2="88.9" y2="53.34" width="0.1524" layer="91"/> +<label x="83.82" y="53.34" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A8"/> -<wire x1="88.9" y1="58.42" x2="76.2" y2="58.42" width="0.1524" layer="91"/> -<label x="88.9" y="58.42" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="55.88" x2="101.6" y2="55.88" width="0.1524" layer="91"/> +<label x="114.3" y="55.88" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X2" gate="-11" pin="S"/> -<wire x1="114.3" y1="134.62" x2="127" y2="134.62" width="0.1524" layer="91"/> -<label x="114.3" y="134.62" size="1.778" layer="95"/> +<wire x1="139.7" y1="132.08" x2="152.4" y2="132.08" width="0.1524" layer="91"/> +<label x="139.7" y="132.08" size="1.778" layer="95"/> </segment> </net> <net name="A9" class="0"> <segment> <pinref part="IC4" gate="A" pin="QB"/> -<wire x1="58.42" y1="53.34" x2="63.5" y2="53.34" width="0.1524" layer="91"/> -<label x="58.42" y="53.34" size="1.778" layer="95"/> +<wire x1="83.82" y1="50.8" x2="88.9" y2="50.8" width="0.1524" layer="91"/> +<label x="83.82" y="50.8" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A9"/> -<wire x1="88.9" y1="55.88" x2="76.2" y2="55.88" width="0.1524" layer="91"/> -<label x="88.9" y="55.88" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="53.34" x2="101.6" y2="53.34" width="0.1524" layer="91"/> +<label x="114.3" y="53.34" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X2" gate="-10" pin="S"/> -<wire x1="114.3" y1="132.08" x2="127" y2="132.08" width="0.1524" layer="91"/> -<label x="114.3" y="132.08" size="1.778" layer="95"/> +<wire x1="139.7" y1="129.54" x2="152.4" y2="129.54" width="0.1524" layer="91"/> +<label x="139.7" y="129.54" size="1.778" layer="95"/> </segment> </net> <net name="A10" class="0"> <segment> <pinref part="IC4" gate="A" pin="QC"/> -<wire x1="58.42" y1="50.8" x2="63.5" y2="50.8" width="0.1524" layer="91"/> -<label x="58.42" y="50.8" size="1.778" layer="95"/> +<wire x1="83.82" y1="48.26" x2="88.9" y2="48.26" width="0.1524" layer="91"/> +<label x="83.82" y="48.26" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A10"/> -<wire x1="88.9" y1="53.34" x2="76.2" y2="53.34" width="0.1524" layer="91"/> -<label x="88.9" y="53.34" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="50.8" x2="101.6" y2="50.8" width="0.1524" layer="91"/> +<label x="114.3" y="50.8" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X2" gate="-7" pin="S"/> -<wire x1="114.3" y1="124.46" x2="127" y2="124.46" width="0.1524" layer="91"/> -<label x="114.3" y="124.46" size="1.778" layer="95"/> +<wire x1="139.7" y1="121.92" x2="152.4" y2="121.92" width="0.1524" layer="91"/> +<label x="139.7" y="121.92" size="1.778" layer="95"/> </segment> </net> <net name="A11" class="0"> <segment> <pinref part="IC4" gate="A" pin="QD"/> -<wire x1="58.42" y1="48.26" x2="63.5" y2="48.26" width="0.1524" layer="91"/> -<label x="58.42" y="48.26" size="1.778" layer="95"/> +<wire x1="83.82" y1="45.72" x2="88.9" y2="45.72" width="0.1524" layer="91"/> +<label x="83.82" y="45.72" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A11"/> -<wire x1="88.9" y1="50.8" x2="76.2" y2="50.8" width="0.1524" layer="91"/> -<label x="88.9" y="50.8" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="48.26" x2="101.6" y2="48.26" width="0.1524" layer="91"/> +<label x="114.3" y="48.26" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X2" gate="-9" pin="S"/> -<wire x1="114.3" y1="129.54" x2="127" y2="129.54" width="0.1524" layer="91"/> -<label x="114.3" y="129.54" size="1.778" layer="95"/> +<wire x1="139.7" y1="127" x2="152.4" y2="127" width="0.1524" layer="91"/> +<label x="139.7" y="127" size="1.778" layer="95"/> </segment> </net> <net name="A12" class="0"> <segment> <pinref part="IC4" gate="A" pin="QE"/> -<wire x1="58.42" y1="45.72" x2="63.5" y2="45.72" width="0.1524" layer="91"/> -<label x="58.42" y="45.72" size="1.778" layer="95"/> +<wire x1="83.82" y1="43.18" x2="88.9" y2="43.18" width="0.1524" layer="91"/> +<label x="83.82" y="43.18" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A12"/> -<wire x1="88.9" y1="48.26" x2="76.2" y2="48.26" width="0.1524" layer="91"/> -<label x="88.9" y="48.26" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="45.72" x2="101.6" y2="45.72" width="0.1524" layer="91"/> +<label x="114.3" y="45.72" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-2" pin="S"/> -<wire x1="76.2" y1="139.7" x2="88.9" y2="139.7" width="0.1524" layer="91"/> -<label x="88.9" y="139.7" size="1.778" layer="95" rot="MR0"/> +<wire x1="101.6" y1="137.16" x2="114.3" y2="137.16" width="0.1524" layer="91"/> +<label x="114.3" y="137.16" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="A13" class="0"> <segment> <pinref part="IC4" gate="A" pin="QF"/> -<wire x1="58.42" y1="43.18" x2="63.5" y2="43.18" width="0.1524" layer="91"/> -<label x="58.42" y="43.18" size="1.778" layer="95"/> +<wire x1="83.82" y1="40.64" x2="88.9" y2="40.64" width="0.1524" layer="91"/> +<label x="83.82" y="40.64" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A13"/> -<wire x1="76.2" y1="45.72" x2="88.9" y2="45.72" width="0.1524" layer="91"/> -<label x="88.9" y="45.72" size="1.778" layer="95" rot="MR0"/> +<wire x1="101.6" y1="43.18" x2="114.3" y2="43.18" width="0.1524" layer="91"/> +<label x="114.3" y="43.18" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X2" gate="-12" pin="S"/> -<wire x1="114.3" y1="137.16" x2="127" y2="137.16" width="0.1524" layer="91"/> -<label x="114.3" y="137.16" size="1.778" layer="95"/> +<wire x1="139.7" y1="134.62" x2="152.4" y2="134.62" width="0.1524" layer="91"/> +<label x="139.7" y="134.62" size="1.778" layer="95"/> </segment> </net> <net name="A14" class="0"> <segment> <pinref part="IC4" gate="A" pin="QG"/> -<wire x1="58.42" y1="40.64" x2="63.5" y2="40.64" width="0.1524" layer="91"/> -<label x="58.42" y="40.64" size="1.778" layer="95"/> +<wire x1="83.82" y1="38.1" x2="88.9" y2="38.1" width="0.1524" layer="91"/> +<label x="83.82" y="38.1" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="A14"/> -<wire x1="88.9" y1="43.18" x2="76.2" y2="43.18" width="0.1524" layer="91"/> -<label x="88.9" y="43.18" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="40.64" x2="101.6" y2="40.64" width="0.1524" layer="91"/> +<label x="114.3" y="40.64" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X1" gate="-1" pin="S"/> -<wire x1="88.9" y1="142.24" x2="76.2" y2="142.24" width="0.1524" layer="91"/> -<label x="88.9" y="142.24" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="139.7" x2="101.6" y2="139.7" width="0.1524" layer="91"/> +<label x="114.3" y="139.7" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="N$1" class="0"> <segment> <pinref part="IC3" gate="A" pin="QH*"/> -<wire x1="58.42" y1="76.2" x2="58.42" y2="66.04" width="0.1524" layer="91"/> -<wire x1="58.42" y1="66.04" x2="30.48" y2="66.04" width="0.1524" layer="91"/> -<wire x1="30.48" y1="66.04" x2="30.48" y2="55.88" width="0.1524" layer="91"/> +<wire x1="83.82" y1="73.66" x2="83.82" y2="63.5" width="0.1524" layer="91"/> +<wire x1="83.82" y1="63.5" x2="55.88" y2="63.5" width="0.1524" layer="91"/> +<wire x1="55.88" y1="63.5" x2="55.88" y2="53.34" width="0.1524" layer="91"/> <pinref part="IC4" gate="A" pin="SER"/> -<wire x1="30.48" y1="55.88" x2="33.02" y2="55.88" width="0.1524" layer="91"/> -</segment> -</net> -<net name="A_EN" class="0"> -<segment> -<pinref part="IC3" gate="A" pin="G"/> -<wire x1="33.02" y1="76.2" x2="22.86" y2="76.2" width="0.1524" layer="91"/> -<wire x1="22.86" y1="76.2" x2="22.86" y2="33.02" width="0.1524" layer="91"/> -<pinref part="IC4" gate="A" pin="G"/> -<wire x1="22.86" y1="33.02" x2="22.86" y2="30.48" width="0.1524" layer="91"/> -<wire x1="33.02" y1="33.02" x2="22.86" y2="33.02" width="0.1524" layer="91"/> -<label x="-10.16" y="30.48" size="1.778" layer="95"/> -<junction x="22.86" y="33.02"/> -<pinref part="SV1" gate="1" pin="2"/> -<wire x1="-12.7" y1="30.48" x2="22.86" y2="30.48" width="0.1524" layer="91"/> +<wire x1="55.88" y1="53.34" x2="58.42" y2="53.34" width="0.1524" layer="91"/> </segment> </net> <net name="D0" class="0"> <segment> <pinref part="IC1" gate="A" pin="A"/> -<wire x1="127" y1="96.52" x2="149.86" y2="96.52" width="0.1524" layer="91"/> -<label x="137.16" y="96.52" size="1.778" layer="95"/> +<wire x1="152.4" y1="93.98" x2="175.26" y2="93.98" width="0.1524" layer="91"/> +<label x="162.56" y="93.98" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC2" gate="A" pin="QA"/> -<wire x1="127" y1="30.48" x2="149.86" y2="30.48" width="0.1524" layer="91"/> -<label x="137.16" y="30.48" size="1.778" layer="95"/> +<wire x1="152.4" y1="27.94" x2="175.26" y2="27.94" width="0.1524" layer="91"/> +<label x="162.56" y="27.94" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="I/O1"/> -<label x="116.84" y="78.74" size="1.778" layer="95"/> -<wire x1="114.3" y1="78.74" x2="127" y2="78.74" width="0.1524" layer="91"/> +<label x="142.24" y="76.2" size="1.778" layer="95"/> +<wire x1="139.7" y1="76.2" x2="152.4" y2="76.2" width="0.1524" layer="91"/> </segment> <segment> <pinref part="X1" gate="-11" pin="S"/> -<wire x1="88.9" y1="116.84" x2="76.2" y2="116.84" width="0.1524" layer="91"/> -<label x="88.9" y="116.84" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="114.3" x2="101.6" y2="114.3" width="0.1524" layer="91"/> +<label x="114.3" y="114.3" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="D1" class="0"> <segment> <pinref part="IC1" gate="A" pin="B"/> -<wire x1="127" y1="93.98" x2="149.86" y2="93.98" width="0.1524" layer="91"/> -<label x="137.16" y="93.98" size="1.778" layer="95"/> +<wire x1="152.4" y1="91.44" x2="175.26" y2="91.44" width="0.1524" layer="91"/> +<label x="162.56" y="91.44" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC2" gate="A" pin="QB"/> -<wire x1="127" y1="33.02" x2="149.86" y2="33.02" width="0.1524" layer="91"/> -<label x="137.16" y="33.02" size="1.778" layer="95"/> +<wire x1="152.4" y1="30.48" x2="175.26" y2="30.48" width="0.1524" layer="91"/> +<label x="162.56" y="30.48" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="I/O2"/> -<label x="116.84" y="76.2" size="1.778" layer="95"/> -<wire x1="114.3" y1="76.2" x2="127" y2="76.2" width="0.1524" layer="91"/> +<label x="142.24" y="73.66" size="1.778" layer="95"/> +<wire x1="139.7" y1="73.66" x2="152.4" y2="73.66" width="0.1524" layer="91"/> </segment> <segment> <pinref part="X1" gate="-12" pin="S"/> -<wire x1="88.9" y1="114.3" x2="76.2" y2="114.3" width="0.1524" layer="91"/> -<label x="88.9" y="114.3" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="111.76" x2="101.6" y2="111.76" width="0.1524" layer="91"/> +<label x="114.3" y="111.76" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="D2" class="0"> <segment> <pinref part="IC1" gate="A" pin="C"/> -<wire x1="127" y1="91.44" x2="149.86" y2="91.44" width="0.1524" layer="91"/> -<label x="137.16" y="91.44" size="1.778" layer="95"/> +<wire x1="152.4" y1="88.9" x2="175.26" y2="88.9" width="0.1524" layer="91"/> +<label x="162.56" y="88.9" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC2" gate="A" pin="QC"/> -<wire x1="127" y1="35.56" x2="149.86" y2="35.56" width="0.1524" layer="91"/> -<label x="137.16" y="35.56" size="1.778" layer="95"/> +<wire x1="152.4" y1="33.02" x2="175.26" y2="33.02" width="0.1524" layer="91"/> +<label x="162.56" y="33.02" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="I/O3"/> -<label x="116.84" y="73.66" size="1.778" layer="95"/> -<wire x1="114.3" y1="73.66" x2="127" y2="73.66" width="0.1524" layer="91"/> +<label x="142.24" y="71.12" size="1.778" layer="95"/> +<wire x1="139.7" y1="71.12" x2="152.4" y2="71.12" width="0.1524" layer="91"/> </segment> <segment> <pinref part="X1" gate="-13" pin="S"/> -<wire x1="88.9" y1="111.76" x2="76.2" y2="111.76" width="0.1524" layer="91"/> -<label x="88.9" y="111.76" size="1.778" layer="95" rot="MR0"/> +<wire x1="114.3" y1="109.22" x2="101.6" y2="109.22" width="0.1524" layer="91"/> +<label x="114.3" y="109.22" size="1.778" layer="95" rot="MR0"/> </segment> </net> <net name="D3" class="0"> <segment> <pinref part="IC1" gate="A" pin="D"/> -<wire x1="127" y1="88.9" x2="149.86" y2="88.9" width="0.1524" layer="91"/> -<label x="137.16" y="88.9" size="1.778" layer="95"/> +<wire x1="152.4" y1="86.36" x2="175.26" y2="86.36" width="0.1524" layer="91"/> +<label x="162.56" y="86.36" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC2" gate="A" pin="QD"/> -<wire x1="127" y1="38.1" x2="149.86" y2="38.1" width="0.1524" layer="91"/> -<label x="137.16" y="38.1" size="1.778" layer="95"/> +<wire x1="152.4" y1="35.56" x2="175.26" y2="35.56" width="0.1524" layer="91"/> +<label x="162.56" y="35.56" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="I/O4"/> -<label x="116.84" y="71.12" size="1.778" layer="95"/> -<wire x1="114.3" y1="71.12" x2="127" y2="71.12" width="0.1524" layer="91"/> +<label x="142.24" y="68.58" size="1.778" layer="95"/> +<wire x1="139.7" y1="68.58" x2="152.4" y2="68.58" width="0.1524" layer="91"/> </segment> <segment> <pinref part="X2" gate="-1" pin="S"/> -<wire x1="114.3" y1="109.22" x2="127" y2="109.22" width="0.1524" layer="91"/> -<label x="114.3" y="109.22" size="1.778" layer="95"/> +<wire x1="139.7" y1="106.68" x2="152.4" y2="106.68" width="0.1524" layer="91"/> +<label x="139.7" y="106.68" size="1.778" layer="95"/> </segment> </net> <net name="D4" class="0"> <segment> <pinref part="IC1" gate="A" pin="E"/> -<wire x1="127" y1="86.36" x2="149.86" y2="86.36" width="0.1524" layer="91"/> -<label x="137.16" y="86.36" size="1.778" layer="95"/> +<wire x1="152.4" y1="83.82" x2="175.26" y2="83.82" width="0.1524" layer="91"/> +<label x="162.56" y="83.82" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC2" gate="A" pin="QE"/> -<wire x1="127" y1="40.64" x2="149.86" y2="40.64" width="0.1524" layer="91"/> -<label x="137.16" y="40.64" size="1.778" layer="95"/> +<wire x1="152.4" y1="38.1" x2="175.26" y2="38.1" width="0.1524" layer="91"/> +<label x="162.56" y="38.1" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="I/O5"/> -<label x="116.84" y="68.58" size="1.778" layer="95"/> -<wire x1="114.3" y1="68.58" x2="127" y2="68.58" width="0.1524" layer="91"/> +<label x="142.24" y="66.04" size="1.778" layer="95"/> +<wire x1="139.7" y1="66.04" x2="152.4" y2="66.04" width="0.1524" layer="91"/> </segment> <segment> <pinref part="X2" gate="-2" pin="S"/> -<wire x1="114.3" y1="111.76" x2="127" y2="111.76" width="0.1524" layer="91"/> -<label x="114.3" y="111.76" size="1.778" layer="95"/> +<wire x1="139.7" y1="109.22" x2="152.4" y2="109.22" width="0.1524" layer="91"/> +<label x="139.7" y="109.22" size="1.778" layer="95"/> </segment> </net> <net name="D5" class="0"> <segment> <pinref part="IC1" gate="A" pin="F"/> -<wire x1="127" y1="83.82" x2="149.86" y2="83.82" width="0.1524" layer="91"/> -<label x="137.16" y="83.82" size="1.778" layer="95"/> +<wire x1="152.4" y1="81.28" x2="175.26" y2="81.28" width="0.1524" layer="91"/> +<label x="162.56" y="81.28" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC2" gate="A" pin="QF"/> -<wire x1="127" y1="43.18" x2="149.86" y2="43.18" width="0.1524" layer="91"/> -<label x="137.16" y="43.18" size="1.778" layer="95"/> +<wire x1="152.4" y1="40.64" x2="175.26" y2="40.64" width="0.1524" layer="91"/> +<label x="162.56" y="40.64" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="I/O6"/> -<label x="116.84" y="66.04" size="1.778" layer="95"/> -<wire x1="114.3" y1="66.04" x2="127" y2="66.04" width="0.1524" layer="91"/> +<label x="142.24" y="63.5" size="1.778" layer="95"/> +<wire x1="139.7" y1="63.5" x2="152.4" y2="63.5" width="0.1524" layer="91"/> </segment> <segment> <pinref part="X2" gate="-3" pin="S"/> -<wire x1="114.3" y1="114.3" x2="127" y2="114.3" width="0.1524" layer="91"/> -<label x="114.3" y="114.3" size="1.778" layer="95"/> +<wire x1="139.7" y1="111.76" x2="152.4" y2="111.76" width="0.1524" layer="91"/> +<label x="139.7" y="111.76" size="1.778" layer="95"/> </segment> </net> <net name="D6" class="0"> <segment> <pinref part="IC1" gate="A" pin="G"/> -<wire x1="127" y1="81.28" x2="149.86" y2="81.28" width="0.1524" layer="91"/> -<label x="137.16" y="81.28" size="1.778" layer="95"/> +<wire x1="152.4" y1="78.74" x2="175.26" y2="78.74" width="0.1524" layer="91"/> +<label x="162.56" y="78.74" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC2" gate="A" pin="QG"/> -<wire x1="127" y1="45.72" x2="149.86" y2="45.72" width="0.1524" layer="91"/> -<label x="137.16" y="45.72" size="1.778" layer="95"/> +<wire x1="152.4" y1="43.18" x2="175.26" y2="43.18" width="0.1524" layer="91"/> +<label x="162.56" y="43.18" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="I/O7"/> -<label x="116.84" y="63.5" size="1.778" layer="95"/> -<wire x1="114.3" y1="63.5" x2="127" y2="63.5" width="0.1524" layer="91"/> +<label x="142.24" y="60.96" size="1.778" layer="95"/> +<wire x1="139.7" y1="60.96" x2="152.4" y2="60.96" width="0.1524" layer="91"/> </segment> <segment> <pinref part="X2" gate="-4" pin="S"/> -<wire x1="114.3" y1="116.84" x2="127" y2="116.84" width="0.1524" layer="91"/> -<label x="114.3" y="116.84" size="1.778" layer="95"/> +<wire x1="139.7" y1="114.3" x2="152.4" y2="114.3" width="0.1524" layer="91"/> +<label x="139.7" y="114.3" size="1.778" layer="95"/> </segment> </net> <net name="D7" class="0"> <segment> <pinref part="IC1" gate="A" pin="H"/> -<wire x1="127" y1="78.74" x2="149.86" y2="78.74" width="0.1524" layer="91"/> -<label x="137.16" y="78.74" size="1.778" layer="95"/> +<wire x1="152.4" y1="76.2" x2="175.26" y2="76.2" width="0.1524" layer="91"/> +<label x="162.56" y="76.2" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC2" gate="A" pin="QH"/> -<wire x1="127" y1="48.26" x2="149.86" y2="48.26" width="0.1524" layer="91"/> -<label x="137.16" y="48.26" size="1.778" layer="95"/> +<wire x1="152.4" y1="45.72" x2="175.26" y2="45.72" width="0.1524" layer="91"/> +<label x="162.56" y="45.72" size="1.778" layer="95"/> </segment> <segment> <pinref part="IC5" gate="G$1" pin="I/O8"/> -<label x="116.84" y="60.96" size="1.778" layer="95"/> -<wire x1="114.3" y1="60.96" x2="127" y2="60.96" width="0.1524" layer="91"/> +<label x="142.24" y="58.42" size="1.778" layer="95"/> +<wire x1="139.7" y1="58.42" x2="152.4" y2="58.42" width="0.1524" layer="91"/> </segment> <segment> <pinref part="X2" gate="-5" pin="S"/> -<wire x1="114.3" y1="119.38" x2="127" y2="119.38" width="0.1524" layer="91"/> -<label x="114.3" y="119.38" size="1.778" layer="95"/> +<wire x1="139.7" y1="116.84" x2="152.4" y2="116.84" width="0.1524" layer="91"/> +<label x="139.7" y="116.84" size="1.778" layer="95"/> </segment> </net> <net name="N$2" class="0"> <segment> <pinref part="IC4" gate="A" pin="QH*"/> -<wire x1="58.42" y1="33.02" x2="60.96" y2="33.02" width="0.1524" layer="91"/> -<wire x1="60.96" y1="33.02" x2="60.96" y2="15.24" width="0.1524" layer="91"/> -<wire x1="60.96" y1="15.24" x2="180.34" y2="15.24" width="0.1524" layer="91"/> -<wire x1="180.34" y1="15.24" x2="180.34" y2="30.48" width="0.1524" layer="91"/> +<wire x1="83.82" y1="30.48" x2="86.36" y2="30.48" width="0.1524" layer="91"/> +<wire x1="86.36" y1="30.48" x2="86.36" y2="12.7" width="0.1524" layer="91"/> +<wire x1="86.36" y1="12.7" x2="203.2" y2="12.7" width="0.1524" layer="91"/> +<wire x1="203.2" y1="12.7" x2="203.2" y2="27.94" width="0.1524" layer="91"/> <pinref part="IC2" gate="A" pin="SER"/> -<wire x1="180.34" y1="30.48" x2="175.26" y2="30.48" width="0.1524" layer="91"/> +<wire x1="203.2" y1="27.94" x2="200.66" y2="27.94" width="0.1524" layer="91"/> </segment> </net> <net name="N$3" class="0"> <segment> <pinref part="IC2" gate="A" pin="QH*"/> -<wire x1="149.86" y1="53.34" x2="142.24" y2="53.34" width="0.1524" layer="91"/> -<wire x1="142.24" y1="53.34" x2="142.24" y2="99.06" width="0.1524" layer="91"/> +<wire x1="175.26" y1="50.8" x2="167.64" y2="50.8" width="0.1524" layer="91"/> +<wire x1="167.64" y1="50.8" x2="167.64" y2="96.52" width="0.1524" layer="91"/> <pinref part="IC1" gate="A" pin="SER"/> -<wire x1="142.24" y1="99.06" x2="149.86" y2="99.06" width="0.1524" layer="91"/> -</segment> -</net> -<net name="D_IN" class="0"> -<segment> -<pinref part="IC3" gate="A" pin="SER"/> -<wire x1="33.02" y1="99.06" x2="20.32" y2="99.06" width="0.1524" layer="91"/> -<wire x1="20.32" y1="99.06" x2="20.32" y2="33.02" width="0.1524" layer="91"/> -<label x="-10.16" y="33.02" size="1.778" layer="95"/> -<pinref part="SV1" gate="1" pin="3"/> -<wire x1="20.32" y1="33.02" x2="-12.7" y2="33.02" width="0.1524" layer="91"/> -</segment> -</net> -<net name="D_CLK" class="0"> -<segment> -<pinref part="IC3" gate="A" pin="SCK"/> -<wire x1="33.02" y1="93.98" x2="17.78" y2="93.98" width="0.1524" layer="91"/> -<wire x1="17.78" y1="93.98" x2="17.78" y2="50.8" width="0.1524" layer="91"/> -<pinref part="IC4" gate="A" pin="SCK"/> -<wire x1="17.78" y1="50.8" x2="33.02" y2="50.8" width="0.1524" layer="91"/> -<wire x1="17.78" y1="50.8" x2="17.78" y2="35.56" width="0.1524" layer="91"/> -<label x="-10.16" y="35.56" size="1.778" layer="95"/> -<wire x1="17.78" y1="35.56" x2="17.78" y2="7.62" width="0.1524" layer="91"/> -<wire x1="17.78" y1="7.62" x2="187.96" y2="7.62" width="0.1524" layer="91"/> -<wire x1="187.96" y1="7.62" x2="187.96" y2="35.56" width="0.1524" layer="91"/> -<pinref part="IC2" gate="A" pin="SCK"/> -<wire x1="175.26" y1="35.56" x2="187.96" y2="35.56" width="0.1524" layer="91"/> -<wire x1="187.96" y1="35.56" x2="187.96" y2="60.96" width="0.1524" layer="91"/> -<wire x1="187.96" y1="60.96" x2="144.78" y2="60.96" width="0.1524" layer="91"/> -<pinref part="IC1" gate="A" pin="CLK"/> -<wire x1="149.86" y1="73.66" x2="144.78" y2="73.66" width="0.1524" layer="91"/> -<wire x1="144.78" y1="73.66" x2="144.78" y2="60.96" width="0.1524" layer="91"/> -<junction x="187.96" y="35.56"/> -<pinref part="SV1" gate="1" pin="4"/> -<wire x1="-12.7" y1="35.56" x2="17.78" y2="35.56" width="0.1524" layer="91"/> -<junction x="17.78" y="35.56"/> -</segment> -</net> -<net name="N$5" class="0"> -<segment> -<pinref part="IC2" gate="A" pin="RCK"/> -<wire x1="175.26" y1="43.18" x2="185.42" y2="43.18" width="0.1524" layer="91"/> -<wire x1="185.42" y1="43.18" x2="185.42" y2="10.16" width="0.1524" layer="91"/> -<wire x1="185.42" y1="10.16" x2="25.4" y2="10.16" width="0.1524" layer="91"/> -<wire x1="25.4" y1="10.16" x2="25.4" y2="43.18" width="0.1524" layer="91"/> -<pinref part="IC4" gate="A" pin="RCK"/> -<wire x1="33.02" y1="43.18" x2="25.4" y2="43.18" width="0.1524" layer="91"/> -<pinref part="IC3" gate="A" pin="RCK"/> -<wire x1="33.02" y1="86.36" x2="25.4" y2="86.36" width="0.1524" layer="91"/> -<wire x1="25.4" y1="86.36" x2="25.4" y2="43.18" width="0.1524" layer="91"/> -<pinref part="IC1" gate="A" pin="SH/!LD"/> -<wire x1="149.86" y1="68.58" x2="147.32" y2="68.58" width="0.1524" layer="91"/> -<wire x1="147.32" y1="68.58" x2="147.32" y2="63.5" width="0.1524" layer="91"/> -<wire x1="147.32" y1="63.5" x2="185.42" y2="63.5" width="0.1524" layer="91"/> -<wire x1="185.42" y1="63.5" x2="185.42" y2="43.18" width="0.1524" layer="91"/> -<junction x="25.4" y="43.18"/> -<junction x="185.42" y="43.18"/> +<wire x1="167.64" y1="96.52" x2="175.26" y2="96.52" width="0.1524" layer="91"/> </segment> </net> <net name="VCC" class="0"> <segment> <pinref part="IC4" gate="A" pin="SCL"/> -<wire x1="33.02" y1="48.26" x2="27.94" y2="48.26" width="0.1524" layer="91"/> -<wire x1="27.94" y1="48.26" x2="27.94" y2="91.44" width="0.1524" layer="91"/> +<wire x1="58.42" y1="45.72" x2="53.34" y2="45.72" width="0.1524" layer="91"/> +<wire x1="53.34" y1="45.72" x2="53.34" y2="88.9" width="0.1524" layer="91"/> <pinref part="IC3" gate="A" pin="SCL"/> -<wire x1="27.94" y1="91.44" x2="27.94" y2="106.68" width="0.1524" layer="91"/> -<wire x1="33.02" y1="91.44" x2="27.94" y2="91.44" width="0.1524" layer="91"/> -<junction x="27.94" y="91.44"/> +<wire x1="53.34" y1="88.9" x2="53.34" y2="104.14" width="0.1524" layer="91"/> +<wire x1="58.42" y1="88.9" x2="53.34" y2="88.9" width="0.1524" layer="91"/> +<junction x="53.34" y="88.9"/> <pinref part="P+1" gate="VCC" pin="VCC"/> </segment> <segment> <pinref part="X2" gate="-14" pin="S"/> -<wire x1="114.3" y1="142.24" x2="116.84" y2="142.24" width="0.1524" layer="91"/> -<wire x1="116.84" y1="142.24" x2="116.84" y2="144.78" width="0.1524" layer="91"/> +<wire x1="139.7" y1="139.7" x2="142.24" y2="139.7" width="0.1524" layer="91"/> +<wire x1="142.24" y1="139.7" x2="142.24" y2="142.24" width="0.1524" layer="91"/> <pinref part="P+2" gate="VCC" pin="VCC"/> </segment> <segment> <pinref part="C1" gate="G$1" pin="1"/> -<wire x1="22.86" y1="149.86" x2="22.86" y2="152.4" width="0.1524" layer="91"/> +<wire x1="48.26" y1="147.32" x2="48.26" y2="149.86" width="0.1524" layer="91"/> <pinref part="P+3" gate="VCC" pin="VCC"/> -<wire x1="22.86" y1="152.4" x2="30.48" y2="152.4" width="0.1524" layer="91"/> -<wire x1="30.48" y1="152.4" x2="38.1" y2="152.4" width="0.1524" layer="91"/> -<wire x1="38.1" y1="152.4" x2="45.72" y2="152.4" width="0.1524" layer="91"/> -<wire x1="45.72" y1="152.4" x2="53.34" y2="152.4" width="0.1524" layer="91"/> -<wire x1="53.34" y1="152.4" x2="58.42" y2="152.4" width="0.1524" layer="91"/> -<wire x1="58.42" y1="152.4" x2="58.42" y2="154.94" width="0.1524" layer="91"/> +<wire x1="48.26" y1="149.86" x2="55.88" y2="149.86" width="0.1524" layer="91"/> +<wire x1="55.88" y1="149.86" x2="63.5" y2="149.86" width="0.1524" layer="91"/> +<wire x1="63.5" y1="149.86" x2="71.12" y2="149.86" width="0.1524" layer="91"/> +<wire x1="71.12" y1="149.86" x2="78.74" y2="149.86" width="0.1524" layer="91"/> +<wire x1="78.74" y1="149.86" x2="83.82" y2="149.86" width="0.1524" layer="91"/> +<wire x1="83.82" y1="149.86" x2="83.82" y2="152.4" width="0.1524" layer="91"/> <pinref part="C5" gate="G$1" pin="1"/> -<wire x1="53.34" y1="152.4" x2="53.34" y2="149.86" width="0.1524" layer="91"/> +<wire x1="78.74" y1="149.86" x2="78.74" y2="147.32" width="0.1524" layer="91"/> <pinref part="C4" gate="G$1" pin="1"/> -<wire x1="45.72" y1="152.4" x2="45.72" y2="149.86" width="0.1524" layer="91"/> +<wire x1="71.12" y1="149.86" x2="71.12" y2="147.32" width="0.1524" layer="91"/> <pinref part="C3" gate="G$1" pin="1"/> -<wire x1="38.1" y1="152.4" x2="38.1" y2="149.86" width="0.1524" layer="91"/> +<wire x1="63.5" y1="149.86" x2="63.5" y2="147.32" width="0.1524" layer="91"/> <pinref part="C2" gate="G$1" pin="1"/> -<wire x1="30.48" y1="152.4" x2="30.48" y2="149.86" width="0.1524" layer="91"/> -<junction x="30.48" y="152.4"/> -<junction x="38.1" y="152.4"/> -<junction x="45.72" y="152.4"/> -<junction x="53.34" y="152.4"/> +<wire x1="55.88" y1="149.86" x2="55.88" y2="147.32" width="0.1524" layer="91"/> +<junction x="55.88" y="149.86"/> +<junction x="63.5" y="149.86"/> +<junction x="71.12" y="149.86"/> +<junction x="78.74" y="149.86"/> </segment> <segment> -<pinref part="SV1" gate="1" pin="6"/> <pinref part="P+4" gate="VCC" pin="VCC"/> -<wire x1="-12.7" y1="40.64" x2="-10.16" y2="40.64" width="0.1524" layer="91"/> -<wire x1="-10.16" y1="40.64" x2="-10.16" y2="43.18" width="0.1524" layer="91"/> +<wire x1="15.24" y1="45.72" x2="15.24" y2="48.26" width="0.1524" layer="91"/> +<pinref part="SV1" gate="1" pin="10"/> +<wire x1="12.7" y1="45.72" x2="15.24" y2="45.72" width="0.1524" layer="91"/> </segment> </net> -<net name="!WE" class="0"> +<net name="!RAM_WE" class="0"> <segment> <pinref part="IC5" gate="G$1" pin="!WE"/> -<wire x1="76.2" y1="35.56" x2="88.9" y2="35.56" width="0.1524" layer="91"/> -<label x="88.9" y="35.56" size="1.778" layer="95" rot="MR0"/> +<wire x1="101.6" y1="33.02" x2="114.3" y2="33.02" width="0.1524" layer="91"/> +<label x="114.3" y="33.02" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X2" gate="-13" pin="S"/> -<wire x1="114.3" y1="139.7" x2="127" y2="139.7" width="0.1524" layer="91"/> -<label x="114.3" y="139.7" size="1.778" layer="95"/> +<wire x1="139.7" y1="137.16" x2="152.4" y2="137.16" width="0.1524" layer="91"/> +<label x="139.7" y="137.16" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="SV1" gate="1" pin="8"/> +<wire x1="38.1" y1="40.64" x2="12.7" y2="40.64" width="0.1524" layer="91"/> +<label x="15.24" y="40.64" size="1.778" layer="95"/> </segment> </net> <net name="!RAM_CS" class="0"> <segment> <pinref part="IC5" gate="G$1" pin="!CS"/> -<wire x1="76.2" y1="33.02" x2="88.9" y2="33.02" width="0.1524" layer="91"/> -<label x="88.9" y="33.02" size="1.778" layer="95" rot="MR0"/> +<wire x1="101.6" y1="30.48" x2="114.3" y2="30.48" width="0.1524" layer="91"/> +<label x="114.3" y="30.48" size="1.778" layer="95" rot="MR0"/> </segment> <segment> <pinref part="X2" gate="-6" pin="S"/> -<wire x1="114.3" y1="121.92" x2="127" y2="121.92" width="0.1524" layer="91"/> -<label x="114.3" y="121.92" size="1.778" layer="95"/> +<wire x1="139.7" y1="119.38" x2="152.4" y2="119.38" width="0.1524" layer="91"/> +<label x="139.7" y="119.38" size="1.778" layer="95"/> </segment> -</net> -<net name="!OE" class="0"> <segment> -<pinref part="IC5" gate="G$1" pin="!OE"/> -<wire x1="76.2" y1="38.1" x2="88.9" y2="38.1" width="0.1524" layer="91"/> -<label x="88.9" y="38.1" size="1.778" layer="95" rot="MR0"/> -</segment> -<segment> -<pinref part="X2" gate="-8" pin="S"/> -<wire x1="114.3" y1="127" x2="127" y2="127" width="0.1524" layer="91"/> -<label x="114.3" y="127" size="1.778" layer="95"/> +<pinref part="SV1" gate="1" pin="9"/> +<wire x1="38.1" y1="43.18" x2="12.7" y2="43.18" width="0.1524" layer="91"/> +<label x="15.24" y="43.18" size="1.778" layer="95"/> </segment> </net> <net name="GND" class="0"> <segment> <pinref part="X1" gate="-14" pin="S"/> -<wire x1="88.9" y1="109.22" x2="86.36" y2="109.22" width="0.1524" layer="91"/> -<wire x1="86.36" y1="109.22" x2="86.36" y2="106.68" width="0.1524" layer="91"/> +<wire x1="114.3" y1="106.68" x2="111.76" y2="106.68" width="0.1524" layer="91"/> +<wire x1="111.76" y1="106.68" x2="111.76" y2="104.14" width="0.1524" layer="91"/> <pinref part="GND1" gate="1" pin="GND"/> </segment> <segment> <pinref part="C1" gate="G$1" pin="2"/> -<wire x1="22.86" y1="142.24" x2="22.86" y2="139.7" width="0.1524" layer="91"/> -<wire x1="22.86" y1="139.7" x2="30.48" y2="139.7" width="0.1524" layer="91"/> -<wire x1="30.48" y1="139.7" x2="38.1" y2="139.7" width="0.1524" layer="91"/> -<wire x1="38.1" y1="139.7" x2="45.72" y2="139.7" width="0.1524" layer="91"/> -<wire x1="53.34" y1="139.7" x2="58.42" y2="139.7" width="0.1524" layer="91"/> -<wire x1="58.42" y1="139.7" x2="58.42" y2="137.16" width="0.1524" layer="91"/> +<wire x1="48.26" y1="139.7" x2="48.26" y2="137.16" width="0.1524" layer="91"/> +<wire x1="48.26" y1="137.16" x2="55.88" y2="137.16" width="0.1524" layer="91"/> +<wire x1="55.88" y1="137.16" x2="63.5" y2="137.16" width="0.1524" layer="91"/> +<wire x1="63.5" y1="137.16" x2="71.12" y2="137.16" width="0.1524" layer="91"/> +<wire x1="78.74" y1="137.16" x2="83.82" y2="137.16" width="0.1524" layer="91"/> +<wire x1="83.82" y1="137.16" x2="83.82" y2="134.62" width="0.1524" layer="91"/> <pinref part="C5" gate="G$1" pin="2"/> -<wire x1="53.34" y1="142.24" x2="53.34" y2="139.7" width="0.1524" layer="91"/> +<wire x1="78.74" y1="139.7" x2="78.74" y2="137.16" width="0.1524" layer="91"/> <pinref part="C4" gate="G$1" pin="2"/> -<wire x1="53.34" y1="139.7" x2="45.72" y2="139.7" width="0.1524" layer="91"/> -<wire x1="45.72" y1="139.7" x2="45.72" y2="142.24" width="0.1524" layer="91"/> +<wire x1="78.74" y1="137.16" x2="71.12" y2="137.16" width="0.1524" layer="91"/> +<wire x1="71.12" y1="137.16" x2="71.12" y2="139.7" width="0.1524" layer="91"/> <pinref part="C2" gate="G$1" pin="2"/> -<wire x1="30.48" y1="142.24" x2="30.48" y2="139.7" width="0.1524" layer="91"/> +<wire x1="55.88" y1="139.7" x2="55.88" y2="137.16" width="0.1524" layer="91"/> <pinref part="C3" gate="G$1" pin="2"/> -<wire x1="38.1" y1="142.24" x2="38.1" y2="139.7" width="0.1524" layer="91"/> -<junction x="30.48" y="139.7"/> -<junction x="38.1" y="139.7"/> -<junction x="53.34" y="139.7"/> -<junction x="45.72" y="139.7"/> +<wire x1="63.5" y1="139.7" x2="63.5" y2="137.16" width="0.1524" layer="91"/> +<junction x="55.88" y="137.16"/> +<junction x="63.5" y="137.16"/> +<junction x="78.74" y="137.16"/> +<junction x="71.12" y="137.16"/> <pinref part="GND2" gate="1" pin="GND"/> </segment> <segment> -<pinref part="SV1" gate="1" pin="1"/> <pinref part="GND3" gate="1" pin="GND"/> -<wire x1="-12.7" y1="27.94" x2="-10.16" y2="27.94" width="0.1524" layer="91"/> -<wire x1="-10.16" y1="27.94" x2="-10.16" y2="25.4" width="0.1524" layer="91"/> +<wire x1="15.24" y1="22.86" x2="15.24" y2="20.32" width="0.1524" layer="91"/> +<pinref part="SV1" gate="1" pin="1"/> +<wire x1="15.24" y1="22.86" x2="12.7" y2="22.86" width="0.1524" layer="91"/> </segment> <segment> <pinref part="IC1" gate="A" pin="INH"/> <pinref part="GND4" gate="1" pin="GND"/> -<wire x1="149.86" y1="71.12" x2="137.16" y2="71.12" width="0.1524" layer="91"/> -<wire x1="137.16" y1="71.12" x2="137.16" y2="68.58" width="0.1524" layer="91"/> +<wire x1="175.26" y1="68.58" x2="162.56" y2="68.58" width="0.1524" layer="91"/> +<wire x1="162.56" y1="68.58" x2="162.56" y2="66.04" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="GND5" gate="1" pin="GND"/> +<wire x1="205.74" y1="20.32" x2="205.74" y2="35.56" width="0.1524" layer="91"/> +<pinref part="IC2" gate="A" pin="SCL"/> +<wire x1="205.74" y1="35.56" x2="200.66" y2="35.56" width="0.1524" layer="91"/> </segment> </net> -<net name="D_OUT" class="0"> +<net name="!RAM_OE" class="0"> +<segment> +<pinref part="IC5" gate="G$1" pin="!OE"/> +<wire x1="101.6" y1="35.56" x2="114.3" y2="35.56" width="0.1524" layer="91"/> +<label x="114.3" y="35.56" size="1.778" layer="95" rot="MR0"/> +</segment> +<segment> +<pinref part="X2" gate="-8" pin="S"/> +<wire x1="139.7" y1="124.46" x2="152.4" y2="124.46" width="0.1524" layer="91"/> +<label x="139.7" y="124.46" size="1.778" layer="95"/> +</segment> +<segment> +<wire x1="38.1" y1="38.1" x2="12.7" y2="38.1" width="0.1524" layer="91"/> +<label x="15.24" y="38.1" size="1.778" layer="95"/> +<pinref part="SV1" gate="1" pin="7"/> +</segment> +</net> +<net name="BIT_IN" class="0"> +<segment> +<pinref part="SV1" gate="1" pin="2"/> +<wire x1="38.1" y1="25.4" x2="12.7" y2="25.4" width="0.1524" layer="91"/> +<label x="15.24" y="25.4" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC3" gate="A" pin="SER"/> +<wire x1="38.1" y1="96.52" x2="58.42" y2="96.52" width="0.1524" layer="91"/> +</segment> +</net> +<net name="BIT_OUT" class="0"> +<segment> +<pinref part="SV1" gate="1" pin="3"/> +<wire x1="38.1" y1="27.94" x2="12.7" y2="27.94" width="0.1524" layer="91"/> +<label x="15.24" y="27.94" size="1.778" layer="95"/> +</segment> <segment> -<pinref part="SV1" gate="1" pin="5"/> -<wire x1="-12.7" y1="38.1" x2="15.24" y2="38.1" width="0.1524" layer="91"/> -<wire x1="15.24" y1="38.1" x2="15.24" y2="5.08" width="0.1524" layer="91"/> -<wire x1="15.24" y1="5.08" x2="190.5" y2="5.08" width="0.1524" layer="91"/> -<wire x1="190.5" y1="5.08" x2="190.5" y2="96.52" width="0.1524" layer="91"/> <pinref part="IC1" gate="A" pin="QH"/> -<wire x1="190.5" y1="96.52" x2="175.26" y2="96.52" width="0.1524" layer="91"/> -<label x="-10.16" y="38.1" size="1.778" layer="95"/> -<label x="177.8" y="96.52" size="1.778" layer="95"/> +<wire x1="210.82" y1="93.98" x2="200.66" y2="93.98" width="0.1524" layer="91"/> +</segment> +</net> +<net name="BIT_CLK" class="0"> +<segment> +<pinref part="SV1" gate="1" pin="4"/> +<wire x1="38.1" y1="30.48" x2="12.7" y2="30.48" width="0.1524" layer="91"/> +<label x="15.24" y="30.48" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="SCK"/> +<wire x1="210.82" y1="33.02" x2="200.66" y2="33.02" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="IC1" gate="A" pin="CLK"/> +<wire x1="175.26" y1="71.12" x2="170.18" y2="71.12" width="0.1524" layer="91"/> +<wire x1="170.18" y1="71.12" x2="170.18" y2="58.42" width="0.1524" layer="91"/> +<wire x1="210.82" y1="58.42" x2="170.18" y2="58.42" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="IC4" gate="A" pin="SCK"/> +<wire x1="38.1" y1="48.26" x2="58.42" y2="48.26" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="IC3" gate="A" pin="SCK"/> +<wire x1="38.1" y1="91.44" x2="58.42" y2="91.44" width="0.1524" layer="91"/> +</segment> +</net> +<net name="BYTE_CLK" class="0"> +<segment> +<pinref part="SV1" gate="1" pin="5"/> +<wire x1="38.1" y1="33.02" x2="12.7" y2="33.02" width="0.1524" layer="91"/> +<label x="15.24" y="33.02" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC4" gate="A" pin="RCK"/> +<wire x1="38.1" y1="40.64" x2="58.42" y2="40.64" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="IC3" gate="A" pin="RCK"/> +<wire x1="38.1" y1="83.82" x2="58.42" y2="83.82" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="RCK"/> +<wire x1="210.82" y1="40.64" x2="200.66" y2="40.64" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="IC1" gate="A" pin="SH/!LD"/> +<wire x1="175.26" y1="66.04" x2="172.72" y2="66.04" width="0.1524" layer="91"/> +<wire x1="172.72" y1="66.04" x2="172.72" y2="60.96" width="0.1524" layer="91"/> +<wire x1="210.82" y1="60.96" x2="172.72" y2="60.96" width="0.1524" layer="91"/> +</segment> +</net> +<net name="!CTRL_OE" class="0"> +<segment> +<pinref part="SV1" gate="1" pin="6"/> +<wire x1="38.1" y1="35.56" x2="12.7" y2="35.56" width="0.1524" layer="91"/> +<label x="15.24" y="35.56" size="1.778" layer="95"/> +</segment> +<segment> +<pinref part="IC4" gate="A" pin="G"/> +<wire x1="38.1" y1="30.48" x2="58.42" y2="30.48" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="IC2" gate="A" pin="G"/> +<wire x1="200.66" y1="50.8" x2="210.82" y2="50.8" width="0.1524" layer="91"/> +</segment> +<segment> +<pinref part="IC3" gate="A" pin="G"/> +<wire x1="38.1" y1="73.66" x2="58.42" y2="73.66" width="0.1524" layer="91"/> </segment> </net> </nets> diff --git a/vhdl/ram-ice.xise b/vhdl/ram-ice.xise index 53fce3b..337c9a3 100644 --- a/vhdl/ram-ice.xise +++ b/vhdl/ram-ice.xise @@ -32,12 +32,12 @@ </file> <file xil_pn:name="fmf/ff_package.vhd" xil_pn:type="FILE_VHDL"> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="3"/> - <association xil_pn:name="Implementation" xil_pn:seqID="0"/> + <association xil_pn:name="Implementation" xil_pn:seqID="2"/> <library xil_pn:name="fmf"/> </file> <file xil_pn:name="fmf/gen_utils.vhd" xil_pn:type="FILE_VHDL"> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="2"/> - <association xil_pn:name="Implementation" xil_pn:seqID="0"/> + <association xil_pn:name="Implementation" xil_pn:seqID="1"/> <library xil_pn:name="fmf"/> </file> <file xil_pn:name="fmf/memory.vhd" xil_pn:type="FILE_VHDL"> @@ -47,17 +47,17 @@ </file> <file xil_pn:name="fmf/state_tab_package.vhd" xil_pn:type="FILE_VHDL"> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="0"/> - <association xil_pn:name="Implementation" xil_pn:seqID="1"/> + <association xil_pn:name="Implementation" xil_pn:seqID="0"/> <library xil_pn:name="fmf"/> </file> <file xil_pn:name="fmf/std165.vhd" xil_pn:type="FILE_VHDL"> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="6"/> - <association xil_pn:name="Implementation" xil_pn:seqID="0"/> + <association xil_pn:name="Implementation" xil_pn:seqID="4"/> <library xil_pn:name="fmf"/> </file> <file xil_pn:name="fmf/std595.vhd" xil_pn:type="FILE_VHDL"> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="5"/> - <association xil_pn:name="Implementation" xil_pn:seqID="0"/> + <association xil_pn:name="Implementation" xil_pn:seqID="3"/> <library xil_pn:name="fmf"/> </file> <file xil_pn:name="mcu_interface_tb.vhd" xil_pn:type="FILE_VHDL"> @@ -66,16 +66,16 @@ </file> <file xil_pn:name="mcu_interface.vhd" xil_pn:type="FILE_VHDL"> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="7"/> - <association xil_pn:name="Implementation" xil_pn:seqID="0"/> + <association xil_pn:name="Implementation" xil_pn:seqID="5"/> </file> <file xil_pn:name="ieee_proposed/std_logic_1164_additions.vhdl" xil_pn:type="FILE_VHDL"> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="1"/> - <association xil_pn:name="Implementation" xil_pn:seqID="66"/> + <association xil_pn:name="Implementation" xil_pn:seqID="0"/> <library xil_pn:name="ieee_proposed"/> </file> <file xil_pn:name="ice.vhd" xil_pn:type="FILE_VHDL"> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="9"/> - <association xil_pn:name="Implementation" xil_pn:seqID="57"/> + <association xil_pn:name="Implementation" xil_pn:seqID="6"/> </file> <file xil_pn:name="AS7C256A.vhd" xil_pn:type="FILE_VHDL"> <association xil_pn:name="BehavioralSimulation" xil_pn:seqID="8"/> |