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| author | Trygve Laugstøl <trygvis@inamo.no> | 2017-01-25 22:24:18 +0100 |
|---|---|---|
| committer | Trygve Laugstøl <trygvis@inamo.no> | 2017-01-25 22:29:25 +0100 |
| commit | 40e04e3772726829d66c12e69f24b03920d79c67 (patch) | |
| tree | 636811bad956798c9d5d22de9e7ba8c799b8d791 /thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL | |
| parent | 2fff65aed2477a503c72629d27e2a330d30c02d1 (diff) | |
| download | stm32f103-playground-40e04e3772726829d66c12e69f24b03920d79c67.tar.gz stm32f103-playground-40e04e3772726829d66c12e69f24b03920d79c67.tar.bz2 stm32f103-playground-40e04e3772726829d66c12e69f24b03920d79c67.tar.xz stm32f103-playground-40e04e3772726829d66c12e69f24b03920d79c67.zip | |
o Moving tinyprintf and stm libraries under thirdparty.
Diffstat (limited to 'thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL')
13 files changed, 13322 insertions, 0 deletions
diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval.c new file mode 100644 index 0000000..540c87e --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval.c @@ -0,0 +1,882 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval.c + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file provides + * - set of firmware functions to manage Leds, push-button and COM ports + * - low level initialization functions for SD card (on SDIO), SPI serial + * flash (sFLASH) and temperature sensor (LM75) + * available on STM32L152D-EVAL evaluation board from STMicroelectronics. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval.h" +#include "stm32l1xx_spi.h" +#include "stm32l1xx_i2c.h" +#include "stm32l1xx_sdio.h" +#include "stm32l1xx_dma.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL + * @brief This file provides firmware functions to manage Leds, push-buttons, + * COM ports, SD card on SDIO, serial flash (sFLASH), serial EEPROM (sEE) + * and temperature sensor (LM75) available on STM32L152D-EVAL evaluation + * board from STMicroelectronics. + * @{ + */ + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Private_TypesDefinitions + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Private_Defines + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Private_Macros + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Private_Variables + * @{ + */ +GPIO_TypeDef* GPIO_PORT[LEDn] = {LED1_GPIO_PORT, LED2_GPIO_PORT, LED3_GPIO_PORT, + LED4_GPIO_PORT}; +const uint16_t GPIO_PIN[LEDn] = {LED1_PIN, LED2_PIN, LED3_PIN, + LED4_PIN}; +const uint32_t GPIO_CLK[LEDn] = {LED1_GPIO_CLK, LED2_GPIO_CLK, LED3_GPIO_CLK, + LED4_GPIO_CLK}; + +GPIO_TypeDef* BUTTON_PORT[BUTTONn] = {KEY_BUTTON_GPIO_PORT, RIGHT_BUTTON_GPIO_PORT, + LEFT_BUTTON_GPIO_PORT, UP_BUTTON_GPIO_PORT, + DOWN_BUTTON_GPIO_PORT, SEL_BUTTON_GPIO_PORT}; + +const uint16_t BUTTON_PIN[BUTTONn] = {KEY_BUTTON_PIN, RIGHT_BUTTON_PIN, + LEFT_BUTTON_PIN, UP_BUTTON_PIN, + DOWN_BUTTON_PIN, SEL_BUTTON_PIN}; + +const uint32_t BUTTON_CLK[BUTTONn] = {KEY_BUTTON_GPIO_CLK, RIGHT_BUTTON_GPIO_CLK, + LEFT_BUTTON_GPIO_CLK, UP_BUTTON_GPIO_CLK, + DOWN_BUTTON_GPIO_CLK, SEL_BUTTON_GPIO_CLK}; + +const uint16_t BUTTON_EXTI_LINE[BUTTONn] = {KEY_BUTTON_EXTI_LINE, + RIGHT_BUTTON_EXTI_LINE, + LEFT_BUTTON_EXTI_LINE, + UP_BUTTON_EXTI_LINE, + DOWN_BUTTON_EXTI_LINE, + SEL_BUTTON_EXTI_LINE}; + +const uint8_t BUTTON_PORT_SOURCE[BUTTONn] = {KEY_BUTTON_EXTI_PORT_SOURCE, + RIGHT_BUTTON_EXTI_PORT_SOURCE, + LEFT_BUTTON_EXTI_PORT_SOURCE, + UP_BUTTON_EXTI_PORT_SOURCE, + DOWN_BUTTON_EXTI_PORT_SOURCE, + SEL_BUTTON_EXTI_PORT_SOURCE}; + +const uint8_t BUTTON_PIN_SOURCE[BUTTONn] = {KEY_BUTTON_EXTI_PIN_SOURCE, + RIGHT_BUTTON_EXTI_PIN_SOURCE, + LEFT_BUTTON_EXTI_PIN_SOURCE, + UP_BUTTON_EXTI_PIN_SOURCE, + DOWN_BUTTON_EXTI_PIN_SOURCE, + SEL_BUTTON_EXTI_PIN_SOURCE}; + +const uint8_t BUTTON_IRQn[BUTTONn] = {KEY_BUTTON_EXTI_IRQn, RIGHT_BUTTON_EXTI_IRQn, + LEFT_BUTTON_EXTI_IRQn, UP_BUTTON_EXTI_IRQn, + DOWN_BUTTON_EXTI_IRQn, SEL_BUTTON_EXTI_IRQn}; + +USART_TypeDef* COM_USART[COMn] = {EVAL_COM1}; + +GPIO_TypeDef* COM_TX_PORT[COMn] = {EVAL_COM1_TX_GPIO_PORT}; + +GPIO_TypeDef* COM_RX_PORT[COMn] = {EVAL_COM1_RX_GPIO_PORT}; + +const uint32_t COM_USART_CLK[COMn] = {EVAL_COM1_CLK}; + +const uint32_t COM_TX_PORT_CLK[COMn] = {EVAL_COM1_TX_GPIO_CLK}; + +const uint32_t COM_RX_PORT_CLK[COMn] = {EVAL_COM1_RX_GPIO_CLK}; + +const uint16_t COM_TX_PIN[COMn] = {EVAL_COM1_TX_PIN}; + +const uint16_t COM_RX_PIN[COMn] = {EVAL_COM1_RX_PIN}; + +const uint8_t COM_TX_PIN_SOURCE[COMn] = {EVAL_COM1_TX_SOURCE}; + +const uint8_t COM_RX_PIN_SOURCE[COMn] = {EVAL_COM1_RX_SOURCE}; + +const uint8_t COM_TX_AF[COMn] = {EVAL_COM1_TX_AF}; + +const uint8_t COM_RX_AF[COMn] = {EVAL_COM1_RX_AF}; + +DMA_InitTypeDef sEEDMA_InitStructure; + +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Private_FunctionPrototypes + * @{ + */ + +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Private_Functions + * @{ + */ + +/** + * @brief Configures LED GPIO. + * @param Led: Specifies the Led to be configured. + * This parameter can be one of following parameters: + * @arg LED1 + * @arg LED2 + * @arg LED3 + * @arg LED4 + * @retval None + */ +void STM_EVAL_LEDInit(Led_TypeDef Led) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable the GPIO_LED Clock */ + RCC_AHBPeriphClockCmd(GPIO_CLK[Led], ENABLE); + + /* Configure the GPIO_LED pin */ + GPIO_InitStructure.GPIO_Pin = GPIO_PIN[Led]; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_Init(GPIO_PORT[Led], &GPIO_InitStructure); + GPIO_PORT[Led]->BSRRL = GPIO_PIN[Led]; +} + +/** + * @brief Turns selected LED On. + * @param Led: Specifies the Led to be set on. + * This parameter can be one of following parameters: + * @arg LED1 + * @arg LED2 + * @arg LED3 + * @arg LED4 + * @retval None + */ +void STM_EVAL_LEDOn(Led_TypeDef Led) +{ + GPIO_PORT[Led]->BSRRH = GPIO_PIN[Led]; +} + +/** + * @brief Turns selected LED Off. + * @param Led: Specifies the Led to be set off. + * This parameter can be one of following parameters: + * @arg LED1 + * @arg LED2 + * @arg LED3 + * @arg LED4 + * @retval None + */ +void STM_EVAL_LEDOff(Led_TypeDef Led) +{ + GPIO_PORT[Led]->BSRRL = GPIO_PIN[Led]; +} + +/** + * @brief Toggles the selected LED. + * @param Led: Specifies the Led to be toggled. + * This parameter can be one of following parameters: + * @arg LED1 + * @arg LED2 + * @arg LED3 + * @arg LED4 + * @retval None + */ +void STM_EVAL_LEDToggle(Led_TypeDef Led) +{ + GPIO_PORT[Led]->ODR ^= GPIO_PIN[Led]; +} + +/** + * @brief Configures Button GPIO and EXTI Line. + * @param Button: Specifies the Button to be configured. + * This parameter can be one of following parameters: + * @arg BUTTON_KEY: Key Push Button + * @arg BUTTON_RIGHT: Joystick Right Push Button + * @arg BUTTON_LEFT: Joystick Left Push Button + * @arg BUTTON_UP: Joystick Up Push Button + * @arg BUTTON_DOWN: Joystick Down Push Button + * @arg BUTTON_SEL: Joystick Sel Push Button + * @param Button_Mode: Specifies Button mode. + * This parameter can be one of following parameters: + * @arg BUTTON_MODE_GPIO: Button will be used as simple IO + * @arg BUTTON_MODE_EXTI: Button will be connected to EXTI line with interrupt + * generation capability + * @retval None + */ +void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode) +{ + GPIO_InitTypeDef GPIO_InitStructure; + EXTI_InitTypeDef EXTI_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + /* There is no Wakeup and Tamper buttons on STM32L152D-EVAL. */ + + /* Enable the BUTTON Clock */ + RCC_AHBPeriphClockCmd(BUTTON_CLK[Button], ENABLE); + RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); + + /* Configure Button pin as input */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_InitStructure.GPIO_Pin = BUTTON_PIN[Button]; + GPIO_Init(BUTTON_PORT[Button], &GPIO_InitStructure); + + + if (Button_Mode == BUTTON_MODE_EXTI) + { + /* Connect Button EXTI Line to Button GPIO Pin */ + SYSCFG_EXTILineConfig(BUTTON_PORT_SOURCE[Button], BUTTON_PIN_SOURCE[Button]); + + /* Configure Button EXTI line */ + EXTI_InitStructure.EXTI_Line = BUTTON_EXTI_LINE[Button]; + EXTI_InitStructure.EXTI_Mode = EXTI_Mode_Interrupt; + + if(Button != BUTTON_KEY) + { + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Falling; + } + else + { + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; + } + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + EXTI_Init(&EXTI_InitStructure); + + /* Enable and set Button EXTI Interrupt to the lowest priority */ + NVIC_InitStructure.NVIC_IRQChannel = BUTTON_IRQn[Button]; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x0F; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + + NVIC_Init(&NVIC_InitStructure); + } +} + +/** + * @brief Returns the selected Button state. + * @param Button: Specifies the Button to be checked. + * This parameter can be one of following parameters: + * @arg BUTTON_KEY: Key Push Button + * @arg BUTTON_RIGHT: Joystick Right Push Button + * @arg BUTTON_LEFT: Joystick Left Push Button + * @arg BUTTON_UP: Joystick Up Push Button + * @arg BUTTON_DOWN: Joystick Down Push Button + * @arg BUTTON_SEL: Joystick Sel Push Button + * @retval The Button GPIO pin value. + */ +uint32_t STM_EVAL_PBGetState(Button_TypeDef Button) +{ + /* There is no Wakeup and Tamper pins on STM32L152D-EVAL. */ + + return GPIO_ReadInputDataBit(BUTTON_PORT[Button], BUTTON_PIN[Button]); +} + +/** + * @brief Configures COM port. + * @param COM: Specifies the COM port to be configured. + * This parameter can be one of following parameters: + * @arg COM1 + * @param USART_InitStruct: pointer to a USART_InitTypeDef structure that + * contains the configuration information for the specified USART peripheral. + * @retval None + */ +void STM_EVAL_COMInit(COM_TypeDef COM, USART_InitTypeDef* USART_InitStruct) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable GPIO clock */ + RCC_AHBPeriphClockCmd(COM_TX_PORT_CLK[COM] | COM_RX_PORT_CLK[COM], ENABLE); + + /* Enable USART1 clock */ + RCC_APB2PeriphClockCmd(COM_USART_CLK[COM], ENABLE); + + /* Connect PXx to USARTx_Tx */ + GPIO_PinAFConfig(COM_TX_PORT[COM], COM_TX_PIN_SOURCE[COM], COM_TX_AF[COM]); + + /* Connect PXx to USARTx_Rx */ + GPIO_PinAFConfig(COM_RX_PORT[COM], COM_RX_PIN_SOURCE[COM], COM_RX_AF[COM]); + + /* Configure USART Tx as alternate function push-pull */ + GPIO_InitStructure.GPIO_Pin = COM_TX_PIN[COM]; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(COM_TX_PORT[COM], &GPIO_InitStructure); + + /* Configure USART Rx as alternate function push-pull */ + GPIO_InitStructure.GPIO_Pin = COM_RX_PIN[COM]; + GPIO_Init(COM_RX_PORT[COM], &GPIO_InitStructure); + + /* USART configuration */ + USART_Init(COM_USART[COM], USART_InitStruct); + + /* Enable USART */ + USART_Cmd(COM_USART[COM], ENABLE); +} + +/** + * @brief DeInitializes the SDIO interface. + * @param None + * @retval None + */ +void SD_LowLevel_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< Disable SDIO Clock */ + SDIO_ClockCmd(DISABLE); + + /*!< Set Power State to OFF */ + SDIO_SetPowerState(SDIO_PowerState_OFF); + + /*!< DeInitializes the SDIO peripheral */ + SDIO_DeInit(); + + /* Disable the SDIO APB2 Clock */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, DISABLE); + + GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_MCO); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_MCO); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_MCO); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_MCO); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_MCO); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_MCO); + + /* Configure PC.08, PC.09, PC.10, PC.11 pins: D0, D1, D2, D3 pins */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(GPIOC, &GPIO_InitStructure); + + /* Configure PD.02 CMD line */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /* Configure PC.12 pin: CLK pin */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; + GPIO_Init(GPIOC, &GPIO_InitStructure); +} + +/** + * @brief Initializes the SD Card and put it into StandBy State (Ready for + * data transfer). + * @param None + * @retval None + */ +void SD_LowLevel_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* GPIOC and GPIOD Periph clock enable */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOC | RCC_AHBPeriph_GPIOD | SD_DETECT_GPIO_CLK, ENABLE); + + GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_SDIO); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_SDIO); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_SDIO); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_SDIO); + GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_SDIO); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_SDIO); + + /* Configure PC.08, PC.09, PC.10, PC.11 pins: D0, D1, D2, D3 pins */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(GPIOC, &GPIO_InitStructure); + + /* Configure PD.02 CMD line */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + /* Configure PC.12 pin: CLK pin */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(GPIOC, &GPIO_InitStructure); + + /*!< Configure SD_SPI_DETECT_PIN pin: SD Card detect pin */ + GPIO_InitStructure.GPIO_Pin = SD_DETECT_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(SD_DETECT_GPIO_PORT, &GPIO_InitStructure); + + /* Enable the SDIO APB2 Clock */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_SDIO, ENABLE); + + /* Enable the DMA2 Clock */ + RCC_AHBPeriphClockCmd(SD_SDIO_DMA_CLK, ENABLE); +} + +/** + * @brief Configures the DMA2 Channel4 for SDIO Tx request. + * @param BufferSRC: pointer to the source buffer + * @param BufferSize: buffer size + * @retval None + */ +void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize) +{ + DMA_InitTypeDef DMA_InitStructure; + + DMA_ClearFlag(SD_SDIO_DMA_FLAG_TC | SD_SDIO_DMA_FLAG_TE | SD_SDIO_DMA_FLAG_HT | SD_SDIO_DMA_FLAG_GL); + + /*!< SDIO DMA CHANNEL disable */ + DMA_Cmd(SD_SDIO_DMA_CHANNEL, DISABLE); + + /*!< SDIO DMA CHANNEL Config */ + DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_ADDRESS; + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferSRC; + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; + DMA_InitStructure.DMA_BufferSize = BufferSize / 4; + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; + DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + DMA_InitStructure.DMA_Priority = DMA_Priority_High; + DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + DMA_Init(SD_SDIO_DMA_CHANNEL, &DMA_InitStructure); + DMA_ITConfig(SD_SDIO_DMA_CHANNEL, DMA_IT_TC, ENABLE); + /*!< SDIO DMA CHANNEL enable */ + DMA_Cmd(SD_SDIO_DMA_CHANNEL, ENABLE); +} + +/** + * @brief Configures the DMA2 Channel4 for SDIO Rx request. + * @param BufferDST: pointer to the destination buffer + * @param BufferSize: buffer size + * @retval None + */ +void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize) +{ + DMA_InitTypeDef DMA_InitStructure; + + DMA_ClearFlag(SD_SDIO_DMA_FLAG_TC | SD_SDIO_DMA_FLAG_TE | SD_SDIO_DMA_FLAG_HT | SD_SDIO_DMA_FLAG_GL); + + /*!< SDIO DMA CHANNEL disable */ + DMA_Cmd(SD_SDIO_DMA_CHANNEL, DISABLE); + + /*!< SDIO DMA CHANNEL Config */ + DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SDIO_FIFO_ADDRESS; + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)BufferDST; + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; + DMA_InitStructure.DMA_BufferSize = BufferSize / 4; + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Word; + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Word; + DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + DMA_InitStructure.DMA_Priority = DMA_Priority_High; + DMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + DMA_Init(SD_SDIO_DMA_CHANNEL, &DMA_InitStructure); + DMA_ITConfig(SD_SDIO_DMA_CHANNEL, DMA_IT_TC, ENABLE); + /*!< SDIO DMA CHANNEL enable */ + DMA_Cmd(SD_SDIO_DMA_CHANNEL, ENABLE); +} + +/** + * @brief DeInitializes the LM75_I2C. + * @param None + * @retval None + */ +void LM75_LowLevel_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< Disable LM75_I2C */ + I2C_Cmd(LM75_I2C, DISABLE); + + /*!< DeInitializes the LM75_I2C */ + I2C_DeInit(LM75_I2C); + + /*!< LM75_I2C Periph clock disable */ + RCC_APB1PeriphClockCmd(LM75_I2C_CLK, DISABLE); + + /*!< Configure LM75_I2C pins: SCL */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SCL_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(LM75_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure LM75_I2C pins: SDA */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SDA_PIN; + GPIO_Init(LM75_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure LM75_I2C pin: SMBUS ALERT */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SMBUSALERT_PIN; + GPIO_Init(LM75_I2C_SMBUSALERT_GPIO_PORT, &GPIO_InitStructure); +} + +/** + * @brief Initializes the LM75_I2C.. + * @param None + * @retval None + */ +void LM75_LowLevel_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< LM75_I2C Periph clock enable */ + RCC_APB1PeriphClockCmd(LM75_I2C_CLK, ENABLE); + + /*!< LM75_I2C_SCL_GPIO_CLK, LM75_I2C_SDA_GPIO_CLK + and LM75_I2C_SMBUSALERT_GPIO_CLK Periph clock enable */ + RCC_AHBPeriphClockCmd(LM75_I2C_SCL_GPIO_CLK | LM75_I2C_SDA_GPIO_CLK | + LM75_I2C_SMBUSALERT_GPIO_CLK, ENABLE); + + /* Connect PXx to I2C_SCL */ + GPIO_PinAFConfig(LM75_I2C_SCL_GPIO_PORT, LM75_I2C_SCL_SOURCE, LM75_I2C_SCL_AF); + + /* Connect PXx to I2C_SDA */ + GPIO_PinAFConfig(LM75_I2C_SDA_GPIO_PORT, LM75_I2C_SDA_SOURCE, LM75_I2C_SDA_AF); + + /* Connect PXx to I2C_SMBUSALER */ + GPIO_PinAFConfig(LM75_I2C_SMBUSALERT_GPIO_PORT, LM75_I2C_SMBUSALERT_SOURCE, LM75_I2C_SMBUSALERT_AF); + + /*!< Configure LM75_I2C pins: SCL */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SCL_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(LM75_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure LM75_I2C pins: SDA */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SDA_PIN; + GPIO_Init(LM75_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure LM75_I2C pin: SMBUS ALERT */ + GPIO_InitStructure.GPIO_Pin = LM75_I2C_SMBUSALERT_PIN; + GPIO_Init(LM75_I2C_SMBUSALERT_GPIO_PORT, &GPIO_InitStructure); +} + +/** + * @brief DeInitializes the SPI interface. + * @param None + * @retval None + */ +void sEE_SPI_LowLevel_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + SPI_Cmd(sEE_SPI, DISABLE); /*!< sEE_SPI disable */ + SPI_I2S_DeInit(sEE_SPI); /*!< DeInitializes the sEE_SPI */ + + /*!< sEE_SPI Periph clock disable */ + RCC_APB1PeriphClockCmd(sEE_SPI_CLK, DISABLE); + + /*!< Configure sEE_SPI pins: SCK */ + GPIO_InitStructure.GPIO_Pin = sEE_SPI_SCK_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(sEE_SPI_SCK_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE pins: MISO */ + GPIO_InitStructure.GPIO_Pin = sEE_SPI_MISO_PIN; + GPIO_Init(sEE_SPI_MISO_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE pins: MOSI */ + GPIO_InitStructure.GPIO_Pin = sEE_SPI_MOSI_PIN; + GPIO_Init(sEE_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE_CS_PIN pin: sEE Card CS pin */ + GPIO_InitStructure.GPIO_Pin = sEE_SPI_CS_PIN; + GPIO_Init(sEE_SPI_CS_GPIO_PORT, &GPIO_InitStructure); +} + +/** + * @brief Initializes the SPI interface for EEPROM + * @param None + * @retval None + */ +void sEE_SPI_LowLevel_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + SPI_InitTypeDef SPI_InitStructure; + + /*!< sEE_CS_GPIO, sEE_MOSI_GPIO, sEE_MISO_GPIO and sEE_SCK_GPIO + Periph clock enable */ + RCC_AHBPeriphClockCmd(sEE_SPI_CS_GPIO_CLK | sEE_SPI_MOSI_GPIO_CLK | sEE_SPI_MISO_GPIO_CLK | + sEE_SPI_SCK_GPIO_CLK , ENABLE); + + /*!< sEE Periph clock enable */ + RCC_APB2PeriphClockCmd(sEE_SPI_CLK, ENABLE); + + /*!< Configure sEE pins: SCK */ + GPIO_InitStructure.GPIO_Pin = sEE_SPI_SCK_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_Init(sEE_SPI_SCK_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE_SPI pins: MISO */ + GPIO_InitStructure.GPIO_Pin = sEE_SPI_MISO_PIN; + GPIO_Init(sEE_SPI_MISO_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE_SPI pins: MOSI */ + GPIO_InitStructure.GPIO_Pin = sEE_SPI_MOSI_PIN; + GPIO_Init(sEE_SPI_MOSI_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE_SPI_CS_PIN pin: sEE_SPI Card CS pin */ + GPIO_InitStructure.GPIO_Pin = sEE_SPI_CS_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_UP; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_Init(sEE_SPI_CS_GPIO_PORT, &GPIO_InitStructure); + + /* Connect PXx to sEE_SPI_SCK */ + GPIO_PinAFConfig(sEE_SPI_SCK_GPIO_PORT, sEE_SPI_SCK_SOURCE, sEE_SPI_SCK_AF); + + /* Connect PXx to sEE_SPI_MISO */ + GPIO_PinAFConfig(sEE_SPI_MISO_GPIO_PORT, sEE_SPI_MISO_SOURCE, sEE_SPI_MISO_AF); + + /* Connect PXx to sEE_SPI_MOSI */ + GPIO_PinAFConfig(sEE_SPI_MOSI_GPIO_PORT, sEE_SPI_MOSI_SOURCE, sEE_SPI_MOSI_AF); + + /*!< sEE SPI Config */ + SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; + SPI_InitStructure.SPI_Mode = SPI_Mode_Master; + SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; + SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; + SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; + SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; + SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2; + SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; + SPI_InitStructure.SPI_CRCPolynomial = 7; + SPI_Init(sEE_SPI, &SPI_InitStructure); + + SPI_Cmd(sEE_SPI, ENABLE); /*!< sEE_SPI enable */ +} + +/** + * @brief DeInitializes peripherals used by the I2C EEPROM driver. + * @param None + * @retval None + */ +void sEE_LowLevel_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + /* sEE_I2C Peripheral Disable */ + I2C_Cmd(sEE_I2C, DISABLE); + + /* sEE_I2C DeInit */ + I2C_DeInit(sEE_I2C); + + /*!< sEE_I2C Periph clock disable */ + RCC_APB1PeriphClockCmd(sEE_I2C_CLK, DISABLE); + + /*!< GPIO configuration */ + /*!< Configure sEE_I2C pins: SCL */ + GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE_I2C pins: SDA */ + GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN; + GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); + + /* Configure and enable I2C DMA TX Channel interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_TX_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; + NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Configure and enable I2C DMA RX Channel interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_RX_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; + NVIC_Init(&NVIC_InitStructure); + + /* Disable and Deinitialize the DMA channels */ + DMA_Cmd(sEE_I2C_DMA_CHANNEL_TX, DISABLE); + DMA_Cmd(sEE_I2C_DMA_CHANNEL_RX, DISABLE); + DMA_DeInit(sEE_I2C_DMA_CHANNEL_TX); + DMA_DeInit(sEE_I2C_DMA_CHANNEL_RX); +} + +/** + * @brief Initializes peripherals used by the I2C EEPROM driver. + * @param None + * @retval None + */ +void sEE_LowLevel_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + NVIC_InitTypeDef NVIC_InitStructure; + + /*!< sEE_I2C_SCL_GPIO_CLK and sEE_I2C_SDA_GPIO_CLK Periph clock enable */ + RCC_AHBPeriphClockCmd(sEE_I2C_SCL_GPIO_CLK | sEE_I2C_SDA_GPIO_CLK, ENABLE); + + /*!< sEE_I2C Periph clock enable */ + RCC_APB1PeriphClockCmd(sEE_I2C_CLK, ENABLE); + + /* Connect PXx to I2C_SCL*/ + GPIO_PinAFConfig(sEE_I2C_SCL_GPIO_PORT, sEE_I2C_SCL_SOURCE, sEE_I2C_SCL_AF); + + /* Connect PXx to I2C_SDA*/ + GPIO_PinAFConfig(sEE_I2C_SDA_GPIO_PORT, sEE_I2C_SDA_SOURCE, sEE_I2C_SDA_AF); + + /*!< GPIO configuration */ + /*!< Configure sEE_I2C pins: SCL */ + GPIO_InitStructure.GPIO_Pin = sEE_I2C_SCL_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; + GPIO_Init(sEE_I2C_SCL_GPIO_PORT, &GPIO_InitStructure); + + /*!< Configure sEE_I2C pins: SDA */ + GPIO_InitStructure.GPIO_Pin = sEE_I2C_SDA_PIN; + GPIO_Init(sEE_I2C_SDA_GPIO_PORT, &GPIO_InitStructure); + + /* Configure and enable I2C DMA TX Channel interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_TX_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Configure and enable I2C DMA RX Channel interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = sEE_I2C_DMA_RX_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = sEE_I2C_DMA_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = sEE_I2C_DMA_SUBPRIO; + NVIC_Init(&NVIC_InitStructure); + + /*!< I2C DMA TX and RX channels configuration */ + /* Enable the DMA clock */ + RCC_AHBPeriphClockCmd(sEE_I2C_DMA_CLK, ENABLE); + + /* I2C TX DMA Channel configuration */ + DMA_DeInit(sEE_I2C_DMA_CHANNEL_TX); + sEEDMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)sEE_I2C_DR_Address; + sEEDMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)0; /* This parameter will be configured durig communication */ + sEEDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; /* This parameter will be configured durig communication */ + sEEDMA_InitStructure.DMA_BufferSize = 0xFFFF; /* This parameter will be configured durig communication */ + sEEDMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + sEEDMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + sEEDMA_InitStructure.DMA_PeripheralDataSize = DMA_MemoryDataSize_Byte; + sEEDMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte; + sEEDMA_InitStructure.DMA_Mode = DMA_Mode_Normal; + sEEDMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh; + sEEDMA_InitStructure.DMA_M2M = DMA_M2M_Disable; + DMA_Init(sEE_I2C_DMA_CHANNEL_TX, &sEEDMA_InitStructure); + + /* I2C RX DMA Channel configuration */ + DMA_DeInit(sEE_I2C_DMA_CHANNEL_RX); + DMA_Init(sEE_I2C_DMA_CHANNEL_RX, &sEEDMA_InitStructure); + + /* Enable the DMA Channels Interrupts */ + DMA_ITConfig(sEE_I2C_DMA_CHANNEL_TX, DMA_IT_TC, ENABLE); + DMA_ITConfig(sEE_I2C_DMA_CHANNEL_RX, DMA_IT_TC, ENABLE); +} + + +/** + * @brief Initializes DMA channel used by the I2C EEPROM driver. + * @param None + * @retval None + */ +void sEE_LowLevel_DMAConfig(uint32_t pBuffer, uint32_t BufferSize, uint32_t Direction) +{ + /* Initialize the DMA with the new parameters */ + if (Direction == sEE_DIRECTION_TX) + { + /* Configure the DMA Tx Channel with the buffer address and the buffer size */ + sEEDMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)pBuffer; + sEEDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; + sEEDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize; + DMA_Init(sEE_I2C_DMA_CHANNEL_TX, &sEEDMA_InitStructure); + } + else + { + /* Configure the DMA Rx Channel with the buffer address and the buffer size */ + sEEDMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)pBuffer; + sEEDMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; + sEEDMA_InitStructure.DMA_BufferSize = (uint32_t)BufferSize; + DMA_Init(sEE_I2C_DMA_CHANNEL_RX, &sEEDMA_InitStructure); + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval.h new file mode 100644 index 0000000..f7e40bd --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval.h @@ -0,0 +1,465 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval.h + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file contains definitions for STM32L152D_EVAL's Leds, push-buttons + * COM ports and Temperature Sensor LM75 (on I2C) hardware resources. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L152D_EVAL_H +#define __STM32L152D_EVAL_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l1xx.h" +#include "stm32_eval_legacy.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_LOW_LEVEL + * @{ + */ + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Exported_Types + * @{ + */ +typedef enum +{ + LED1 = 0, + LED2 = 1, + LED3 = 2, + LED4 = 3 +} Led_TypeDef; + +typedef enum +{ + BUTTON_KEY = 0, + BUTTON_RIGHT = 1, + BUTTON_LEFT = 2, + BUTTON_UP = 3, + BUTTON_DOWN = 4, + BUTTON_SEL = 5 +} Button_TypeDef; + +typedef enum +{ + BUTTON_MODE_GPIO = 0, + BUTTON_MODE_EXTI = 1 +} ButtonMode_TypeDef; + +typedef enum +{ + JOY_NONE = 0, + JOY_SEL = 1, + JOY_DOWN = 2, + JOY_LEFT = 3, + JOY_RIGHT = 4, + JOY_UP = 5 +} JOYState_TypeDef +; + +typedef enum +{ + COM1 = 0, + COM2 = 1 +} COM_TypeDef; +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Exported_Constants + * @{ + */ + +/** + * @brief Define for STM32L152D_EVAL board + */ +#if !defined (USE_STM32L152D_EVAL) + #define USE_STM32L152D_EVAL +#endif + +/** @addtogroup STM32L152D_EVAL_LOW_LEVEL_LED + * @{ + */ +#define LEDn 4 + +#define LED1_PIN GPIO_Pin_3 +#define LED1_GPIO_PORT GPIOD +#define LED1_GPIO_CLK RCC_AHBPeriph_GPIOD + +#define LED2_PIN GPIO_Pin_7 +#define LED2_GPIO_PORT GPIOD +#define LED2_GPIO_CLK RCC_AHBPeriph_GPIOD + +#define LED3_PIN GPIO_Pin_14 +#define LED3_GPIO_PORT GPIOG +#define LED3_GPIO_CLK RCC_AHBPeriph_GPIOG + +#define LED4_PIN GPIO_Pin_15 +#define LED4_GPIO_PORT GPIOG +#define LED4_GPIO_CLK RCC_AHBPeriph_GPIOG + +/** + * @} + */ + +/** @addtogroup STM32L152D_EVAL_LOW_LEVEL_BUTTON + * @{ + */ +#define BUTTONn 6 +/* On STM32L152D-EVAL board, the KEY button is connected to PA.00 and it can + be use as Wakeup pin button. */ + +/** + * @brief Key push-button + */ +#define KEY_BUTTON_PIN GPIO_Pin_0 +#define KEY_BUTTON_GPIO_PORT GPIOA +#define KEY_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOA +#define KEY_BUTTON_EXTI_LINE EXTI_Line0 +#define KEY_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOA +#define KEY_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource0 +#define KEY_BUTTON_EXTI_IRQn EXTI0_IRQn + +/** + * @brief Joystick Right push-button + */ +#define RIGHT_BUTTON_PIN GPIO_Pin_7 +#define RIGHT_BUTTON_GPIO_PORT GPIOG +#define RIGHT_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOG +#define RIGHT_BUTTON_EXTI_LINE EXTI_Line7 +#define RIGHT_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOG +#define RIGHT_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource7 +#define RIGHT_BUTTON_EXTI_IRQn EXTI9_5_IRQn + +/** + * @brief Joystick Left push-button + */ +#define LEFT_BUTTON_PIN GPIO_Pin_6 +#define LEFT_BUTTON_GPIO_PORT GPIOG +#define LEFT_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOG +#define LEFT_BUTTON_EXTI_LINE EXTI_Line6 +#define LEFT_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOG +#define LEFT_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource6 +#define LEFT_BUTTON_EXTI_IRQn EXTI9_5_IRQn + +/** + * @brief Joystick Up push-button + */ +#define UP_BUTTON_PIN GPIO_Pin_11 +#define UP_BUTTON_GPIO_PORT GPIOG +#define UP_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOG +#define UP_BUTTON_EXTI_LINE EXTI_Line11 +#define UP_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOG +#define UP_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource11 +#define UP_BUTTON_EXTI_IRQn EXTI15_10_IRQn + +/** + * @brief Joystick Down push-button + */ +#define DOWN_BUTTON_PIN GPIO_Pin_8 +#define DOWN_BUTTON_GPIO_PORT GPIOG +#define DOWN_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOG +#define DOWN_BUTTON_EXTI_LINE EXTI_Line8 +#define DOWN_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOG +#define DOWN_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource8 +#define DOWN_BUTTON_EXTI_IRQn EXTI9_5_IRQn + +/** + * @brief Joystick Sel push-button + */ +#define SEL_BUTTON_PIN GPIO_Pin_13 +#define SEL_BUTTON_GPIO_PORT GPIOG +#define SEL_BUTTON_GPIO_CLK RCC_AHBPeriph_GPIOG +#define SEL_BUTTON_EXTI_LINE EXTI_Line13 +#define SEL_BUTTON_EXTI_PORT_SOURCE EXTI_PortSourceGPIOG +#define SEL_BUTTON_EXTI_PIN_SOURCE EXTI_PinSource13 +#define SEL_BUTTON_EXTI_IRQn EXTI15_10_IRQn + +/** + * @} + */ + +/** @addtogroup STM32L152D_EVAL_LOW_LEVEL_COM + * @{ + */ +#define COMn 1 + +/** + * @brief Definition for COM port1, connected to USART1 + */ +#define EVAL_COM1 USART1 +#define EVAL_COM1_CLK RCC_APB2Periph_USART1 + +#define EVAL_COM1_TX_PIN GPIO_Pin_9 +#define EVAL_COM1_TX_GPIO_PORT GPIOA +#define EVAL_COM1_TX_GPIO_CLK RCC_AHBPeriph_GPIOA +#define EVAL_COM1_TX_SOURCE GPIO_PinSource9 +#define EVAL_COM1_TX_AF GPIO_AF_USART1 + +#define EVAL_COM1_RX_PIN GPIO_Pin_10 +#define EVAL_COM1_RX_GPIO_PORT GPIOA +#define EVAL_COM1_RX_GPIO_CLK RCC_AHBPeriph_GPIOA +#define EVAL_COM1_RX_SOURCE GPIO_PinSource10 +#define EVAL_COM1_RX_AF GPIO_AF_USART1 + +#define EVAL_COM1_IRQn USART1_IRQn + +/** + * @} + */ + +/** @addtogroup STM32L152D_EVAL_LOW_LEVEL_SD_FLASH + * @{ + */ +/** + * @brief SD FLASH SDIO Interface + */ +#define SD_DETECT_PIN GPIO_Pin_7 /* PC.07 */ +#define SD_DETECT_EXTI_LINE EXTI_Line7 +#define SD_DETECT_EXTI_PIN_SOURCE EXTI_PinSource7 + +#define SD_DETECT_GPIO_PORT GPIOC /* GPIOC */ +#define SD_DETECT_GPIO_CLK RCC_AHBPeriph_GPIOC +#define SD_DETECT_EXTI_PORT_SOURCE EXTI_PortSourceGPIOC +#define SD_DETECT_EXTI_IRQn EXTI9_5_IRQn + + +#define SDIO_FIFO_ADDRESS ((uint32_t)0x40012C80) +/** + * @brief SDIO Intialization Frequency (400KHz max) + */ +#define SDIO_INIT_CLK_DIV ((uint8_t)0x76) +/** + * @brief SDIO Data Transfer Frequency (24MHz max) + */ +#define SDIO_TRANSFER_CLK_DIV ((uint8_t)0x1) + + +#define SD_SDIO_DMA DMA2 +#define SD_SDIO_DMA_CLK RCC_AHBPeriph_DMA2 +#define SD_SDIO_DMA_CHANNEL DMA2_Channel4 +#define SD_SDIO_DMA_FLAG_TC DMA2_FLAG_TC4 +#define SD_SDIO_DMA_FLAG_TE DMA2_FLAG_TE4 +#define SD_SDIO_DMA_FLAG_HT DMA2_FLAG_HT4 +#define SD_SDIO_DMA_FLAG_GL DMA2_FLAG_GL4 +#define SD_SDIO_DMA_IRQn DMA2_Channel4_IRQn +#define SD_SDIO_DMA_IRQHANDLER DMA2_Channel4_IRQHandler +/** + * @} + */ + +/** @addtogroup STM32L152D_EVAL_LOW_LEVEL_TSENSOR_I2C + * @{ + */ +/** + * @brief LM75 Temperature Sensor I2C Interface pins + */ +#define LM75_I2C I2C1 +#define LM75_I2C_CLK RCC_APB1Periph_I2C1 +#define LM75_I2C_SCL_PIN GPIO_Pin_8 /* PB.08 */ +#define LM75_I2C_SCL_GPIO_PORT GPIOB /* GPIOB */ +#define LM75_I2C_SCL_GPIO_CLK RCC_AHBPeriph_GPIOB +#define LM75_I2C_SCL_SOURCE GPIO_PinSource8 +#define LM75_I2C_SCL_AF GPIO_AF_I2C1 +#define LM75_I2C_SDA_PIN GPIO_Pin_9 /* PB.09 */ +#define LM75_I2C_SDA_GPIO_PORT GPIOB /* GPIOB */ +#define LM75_I2C_SDA_GPIO_CLK RCC_AHBPeriph_GPIOB +#define LM75_I2C_SDA_SOURCE GPIO_PinSource9 +#define LM75_I2C_SDA_AF GPIO_AF_I2C1 +#define LM75_I2C_SMBUSALERT_PIN GPIO_Pin_5 /* PB.05 */ +#define LM75_I2C_SMBUSALERT_GPIO_PORT GPIOB /* GPIOB */ +#define LM75_I2C_SMBUSALERT_GPIO_CLK RCC_AHBPeriph_GPIOB +#define LM75_I2C_SMBUSALERT_SOURCE GPIO_PinSource5 +#define LM75_I2C_SMBUSALERT_AF GPIO_AF_I2C1 +#define LM75_I2C_DR ((uint32_t)0x40005410) + +#define LM75_DMA_CLK RCC_AHBPeriph_DMA1 +#define LM75_DMA_TX_CHANNEL DMA1_Channel6 +#define LM75_DMA_RX_CHANNEL DMA1_Channel7 +#define LM75_DMA_TX_TCFLAG DMA1_FLAG_TC6 +#define LM75_DMA_RX_TCFLAG DMA1_FLAG_TC7 +/** + * @} + */ + +/** @addtogroup STM32L152D_EVAL_LOW_LEVEL_SPI_EE + * @{ + */ +/** + * @brief sEE SPI Interface pins + */ +#define sEE_SPI SPI1 +#define sEE_SPI_CLK RCC_APB2Periph_SPI1 + +#define sEE_SPI_SCK_PIN GPIO_Pin_5 /* PA.05 */ +#define sEE_SPI_SCK_GPIO_PORT GPIOA /* GPIOA */ +#define sEE_SPI_SCK_GPIO_CLK RCC_AHBPeriph_GPIOA +#define sEE_SPI_SCK_SOURCE GPIO_PinSource5 +#define sEE_SPI_SCK_AF GPIO_AF_SPI1 + +#define sEE_SPI_MISO_PIN GPIO_Pin_14 /* PE.14 */ +#define sEE_SPI_MISO_GPIO_PORT GPIOE /* GPIOE */ +#define sEE_SPI_MISO_GPIO_CLK RCC_AHBPeriph_GPIOE +#define sEE_SPI_MISO_SOURCE GPIO_PinSource14 +#define sEE_SPI_MISO_AF GPIO_AF_SPI1 + +#define sEE_SPI_MOSI_PIN GPIO_Pin_15 /* PE.15 */ +#define sEE_SPI_MOSI_GPIO_PORT GPIOE /* GPIOE */ +#define sEE_SPI_MOSI_GPIO_CLK RCC_AHBPeriph_GPIOE +#define sEE_SPI_MOSI_SOURCE GPIO_PinSource15 +#define sEE_SPI_MOSI_AF GPIO_AF_SPI1 + +#define sEE_SPI_CS_PIN GPIO_Pin_5 /* PC.05 */ +#define sEE_SPI_CS_GPIO_PORT GPIOC /* GPIOC */ +#define sEE_SPI_CS_GPIO_CLK RCC_AHBPeriph_GPIOC + +/** + * @brief sEE SPI Interface Type + */ +#define sEE_M95040 + +/** + * @} + */ + +/** @addtogroup STM32L152D_EVAL_LOW_LEVEL_I2C_EE + * @{ + */ +/** + * @brief I2C EEPROM Interface pins + */ +#define sEE_I2C I2C1 +#define sEE_I2C_CLK RCC_APB1Periph_I2C1 + +#define sEE_I2C_SCL_PIN GPIO_Pin_8 /* PB.08 */ +#define sEE_I2C_SCL_GPIO_PORT GPIOB /* GPIOB */ +#define sEE_I2C_SCL_GPIO_CLK RCC_AHBPeriph_GPIOB +#define sEE_I2C_SCL_SOURCE GPIO_PinSource8 +#define sEE_I2C_SCL_AF GPIO_AF_I2C1 + +#define sEE_I2C_SDA_PIN GPIO_Pin_9 /* PB.09 */ +#define sEE_I2C_SDA_GPIO_PORT GPIOB /* GPIOB */ +#define sEE_I2C_SDA_GPIO_CLK RCC_AHBPeriph_GPIOB +#define sEE_I2C_SDA_SOURCE GPIO_PinSource9 +#define sEE_I2C_SDA_AF GPIO_AF_I2C1 + +#define sEE_M24LR64 + +#define sEE_I2C_DMA DMA1 +#define sEE_I2C_DMA_CHANNEL_TX DMA1_Channel6 +#define sEE_I2C_DMA_CHANNEL_RX DMA1_Channel7 +#define sEE_I2C_DMA_FLAG_TX_TC DMA1_IT_TC6 +#define sEE_I2C_DMA_FLAG_TX_GL DMA1_IT_GL6 +#define sEE_I2C_DMA_FLAG_RX_TC DMA1_IT_TC7 +#define sEE_I2C_DMA_FLAG_RX_GL DMA1_IT_GL7 +#define sEE_I2C_DMA_CLK RCC_AHBPeriph_DMA1 +#define sEE_I2C_DR_Address ((uint32_t)0x40005410) +#define sEE_USE_DMA + +#define sEE_I2C_DMA_TX_IRQn DMA1_Channel6_IRQn +#define sEE_I2C_DMA_RX_IRQn DMA1_Channel7_IRQn +#define sEE_I2C_DMA_TX_IRQHandler DMA1_Channel6_IRQHandler +#define sEE_I2C_DMA_RX_IRQHandler DMA1_Channel7_IRQHandler +#define sEE_I2C_DMA_PREPRIO 0 +#define sEE_I2C_DMA_SUBPRIO 0 + +#define sEE_DIRECTION_TX 0 +#define sEE_DIRECTION_RX 1 + +/* Time constant for the delay caclulation allowing to have a millisecond + incrementing counter. This value should be equal to (System Clock / 1000). + ie. if system clock = 32MHz then sEE_TIME_CONST should be 32. */ +#define sEE_TIME_CONST 32 + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Exported_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LOW_LEVEL_Exported_Functions + * @{ + */ +void STM_EVAL_LEDInit(Led_TypeDef Led); +void STM_EVAL_LEDOn(Led_TypeDef Led); +void STM_EVAL_LEDOff(Led_TypeDef Led); +void STM_EVAL_LEDToggle(Led_TypeDef Led); +void STM_EVAL_PBInit(Button_TypeDef Button, ButtonMode_TypeDef Button_Mode); +uint32_t STM_EVAL_PBGetState(Button_TypeDef Button); +void STM_EVAL_COMInit(COM_TypeDef COM, USART_InitTypeDef* USART_InitStruct); +void SD_LowLevel_DeInit(void); +void SD_LowLevel_Init(void); +void SD_LowLevel_DMA_TxConfig(uint32_t *BufferSRC, uint32_t BufferSize); +void SD_LowLevel_DMA_RxConfig(uint32_t *BufferDST, uint32_t BufferSize); +void LM75_LowLevel_DeInit(void); +void LM75_LowLevel_Init(void); +void sEE_SPI_LowLevel_DeInit(void); +void sEE_SPI_LowLevel_Init(void); +void sEE_LowLevel_DeInit(void); +void sEE_LowLevel_Init(void); +void sEE_LowLevel_DMAConfig(uint32_t pBuffer, uint32_t BufferSize, uint32_t Direction); +/** + * @} + */ +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L152D_EVAL_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_audio_codec.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_audio_codec.c new file mode 100644 index 0000000..4fad206 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_audio_codec.c @@ -0,0 +1,1489 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_audio_codec.c + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file includes the low layer driver for CS43L22 Audio Codec + * mounted on STM32L152D-EVAL board. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/*============================================================================================================================== + User NOTES +1. How To use this driver: +-------------------------- + - This driver supports STM32L1xx devices on STM32L152D-EVAL Evaluation boards. + + - Configure the options in file stm32l152d_eval_audio_codec.h in the section CONFIGURATION. + Refer to the sections 2 and 3 to have more details on the possible configurations. + + - Call the function EVAL_AUDIO_Init( + OutputDevice: physical output mode (OUTPUT_DEVICE_SPEAKER, + OUTPUT_DEVICE_HEADPHONE, OUTPUT_DEVICE_AUTO or + OUTPUT_DEVICE_BOTH) + Volume: intial volume to be set (0 is min (mute), 100 is max (100%) + AudioFreq: Audio frequency in Hz (8000, 16000, 22500, 32000 ...) + this parameter is relative to the audio file/stream type. + ) + This function configures all the hardware required for the audio application (codec, I2C, I2S, + GPIOs, DMA and interrupt if needed). This function returns 0 if configuration is OK. + if the returned value is different from 0 or the function is stuck then the communication with + the codec or the IOExpander has failed (try to unplug the power or reset device in this case). + + OUTPUT_DEVICE_SPEAKER: only speaker will be set as output for the audio stream. + + OUTPUT_DEVICE_HEADPHONE: only headphones will be set as output for the audio stream. + + OUTPUT_DEVICE_AUTO: Selection of output device is made through external switch (implemented + into the audio jack on the evaluation board). When the Headphone is connected it is used + as output. When the headphone is disconnected from tha audio jack, the output is + automatically switched to Speaker. + + OUTPUT_DEVICE_BOTH: both Speaker and Headphone are used as outputs for the audio stream + at the same time. + + - Call the function EVAL_AUDIO_Play( + pBuffer: pointer to the audio data file address + Size: size of the buffer to be sent in Bytes + ) + to start playing (for the first time) from the audio file/stream. + + - Call the function EVAL_AUDIO_PauseResume( + Cmd: AUDIO_PAUSE (or 0) to pause playing or AUDIO_RESUME (or + any value different from 0) to resume palying. + ) + Note. After calling EVAL_AUDIO_PauseResume() function for pause, only EVAL_AUDIO_PauseResume() should be called + for resume (it is not allowed to call EVAL_AUDIO_Play() in this case). + Note. This function should be called only when the audio file is played or paused (not stopped). + + - For each mode, you may need to implement the relative callback functions into your code. + The Callback functions are named EVAL_AUDIO_XXX_CallBack() and only their prototypes are declared in + the stm324xg_eval_audio_codec.h file. (refer to the example for more details on the callbacks implementations) + + - To Stop playing, to modify the volume level or to mute, use the functions + EVAL_AUDIO_Stop(), EVAL_AUDIO_VolumeCtl() and EVAL_AUDIO_Mute(). + + - The driver API and the callback functions are at the end of the stm324xg_eval_audio_codec.h file. + + + Driver architecture: + -------------------- + This driver is composed of three main layers: + o High Audio Layer: consists of the function API exported in the stm324xg_eval_audio_codec.h file + (EVAL_AUDIO_Init(), EVAL_AUDIO_Play() ...) + o Codec Control layer: consists of the functions API controlling the audio codec (CS43L22) and + included as local functions in file stm324xg_eval_audio_codec.c (Codec_Init(), Codec_Play() ...) + o Media Access Layer (MAL): which consists of functions allowing to access the media containing/ + providing the audio file/stream. These functions are also included as local functions into + the stm324xg_eval_audio_codec.c file (Audio_MAL_Init(), Audio_MAL_Play() ...) + Each set of functions (layer) may be implemented independently of the others and customized when + needed. + +2. Modes description: +--------------------- + + AUDIO_MAL_MODE_NORMAL : is suitable when the audio file is in a memory location. + + AUDIO_MAL_MODE_CIRCULAR: is suitable when the audio data are read either from a + memory location or from a device at real time (double buffer could be used). + +3. DMA interrupts description: +------------------------------ + + EVAL_AUDIO_IT_TC_ENABLE: Enable this define to use the DMA end of transfer interrupt. + then, a callback should be implemented by user to perform specific actions + when the DMA has finished the transfer. + + EVAL_AUDIO_IT_HT_ENABLE: Enable this define to use the DMA end of half transfer interrupt. + then, a callback should be implemented by user to perform specific actions + when the DMA has reached the half of the buffer transfer (generally, it is useful + to load the first half of buffer while DMA is loading from the second half). + + EVAL_AUDIO_IT_ER_ENABLE: Enable this define to manage the cases of error on DMA transfer. + +4. Known Limitations: +--------------------- + 1- When using the Speaker, if the audio file quality is not high enough, the speaker output + may produce high and uncomfortable noise level. To avoid this issue, to use speaker + output properly, try to increase audio file sampling rate (typically higher than 48KHz). + This operation will lead to larger file size. + 2- Communication with the audio codec (through I2C) may be corrupted if it is interrupted by some + user interrupt routines (in this case, interrupts could be disabled just before the start of + communication then re-enabled when it is over). Note that this communication is only done at + the configuration phase (EVAL_AUDIO_Init() or EVAL_AUDIO_Stop()) and when Volume control modification is + performed (EVAL_AUDIO_VolumeCtl() or EVAL_AUDIO_Mute()). When the audio data is played, no communication is + required with the audio codec. + 3- Parsing of audio file is not implemented (in order to determine audio file properties: Mono/Stereo, Data size, + File size, Audio Frequency, Audio Data header size ...). The configuration is fixed for the given audio file. + 4- Mono audio streaming is not supported (in order to play mono audio streams, each data should be sent twice + on the I2S or should be duplicated on the source buffer. Or convert the stream in stereo before playing). + 5- Supports only 16-bit audio data size. +===============================================================================================================================*/ + + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval_audio_codec.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_AUDIO_CODEC + * @brief This file includes the low layer driver for CS43L22 Audio Codec + * available on STM32L152D-EVAL Eval. + * @{ + */ + +/** @defgroup STM32L152D_EVAL_AUDIO_CODEC_Private_Types + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_AUDIO_CODEC_Private_Defines + * @{ + */ + +/* Mask for the bit EN of the I2S CFGR register */ +#define I2S_ENABLE_MASK 0x0400 + +/* Delay for the Codec to be correctly reset */ +#define CODEC_RESET_DELAY 0x4FFF + +/* Codec audio Standards */ +#ifdef I2S_STANDARD_PHILLIPS +#define CODEC_STANDARD 0x04 +#define I2S_STANDARD I2S_Standard_Phillips +#elif defined(I2S_STANDARD_MSB) +#define CODEC_STANDARD 0x00 +#define I2S_STANDARD I2S_Standard_MSB +#elif defined(I2S_STANDARD_LSB) +#define CODEC_STANDARD 0x08 +#define I2S_STANDARD I2S_Standard_LSB +#else +#error "Error: No audio communication standard selected !" +#endif /* I2S_STANDARD */ + +/* The 7 bits Codec address (sent through I2C interface) */ +#define CODEC_ADDRESS 0x94 /* b00100111 */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_AUDIO_CODEC_Private_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_AUDIO_CODEC_Private_Variables + * @{ + */ +/* This structure is declared global because it is handled by two different functions */ +static DMA_InitTypeDef DMA_InitStructure; + +DMA_InitTypeDef AUDIO_MAL_DMA_InitStructure; + +uint32_t AudioTotalSize = 0xFFFF; /* This variable holds the total size of the audio file */ +uint32_t AudioRemSize = 0xFFFF; /* This variable holds the remaining data in audio file */ +uint16_t *CurrentPos; /* This variable holds the current position of audio pointer */ + +__IO uint32_t CODECTimeout = CODEC_LONG_TIMEOUT; +__IO uint8_t OutputDev = 0; + +__IO uint32_t CurrAudioInterface = AUDIO_INTERFACE_I2S; +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_AUDIO_CODEC_Private_Function_Prototypes + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_AUDIO_CODEC_Private_Functions + * @{ + */ +static void Audio_MAL_IRQHandler(void); +/*----------------------------------- +Audio Codec functions +------------------------------------------*/ +/* High Layer codec functions */ +static uint32_t Codec_Init(uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq); +static uint32_t Codec_DeInit(void); +static uint32_t Codec_Play(void); +static uint32_t Codec_PauseResume(uint32_t Cmd); +static uint32_t Codec_Stop(uint32_t Cmd); +static uint32_t Codec_VolumeCtrl(uint8_t Volume); +static uint32_t Codec_Mute(uint32_t Cmd); +/* Low layer codec functions */ +static void Codec_CtrlInterface_Init(void); +static void Codec_CtrlInterface_DeInit(void); +static void Codec_AudioInterface_Init(uint32_t AudioFreq); +static void Codec_AudioInterface_DeInit(void); +static void Codec_Reset(void); +static uint32_t Codec_WriteRegister(uint8_t RegisterAddr, uint8_t RegisterValue); +static uint32_t Codec_ReadRegister(uint8_t RegisterAddr); +static void Codec_GPIO_Init(void); +static void Codec_GPIO_DeInit(void); +static void Delay(__IO uint32_t nCount); +/*----------------------------------------------------------------------------*/ + +/*----------------------------------- +MAL (Media Access Layer) functions +------------------------------------------*/ +/* Peripherals configuration functions */ +static void Audio_MAL_Init(void); +static void Audio_MAL_DeInit(void); +static void Audio_MAL_Play(uint32_t Addr, uint32_t Size); +static void Audio_MAL_PauseResume(uint32_t Cmd, uint32_t Addr); +static void Audio_MAL_Stop(void); + +/*----------------------------------------------------------------------------*/ + +/* DMA Channel definitions */ +DMA_Channel_TypeDef* AUDIO_MAL_DMA_CHANNEL = AUDIO_I2S_DMA_CHANNEL; +uint32_t AUDIO_MAL_DMA_CLOCK = AUDIO_I2S_DMA_CLOCK; +uint32_t AUDIO_MAL_DMA_DREG = AUDIO_I2S_DMA_DREG; +uint32_t AUDIO_MAL_DMA_IRQ = AUDIO_I2S_DMA_IRQ; +uint32_t AUDIO_MAL_DMA_FLAG_TC = AUDIO_I2S_DMA_FLAG_TC; +uint32_t AUDIO_MAL_DMA_FLAG_HT = AUDIO_I2S_DMA_FLAG_HT; +uint32_t AUDIO_MAL_DMA_FLAG_TE = AUDIO_I2S_DMA_FLAG_TE; + + +/** + * @brief Set the current audio interface (I2S). + * @param Interface: AUDIO_INTERFACE_I2S + * @retval None + */ +void EVAL_AUDIO_SetAudioInterface(uint32_t Interface) +{ + CurrAudioInterface = Interface; + + if (CurrAudioInterface == AUDIO_INTERFACE_I2S) + { + /* DMA Channel definitions */ + AUDIO_MAL_DMA_CLOCK = AUDIO_I2S_DMA_CLOCK; + AUDIO_MAL_DMA_DREG = AUDIO_I2S_DMA_DREG; + AUDIO_MAL_DMA_CHANNEL = AUDIO_I2S_DMA_CHANNEL; + AUDIO_MAL_DMA_IRQ = AUDIO_I2S_DMA_IRQ ; + AUDIO_MAL_DMA_FLAG_TC = AUDIO_I2S_DMA_FLAG_TC; + AUDIO_MAL_DMA_FLAG_HT = AUDIO_I2S_DMA_FLAG_HT; + AUDIO_MAL_DMA_FLAG_TE = AUDIO_I2S_DMA_FLAG_TE; + } +} + +/** + * @brief Configure the audio peripherals. + * @param OutputDevice: OUTPUT_DEVICE_SPEAKER, OUTPUT_DEVICE_HEADPHONE, + * OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO . + * @param Volume: Initial volume level (from 0 (Mute) to 100 (Max)) + * @param AudioFreq: Audio frequency used to play the audio stream. + * @retval 0 if correct communication, else wrong communication + */ +uint32_t EVAL_AUDIO_Init(uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq) +{ + /* Perform low layer Codec initialization */ + if (Codec_Init(OutputDevice, VOLUME_CONVERT(Volume), AudioFreq) != 0) + { + return 1; + } + else + { + /* I2S data transfer preparation: + Prepare the Media to be used for the audio transfer from memory to I2S peripheral */ + Audio_MAL_Init(); + + /* Return 0 when all operations are OK */ + return 0; + } +} + +/** + * @brief Deinitializes all the resources used by the codec (those initialized + * by EVAL_AUDIO_Init() function). + * @param None + * @retval 0 if correct communication, else wrong communication + */ +uint32_t EVAL_AUDIO_DeInit(void) +{ + /* DeInitialize the Media layer */ + Audio_MAL_DeInit(); + + /* DeInitialize Codec */ + Codec_DeInit(); + + return 0; +} + +/** + * @brief Starts playing audio stream from a data buffer for a determined size. + * @param pBuffer: Pointer to the buffer + * @param Size: Number of audio data BYTES. + * @retval 0 if correct communication, else wrong communication + */ +uint32_t EVAL_AUDIO_Play(uint16_t* pBuffer, uint32_t Size) +{ + /* Set the total number of data to be played (count in half-word) */ + AudioTotalSize = Size/2; + + /* Call the audio Codec Play function */ + Codec_Play(); + + /* Update the Media layer and enable it for play */ + Audio_MAL_Play((uint32_t)pBuffer, (uint32_t)(DMA_MAX(AudioTotalSize / 2))); + + /* Update the remaining number of data to be played */ + AudioRemSize = (Size/2) - DMA_MAX(AudioTotalSize); + + /* Update the current audio pointer position */ + CurrentPos = pBuffer + DMA_MAX(AudioTotalSize); + + return 0; +} + +/** + * @brief This function Pauses or Resumes the audio file stream. In case + * of using DMA, the DMA Pause feature is used. In all cases the I2S + * peripheral is disabled. + * + * @WARNING When calling EVAL_AUDIO_PauseResume() function for pause, only + * this function should be called for resume (use of EVAL_AUDIO_Play() + * function for resume could lead to unexpected behavior). + * + * @param Cmd: AUDIO_PAUSE (or 0) to pause, AUDIO_RESUME (or any value different + * from 0) to resume. + * @retval 0 if correct communication, else wrong communication + */ +uint32_t EVAL_AUDIO_PauseResume(uint32_t Cmd) +{ + /* Call the Audio Codec Pause/Resume function */ + if (Codec_PauseResume(Cmd) != 0) + { + return 1; + } + else + { + /* Call the Media layer pause/resume function */ + Audio_MAL_PauseResume(Cmd, 0); + + /* Return 0 if all operations are OK */ + return 0; + } +} + +/** + * @brief Stops audio playing and Power down the Audio Codec. + * @param Option: could be one of the following parameters + * - CODEC_PDWN_SW: for software power off (by writing registers). + * Then no need to reconfigure the Codec after power on. + * - CODEC_PDWN_HW: completely shut down the codec (physically). + * Then need to reconfigure the Codec after power on. + * @retval 0 if correct communication, else wrong communication + */ +uint32_t EVAL_AUDIO_Stop(uint32_t Option) +{ + /* Call Audio Codec Stop function */ + if (Codec_Stop(Option) != 0) + { + return 1; + } + else + { + /* Call Media layer Stop function */ + Audio_MAL_Stop(); + + /* Update the remaining data number */ + AudioRemSize = AudioTotalSize; + + /* Return 0 when all operations are correctly done */ + return 0; + } +} + +/** + * @brief Controls the current audio volume level. + * @param Volume: Volume level to be set in percentage from 0% to 100% (0 for + * Mute and 100 for Max volume level). + * @retval 0 if correct communication, else wrong communication + */ +uint32_t EVAL_AUDIO_VolumeCtl(uint8_t Volume) +{ + /* Call the codec volume control function with converted volume value */ + return (Codec_VolumeCtrl(VOLUME_CONVERT(Volume))); +} + +/** + * @brief Enables or disables the MUTE mode by software + * @param Command: could be AUDIO_MUTE_ON to mute sound or AUDIO_MUTE_OFF to + * unmute the codec and restore previous volume level. + * @retval 0 if correct communication, else wrong communication + */ +uint32_t EVAL_AUDIO_Mute(uint32_t Cmd) +{ + /* Call the Codec Mute function */ + return (Codec_Mute(Cmd)); +} + +/** + * @brief This function handles main Media layer interrupt. + * @param None + * @retval 0 if correct communication, else wrong communication + */ +static void Audio_MAL_IRQHandler(void) +{ +#ifndef AUDIO_MAL_MODE_NORMAL + uint16_t *pAddr = (uint16_t *)CurrentPos; + uint32_t Size = AudioRemSize; +#endif /* AUDIO_MAL_MODE_NORMAL */ + +#ifdef AUDIO_MAL_DMA_IT_TC_EN + /* Transfer complete interrupt */ + if (DMA_GetFlagStatus(AUDIO_MAL_DMA_FLAG_TC) != RESET) + { +#ifdef AUDIO_MAL_MODE_NORMAL + /* Check if the end of file has been reached */ + if (AudioRemSize > 0) + { + /* Clear the Interrupt flag */ + DMA_ClearFlag( AUDIO_MAL_DMA_FLAG_TC); + + /* Re-Configure the buffer address and size */ + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t) CurrentPos; + DMA_InitStructure.DMA_BufferSize = (uint32_t) (DMA_MAX(AudioRemSize)); + + /* Configure the DMA Channel with the new parameters */ + DMA_Init(AUDIO_MAL_DMA_CHANNEL, &DMA_InitStructure); + + /* Enable the I2S DMA Channel*/ + DMA_Cmd(AUDIO_MAL_DMA_CHANNEL, ENABLE); + + /* Update the current pointer position */ + CurrentPos += DMA_MAX(AudioRemSize); + + /* Update the remaining number of data to be played */ + AudioRemSize -= DMA_MAX(AudioRemSize); + } + else + { + /* Disable the I2S DMA Channel*/ + DMA_Cmd(AUDIO_MAL_DMA_CHANNEL, DISABLE); + + /* Clear the Interrupt flag */ + DMA_ClearFlag(AUDIO_MAL_DMA_FLAG_TC); + + /* Manage the remaining file size and new address offset: This function + should be coded by user (its prototype is already declared in stm32l152d_eval_audio_codec.h) */ + EVAL_AUDIO_TransferComplete_CallBack((uint32_t)CurrentPos, 0); + } + +#elif defined(AUDIO_MAL_MODE_CIRCULAR) + /* Manage the remaining file size and new address offset: This function + should be coded by user (its prototype is already declared in stm32l152d_eval_audio_codec.h) */ + EVAL_AUDIO_TransferComplete_CallBack(*pAddr, Size); + + /* Clear the Interrupt flag */ + DMA_ClearFlag(AUDIO_MAL_DMA_FLAG_TC); +#endif /* AUDIO_MAL_MODE_NORMAL */ + } +#endif /* AUDIO_MAL_DMA_IT_TC_EN */ + +#ifdef AUDIO_MAL_DMA_IT_HT_EN + /* Half Transfer complete interrupt */ + if (DMA_GetFlagStatus(AUDIO_MAL_DMA_FLAG_HT) != RESET) + { + /* Manage the remaining file size and new address offset: This function + should be coded by user (its prototype is already declared in stm32l152d_eval_audio_codec.h) */ + EVAL_AUDIO_HalfTransfer_CallBack((uint32_t)pAddr, Size); + + /* Clear the Interrupt flag */ + DMA_ClearFlag(AUDIO_MAL_DMA_FLAG_HT); + } +#endif /* AUDIO_MAL_DMA_IT_HT_EN */ + +#ifdef AUDIO_MAL_DMA_IT_TE_EN + /* FIFO Error interrupt */ + if ((DMA_GetFlagStatus(AUDIO_MAL_DMA_FLAG_TE) != RESET)) + + { + /* Manage the error generated on DMA FIFO: This function + should be coded by user (its prototype is already declared in stm32l152d_eval_audio_codec.h) */ + EVAL_AUDIO_Error_CallBack((uint32_t*)&pAddr); + + /* Clear the Interrupt flag */ + DMA_ClearFlag(AUDIO_MAL_DMA_FLAG_TE); + } +#endif /* AUDIO_MAL_DMA_IT_TE_EN */ +} + +/** + * @brief This function handles main I2S interrupt. + * @param None + * @retval 0 if correct communication, else wrong communication + */ +void Audio_MAL_I2S_IRQHandler(void) +{ + Audio_MAL_IRQHandler(); +} + +/** + * @brief I2S interrupt management + * @param None + * @retval None + */ +void Audio_I2S_IRQHandler(void) +{ + EVAL_Audio_I2S_IRQHandler(); +} + +/*============================================================================== + CS43L22 Audio Codec Control Functions +==============================================================================*/ +/** + * @brief Initializes the audio codec and all related interfaces (control + * interface: I2C and audio interface: I2S) + * @param OutputDevice: can be OUTPUT_DEVICE_SPEAKER, OUTPUT_DEVICE_HEADPHONE, + * OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO . + * @param Volume: Initial volume level (from 0 (Mute) to 100 (Max)) + * @param AudioFreq: Audio frequency used to play the audio stream. + * @retval 0 if correct communication, else wrong communication + */ +static uint32_t Codec_Init(uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq) +{ + uint32_t counter = 0; + + /* Configure the Codec related IOs */ + Codec_GPIO_Init(); + + /* Reset the Codec Registers */ + Codec_Reset(); + + /* Initialize the Control interface of the Audio Codec */ + Codec_CtrlInterface_Init(); + + /* Keep Codec powered OFF */ + counter += Codec_WriteRegister(0x02, 0x01); + + switch (OutputDevice) + { + case OUTPUT_DEVICE_SPEAKER: + counter += Codec_WriteRegister(0x04, 0xFA); /* SPK always ON & HP always OFF */ + OutputDev = 0xFA; + break; + + case OUTPUT_DEVICE_HEADPHONE: + counter += Codec_WriteRegister(0x04, 0xAF); /* SPK always OFF & HP always ON */ + OutputDev = 0xAF; + break; + + case OUTPUT_DEVICE_BOTH: + counter += Codec_WriteRegister(0x04, 0xAA); /* SPK always ON & HP always ON */ + OutputDev = 0xAA; + break; + + case OUTPUT_DEVICE_AUTO: + counter += Codec_WriteRegister(0x04, 0x05); /* Detect the HP or the SPK automatically */ + OutputDev = 0x05; + break; + + default: + counter += Codec_WriteRegister(0x04, 0x05); /* Detect the HP or the SPK automatically */ + OutputDev = 0x05; + break; + } + + /* Clock configuration: Auto detection */ + counter += Codec_WriteRegister(0x05, 0x81); + + /* Set the Slave Mode and the audio Standard */ + counter += Codec_WriteRegister(0x06, CODEC_STANDARD); + + /* Set the Master volume */ + Codec_VolumeCtrl(Volume); + + /* If the Speaker is enabled, set the Mono mode and volume attenuation level */ + if (OutputDevice != OUTPUT_DEVICE_HEADPHONE) + { + /* Set the Speaker Mono mode */ + counter += Codec_WriteRegister(0x0F , 0x06); + + /* Set the Speaker attenuation level */ + counter += Codec_WriteRegister(0x24, 0xF0); + counter += Codec_WriteRegister(0x25, 0xF0); + } + + /* Power on the Codec */ + counter += Codec_WriteRegister(0x02, 0x9E); + + /* Configure the I2S peripheral */ + Codec_AudioInterface_Init(AudioFreq); + + /* Return communication control value */ + return counter; +} + +/** + * @brief Restore the audio codec state to default state and free all used + * resources. + * @param None + * @retval 0 if correct communication, else wrong communication + */ +static uint32_t Codec_DeInit(void) +{ + uint32_t counter = 0; + + /* Reset the Codec Registers */ + Codec_Reset(); + + /* Keep Codec powered OFF */ + counter += Codec_WriteRegister(0x02, 0x01); + + /* Deinitialize all use GPIOs */ + Codec_GPIO_DeInit(); + + /* Disable the Codec control interface */ + Codec_CtrlInterface_DeInit(); + + /* Deinitialize the Codec audio interface (I2S) */ + Codec_AudioInterface_DeInit(); + + /* Return communication control value */ + return counter; +} + +/** + * @brief Start the audio Codec play feature. + * @note For this codec no Play options are required. + * @param None + * @retval 0 if correct communication, else wrong communication + */ +static uint32_t Codec_Play(void) +{ + /* + No actions required on Codec level for play command + */ + + /* Return communication control value */ + return 0; +} + +/** + * @brief Pauses and resumes playing on the audio codec. + * @param Cmd: AUDIO_PAUSE (or 0) to pause, AUDIO_RESUME (or any value different + * from 0) to resume. + * @retval 0 if correct communication, else wrong communication + */ +static uint32_t Codec_PauseResume(uint32_t Cmd) +{ + uint32_t counter = 0; + + /* Pause the audio file playing */ + if (Cmd == AUDIO_PAUSE) + { + /* Mute the output first */ + counter += Codec_Mute(AUDIO_MUTE_ON); + + /* Put the Codec in Power save mode */ + counter += Codec_WriteRegister(0x02, 0x01); + } + else /* AUDIO_RESUME */ + { + /* Unmute the output first */ + counter += Codec_Mute(AUDIO_MUTE_OFF); + + counter += Codec_WriteRegister(0x04, OutputDev); + + /* Exit the Power save mode */ + counter += Codec_WriteRegister(0x02, 0x9E); + } + + return counter; +} + +/** + * @brief Stops audio Codec playing. It powers down the codec. + * @param CodecPdwnMode: selects the power down mode. + * - CODEC_PDWN_SW: only mutes the audio codec. When resuming from this + * mode the codec keeps the previous initialization + * (no need to re-Initialize the codec registers). + * - CODEC_PDWN_HW: Physically power down the codec. When resuming from this + * mode, the codec is set to default configuration + * (user should re-Initialize the codec in order to + * play again the audio stream). + * @retval 0 if correct communication, else wrong communication + */ +static uint32_t Codec_Stop(uint32_t CodecPdwnMode) +{ + uint32_t counter = 0; + + /* Mute the output first */ + Codec_Mute(AUDIO_MUTE_ON); + + if (CodecPdwnMode == CODEC_PDWN_SW) + { + /* Power down the speaker (PMSPK bits)*/ + counter += Codec_WriteRegister(0x02, 0x9F); + } + else /* CODEC_PDWN_HW */ + { + /* Power down the components */ + counter += Codec_WriteRegister(0x02, 0x9F); + + /* Wait at least 100us */ + Delay(0xFFF); + + /* Reset The pin */ + GPIO_WriteBit(AUDIO_RESET_GPIO, AUDIO_RESET_PIN, Bit_RESET); + } + + return counter; +} + +/** + * @brief Sets higher or lower the codec volume level. + * @param Volume: a byte value from 0 to 255 (refer to codec registers + * description for more details). + * @retval 0 if correct communication, else wrong communication + */ +static uint32_t Codec_VolumeCtrl(uint8_t Volume) +{ + uint32_t counter = 0; + + if (Volume > 0xE6) + { + /* Set the Master volume */ + counter += Codec_WriteRegister(0x20, Volume - 0xE7); + counter += Codec_WriteRegister(0x21, Volume - 0xE7); + } + else + { + /* Set the Master volume */ + counter += Codec_WriteRegister(0x20, Volume + 0x19); + counter += Codec_WriteRegister(0x21, Volume + 0x19); + } + + return counter; +} + +/** + * @brief Enables or disables the mute feature on the audio codec. + * @param Cmd: AUDIO_MUTE_ON to enable the mute or AUDIO_MUTE_OFF to disable the + * mute mode. + * @retval 0 if correct communication, else wrong communication + */ +static uint32_t Codec_Mute(uint32_t Cmd) +{ + uint32_t counter = 0; + + /* Set the Mute mode */ + if (Cmd == AUDIO_MUTE_ON) + { + counter += Codec_WriteRegister(0x04, 0xFF); + } + else /* AUDIO_MUTE_OFF Disable the Mute */ + { + counter += Codec_WriteRegister(0x04, OutputDev); + } + + return counter; +} + +/** + * @brief Resets the audio codec. It restores the default configuration of the + * codec (this function shall be called before initializing the codec). + * @note This function calls an external driver function: The IO Expander driver. + * @param None + * @retval None + */ +static void Codec_Reset(void) +{ + /* Power Down the codec */ + GPIO_WriteBit(AUDIO_RESET_GPIO, AUDIO_RESET_PIN, Bit_RESET); + + /* wait for a delay to insure registers erasing */ + Delay(CODEC_RESET_DELAY); + + /* Power on the codec */ + GPIO_WriteBit(AUDIO_RESET_GPIO, AUDIO_RESET_PIN, Bit_SET); +} + +/** + * @brief Writes a Byte to a given register into the audio codec through the + * control interface (I2C) + * @param RegisterAddr: The address (location) of the register to be written. + * @param RegisterValue: the Byte value to be written into destination register. + * @retval 0 if correct communication, else wrong communication + */ +static uint32_t Codec_WriteRegister(uint8_t RegisterAddr, uint8_t RegisterValue) +{ + uint32_t result = 0; + + /*!< While the bus is busy */ + CODECTimeout = CODEC_LONG_TIMEOUT; + while(I2C_GetFlagStatus(CODEC_I2C, I2C_FLAG_BUSY)) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /* Start the config sequence */ + I2C_GenerateSTART(CODEC_I2C, ENABLE); + + /* Test on EV5 and clear it */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while (!I2C_CheckEvent(CODEC_I2C, I2C_EVENT_MASTER_MODE_SELECT)) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /* Transmit the slave address and enable writing operation */ + I2C_Send7bitAddress(CODEC_I2C, CODEC_ADDRESS, I2C_Direction_Transmitter); + + /* Test on EV6 and clear it */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while (!I2C_CheckEvent(CODEC_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /* Transmit the first address for write operation */ + I2C_SendData(CODEC_I2C, RegisterAddr); + + /* Test on EV8 and clear it */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while (!I2C_CheckEvent(CODEC_I2C, I2C_EVENT_MASTER_BYTE_TRANSMITTING)) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /* Prepare the register value to be sent */ + I2C_SendData(CODEC_I2C, RegisterValue); + + /*!< Wait till all data have been physically transferred on the bus */ + CODECTimeout = CODEC_LONG_TIMEOUT; + while(!I2C_GetFlagStatus(CODEC_I2C, I2C_FLAG_BTF)) + { + if((CODECTimeout--) == 0) Codec_TIMEOUT_UserCallback(); + } + + /* End the configuration sequence */ + I2C_GenerateSTOP(CODEC_I2C, ENABLE); + +#ifdef VERIFY_WRITTENDATA + /* Verify that the data has been correctly written */ + result = (Codec_ReadRegister(RegisterAddr) == RegisterValue)? 0:1; +#endif /* VERIFY_WRITTENDATA */ + + /* Return the verifying value: 0 (Passed) or 1 (Failed) */ + return result; +} + +/** + * @brief Reads and returns the value of an audio codec register through the + * control interface (I2C). + * @param RegisterAddr: Address of the register to be read. + * @retval Value of the register to be read or dummy value if the communication + * fails. + */ +static uint32_t Codec_ReadRegister(uint8_t RegisterAddr) +{ + uint32_t result = 0; + + /*!< While the bus is busy */ + CODECTimeout = CODEC_LONG_TIMEOUT; + while(I2C_GetFlagStatus(CODEC_I2C, I2C_FLAG_BUSY)) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /* Start the config sequence */ + I2C_GenerateSTART(CODEC_I2C, ENABLE); + + /* Test on EV5 and clear it */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while (!I2C_CheckEvent(CODEC_I2C, I2C_EVENT_MASTER_MODE_SELECT)) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /* Transmit the slave address and enable writing operation */ + I2C_Send7bitAddress(CODEC_I2C, CODEC_ADDRESS, I2C_Direction_Transmitter); + + /* Test on EV6 and clear it */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while (!I2C_CheckEvent(CODEC_I2C, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /* Transmit the register address to be read */ + I2C_SendData(CODEC_I2C, RegisterAddr); + + /* Test on EV8 and clear it */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while (I2C_GetFlagStatus(CODEC_I2C, I2C_FLAG_BTF) == RESET) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /*!< Send START condition a second time */ + I2C_GenerateSTART(CODEC_I2C, ENABLE); + + /*!< Test on EV5 and clear it (cleared by reading SR1 then writing to DR) */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while(!I2C_CheckEvent(CODEC_I2C, I2C_EVENT_MASTER_MODE_SELECT)) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /*!< Send Codec address for read */ + I2C_Send7bitAddress(CODEC_I2C, CODEC_ADDRESS, I2C_Direction_Receiver); + + /* Wait on ADDR flag to be set (ADDR is still not cleared at this level */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while(I2C_GetFlagStatus(CODEC_I2C, I2C_FLAG_ADDR) == RESET) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /*!< Disable Acknowledgment */ + I2C_AcknowledgeConfig(CODEC_I2C, DISABLE); + + /* Clear ADDR register by reading SR1 then SR2 register (SR1 has already been read) */ + (void)CODEC_I2C->SR2; + + /*!< Send STOP Condition */ + I2C_GenerateSTOP(CODEC_I2C, ENABLE); + + /* Wait for the byte to be received */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while(I2C_GetFlagStatus(CODEC_I2C, I2C_FLAG_RXNE) == RESET) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /*!< Read the byte received from the Codec */ + result = I2C_ReceiveData(CODEC_I2C); + + /* Wait to make sure that STOP flag has been cleared */ + CODECTimeout = CODEC_FLAG_TIMEOUT; + while(CODEC_I2C->CR1 & I2C_CR1_STOP) + { + if((CODECTimeout--) == 0) return Codec_TIMEOUT_UserCallback(); + } + + /*!< Re-Enable Acknowledgment to be ready for another reception */ + I2C_AcknowledgeConfig(CODEC_I2C, ENABLE); + + /* Clear AF flag for next communication */ + I2C_ClearFlag(CODEC_I2C, I2C_FLAG_AF); + + /* Return the byte read from Codec */ + return result; +} + +/** + * @brief Initializes the Audio Codec control interface (I2C). + * @param None + * @retval None + */ +static void Codec_CtrlInterface_Init(void) +{ + I2C_InitTypeDef I2C_InitStructure; + + /* Enable the CODEC_I2C peripheral clock */ + RCC_APB1PeriphClockCmd(CODEC_I2C_CLK, ENABLE); + + /* CODEC_I2C peripheral configuration */ + I2C_DeInit(CODEC_I2C); + I2C_InitStructure.I2C_Mode = I2C_Mode_I2C; + I2C_InitStructure.I2C_DutyCycle = I2C_DutyCycle_2; + I2C_InitStructure.I2C_OwnAddress1 = 0x33; + I2C_InitStructure.I2C_Ack = I2C_Ack_Enable; + I2C_InitStructure.I2C_AcknowledgedAddress = I2C_AcknowledgedAddress_7bit; + I2C_InitStructure.I2C_ClockSpeed = I2C_SPEED; + /* Enable the I2C peripheral */ + I2C_Cmd(CODEC_I2C, ENABLE); + I2C_Init(CODEC_I2C, &I2C_InitStructure); +} + +/** + * @brief Restore the Audio Codec control interface to its default state. + * This function doesn't de-initialize the I2C because the I2C peripheral + * may be used by other modules. + * @param None + * @retval None + */ +static void Codec_CtrlInterface_DeInit(void) +{ + /* Disable the I2C peripheral */ /* This step is not done here because + the I2C interface can be used by other modules */ + I2C_DeInit(CODEC_I2C); +} + +/** + * @brief Initializes the Audio Codec audio interface (I2S) + * @note This function assumes that the I2S input clock (through PLL_R in + * Devices RevA/Z and through dedicated PLLI2S_R in Devices RevB/Y) + * is already configured and ready to be used. + * @param AudioFreq: Audio frequency to be configured for the I2S peripheral. + * @retval None + */ +static void Codec_AudioInterface_Init(uint32_t AudioFreq) +{ + I2S_InitTypeDef I2S_InitStructure; + + /* Enable the CODEC_I2S peripheral clock */ + RCC_APB1PeriphClockCmd(CODEC_I2S_CLK, ENABLE); + + /* CODEC_I2S peripheral configuration */ + SPI_I2S_DeInit(CODEC_I2S); + I2S_InitStructure.I2S_AudioFreq = AudioFreq; + I2S_InitStructure.I2S_Standard = I2S_STANDARD; + I2S_InitStructure.I2S_DataFormat = I2S_DataFormat_16b; + I2S_InitStructure.I2S_CPOL = I2S_CPOL_Low; + + I2S_InitStructure.I2S_Mode = I2S_Mode_MasterTx; + +#ifdef CODEC_MCLK_ENABLED + I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Enable; +#elif defined(CODEC_MCLK_DISABLED) + I2S_InitStructure.I2S_MCLKOutput = I2S_MCLKOutput_Disable; +#else +#error "No selection for the MCLK output has been defined !" +#endif /* CODEC_MCLK_ENABLED */ + + /* Initialize the I2S peripheral with the structure above */ + I2S_Init(CODEC_I2S, &I2S_InitStructure); + /* The I2S peripheral will be enabled only in the EVAL_AUDIO_Play() function + or by user functions if DMA mode not enabled */ +} + +/** + * @brief Restores the Audio Codec audio interface to its default state. + * @param None + * @retval None + */ +static void Codec_AudioInterface_DeInit(void) +{ + /* Disable the CODEC_I2S peripheral (in case it hasn't already been disabled) */ + I2S_Cmd(CODEC_I2S, DISABLE); + + /* Deinitialize the CODEC_I2S peripheral */ + SPI_I2S_DeInit(CODEC_I2S); + + /* Disable the CODEC_I2S peripheral clock */ + RCC_APB1PeriphClockCmd(CODEC_I2S_CLK, DISABLE); +} + +/** + * @brief Initializes IOs used by the Audio Codec (on the control and audio + * interfaces). + * @param None + * @retval None + */ +static void Codec_GPIO_Init(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable Reset GPIO Clock */ + RCC_AHBPeriphClockCmd(AUDIO_RESET_GPIO_CLK,ENABLE); + +/* Audio reset pin configuration ---------------------------------------------*/ + GPIO_InitStructure.GPIO_Pin = AUDIO_RESET_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(AUDIO_RESET_GPIO, &GPIO_InitStructure); + + /* Enable I2S and I2C GPIO clocks */ + RCC_AHBPeriphClockCmd(CODEC_I2C_GPIO_CLOCK | CODEC_I2S_GPIO_CLOCK, ENABLE); + +/* CODEC_I2C SCL and SDA pins configuration ----------------------------------*/ + GPIO_InitStructure.GPIO_Pin = CODEC_I2C_SCL_PIN | CODEC_I2C_SDA_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(CODEC_I2C_GPIO, &GPIO_InitStructure); + /* Connect pins to I2C peripheral */ + GPIO_PinAFConfig(CODEC_I2C_GPIO, CODEC_I2S_SCL_PINSRC, CODEC_I2C_GPIO_AF); + GPIO_PinAFConfig(CODEC_I2C_GPIO, CODEC_I2S_SDA_PINSRC, CODEC_I2C_GPIO_AF); + +/* CODEC_I2S pins configuration: WS, SCK and SD pins -------------------------*/ + GPIO_InitStructure.GPIO_Pin = CODEC_I2S_SCK_PIN | + CODEC_I2S_SD_PIN | + CODEC_I2S_WS_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(CODEC_I2S_GPIO, &GPIO_InitStructure); + + /* Connect pins to I2S peripheral */ + GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_WS_PINSRC, CODEC_I2S_GPIO_AF); + GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_SCK_PINSRC, CODEC_I2S_GPIO_AF); + GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_SD_PINSRC, CODEC_I2S_GPIO_AF); + +#ifdef CODEC_MCLK_ENABLED + /* CODEC_I2S pins configuration: MCK pin */ + GPIO_InitStructure.GPIO_Pin = CODEC_I2S_MCK_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(CODEC_I2S_MCK_GPIO, &GPIO_InitStructure); + /* Connect pins to I2S peripheral */ + GPIO_PinAFConfig(CODEC_I2S_MCK_GPIO, CODEC_I2S_MCK_PINSRC, CODEC_I2S_GPIO_AF); +#endif /* CODEC_MCLK_ENABLED */ +} + +/** + * @brief Restores the IOs used by the Audio Codec interface to their default state. + * @param None + * @retval None + */ +static void Codec_GPIO_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Deinitialize all the GPIOs used by the driver */ + GPIO_InitStructure.GPIO_Pin = CODEC_I2S_SCK_PIN | CODEC_I2S_SD_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(CODEC_I2S_GPIO, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = CODEC_I2S_WS_PIN; + GPIO_Init(CODEC_I2S_GPIO, &GPIO_InitStructure); + + /* Disconnect pins from I2S peripheral */ + GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_WS_PINSRC, 0x00); + GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_SCK_PINSRC, 0x00); + GPIO_PinAFConfig(CODEC_I2S_GPIO, CODEC_I2S_SD_PINSRC, 0x00); + +#ifdef CODEC_MCLK_ENABLED + /* CODEC_I2S pins deinitialization: MCK pin */ + GPIO_InitStructure.GPIO_Pin = CODEC_I2S_MCK_PIN; + GPIO_Init(CODEC_I2S_MCK_GPIO, &GPIO_InitStructure); + /* Disconnect pins from I2S peripheral */ + GPIO_PinAFConfig(CODEC_I2S_MCK_GPIO, CODEC_I2S_MCK_PINSRC, CODEC_I2S_GPIO_AF); +#endif /* CODEC_MCLK_ENABLED */ +} + +/** + * @brief Inserts a delay time (not accurate timing). + * @param nCount: specifies the delay time length. + * @retval None + */ +static void Delay( __IO uint32_t nCount) +{ + for (; nCount != 0; nCount--); +} + +#ifdef USE_DEFAULT_TIMEOUT_CALLBACK +/** + * @brief Basic management of the timeout situation. + * @param None + * @retval None + */ +uint32_t Codec_TIMEOUT_UserCallback(void) +{ + /* Block communication and all processes */ + while (1) + { + } +} +#endif /* USE_DEFAULT_TIMEOUT_CALLBACK */ + +/*============================================================================== + Audio MAL Interface Control Functions +==============================================================================*/ + +/** + * @brief Initializes and prepares the Media to perform audio data transfer + * from Media to the I2S peripheral. + * @param None + * @retval None + */ +static void Audio_MAL_Init(void) +{ + +#ifdef I2S_INTERRUPT + NVIC_InitTypeDef NVIC_InitStructure; + + NVIC_InitStructure.NVIC_IRQChannel = CODEC_I2S_IRQ; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelSubPriority =0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + SPI_I2S_ITConfig(CODEC_I2S, SPI_I2S_IT_TXE, ENABLE); + +#else +#if defined(AUDIO_MAL_DMA_IT_TC_EN) || defined(AUDIO_MAL_DMA_IT_HT_EN) || defined(AUDIO_MAL_DMA_IT_TE_EN) + NVIC_InitTypeDef NVIC_InitStructure; +#endif + + if (CurrAudioInterface == AUDIO_INTERFACE_I2S) + { + /* Enable the DMA clock */ + RCC_AHBPeriphClockCmd(AUDIO_I2S_DMA_CLOCK, ENABLE); + + /* Configure the DMA Channel */ + DMA_Cmd(AUDIO_MAL_DMA_CHANNEL, DISABLE); + DMA_DeInit(AUDIO_MAL_DMA_CHANNEL); + /* Set the parameters to be configured */ + DMA_InitStructure.DMA_PeripheralBaseAddr = AUDIO_MAL_DMA_DREG; + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)0; /* This field will be configured in play function */ + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; + DMA_InitStructure.DMA_BufferSize = (uint32_t)0xFFFE; /* This field will be configured in play function */ + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; + DMA_InitStructure.DMA_PeripheralDataSize = AUDIO_MAL_DMA_PERIPH_DATA_SIZE; + DMA_InitStructure.DMA_MemoryDataSize = AUDIO_MAL_DMA_MEM_DATA_SIZE; +#ifdef AUDIO_MAL_MODE_NORMAL + DMA_InitStructure.DMA_Mode = DMA_Mode_Normal; +#elif defined(AUDIO_MAL_MODE_CIRCULAR) + DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; +#else +#error "AUDIO_MAL_MODE_NORMAL or AUDIO_MAL_MODE_CIRCULAR should be selected !!" +#endif /* AUDIO_MAL_MODE_NORMAL */ + DMA_InitStructure.DMA_Priority = DMA_Priority_High; + DMA_Init(AUDIO_MAL_DMA_CHANNEL, &DMA_InitStructure); + + /* Enable the selected DMA interrupts (selected in "stm32l152d_eval_eval_audio_codec.h" defines) */ +#ifdef AUDIO_MAL_DMA_IT_TC_EN + DMA_ITConfig(AUDIO_MAL_DMA_CHANNEL, DMA_IT_TC, ENABLE); +#endif /* AUDIO_MAL_DMA_IT_TC_EN */ +#ifdef AUDIO_MAL_DMA_IT_HT_EN + DMA_ITConfig(AUDIO_MAL_DMA_CHANNEL, DMA_IT_HT, ENABLE); +#endif /* AUDIO_MAL_DMA_IT_HT_EN */ +#ifdef AUDIO_MAL_DMA_IT_TE_EN + DMA_ITConfig(AUDIO_MAL_DMA_CHANNEl, DMA_IT_TE | DMA_IT_FE | DMA_IT_DME, ENABLE); +#endif /* AUDIO_MAL_DMA_IT_TE_EN */ + +#if defined(AUDIO_MAL_DMA_IT_TC_EN) || defined(AUDIO_MAL_DMA_IT_HT_EN) || defined(AUDIO_MAL_DMA_IT_TE_EN) + /* I2S DMA IRQ Channel configuration */ + NVIC_InitStructure.NVIC_IRQChannel = AUDIO_MAL_DMA_IRQ; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = EVAL_AUDIO_IRQ_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = EVAL_AUDIO_IRQ_SUBRIO; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); +#endif + } + + if (CurrAudioInterface == AUDIO_INTERFACE_I2S) + { + /* Enable the I2S DMA request */ + SPI_I2S_DMACmd(CODEC_I2S, SPI_I2S_DMAReq_Tx, ENABLE); + } +#endif +} + +/** + * @brief Restore default state of the used Media. + * @param None + * @retval None + */ +static void Audio_MAL_DeInit(void) +{ +#if defined(AUDIO_MAL_DMA_IT_TC_EN) || defined(AUDIO_MAL_DMA_IT_HT_EN) || defined(AUDIO_MAL_DMA_IT_TE_EN) + NVIC_InitTypeDef NVIC_InitStructure; + + /* Deinitialize the NVIC interrupt for the I2S DMA Channel */ + NVIC_InitStructure.NVIC_IRQChannel = AUDIO_MAL_DMA_IRQ; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = EVAL_AUDIO_IRQ_PREPRIO; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = EVAL_AUDIO_IRQ_SUBRIO; + NVIC_InitStructure.NVIC_IRQChannelCmd = DISABLE; + NVIC_Init(&NVIC_InitStructure); +#endif + + /* Disable the DMA channel before the deinit */ + DMA_Cmd(AUDIO_MAL_DMA_CHANNEL, DISABLE); + + /* Dinitialize the DMA Channel */ + DMA_DeInit(AUDIO_MAL_DMA_CHANNEL); + + /* + The DMA clock is not disabled, since it can be used by other channels + */ +} + +/** + * @brief Starts playing audio stream from the audio Media. + * @param None + * @retval None + */ +static void Audio_MAL_Play(uint32_t Addr, uint32_t Size) +{ +#ifndef I2S_INTERRUPT + if (CurrAudioInterface == AUDIO_INTERFACE_I2S) + { + /* Configure the buffer address and size */ + DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)Addr; + DMA_InitStructure.DMA_BufferSize = (uint32_t)Size; + + /* Configure the DMA Channel with the new parameters */ + DMA_Init(AUDIO_MAL_DMA_CHANNEL, &DMA_InitStructure); + + /* Enable the I2S DMA Channel*/ + DMA_Cmd(AUDIO_MAL_DMA_CHANNEL, ENABLE); + } +#else + /* If the I2S peripheral is still not enabled, enable it */ + if ((CODEC_I2S->I2SCFGR & I2S_ENABLE_MASK) == 0) + { + I2S_Cmd(CODEC_I2S, ENABLE); + } +#endif /* I2S_INTERRUPT */ +} + +/** + * @brief Switch dynamically (while audio file is played) the output target + * (speaker or headphone). + * @note This function modifies a global variable of the audio codec driver: OutputDev. + * @param Output: specifies the audio output target: OUTPUT_DEVICE_SPEAKER, + * OUTPUT_DEVICE_HEADPHONE, OUTPUT_DEVICE_BOTH or OUTPUT_DEVICE_AUTO + * @retval 0 if correct communication, else wrong communication + */ +uint32_t Codec_SwitchOutput(uint8_t Output) +{ + uint8_t counter = 0; + + switch (Output) + { + case OUTPUT_DEVICE_SPEAKER: + counter += Codec_WriteRegister(0x04, 0xFA); /* SPK always ON & HP always OFF */ + OutputDev = 0xFA; + break; + + case OUTPUT_DEVICE_HEADPHONE: + counter += Codec_WriteRegister(0x04, 0xAF); /* SPK always OFF & HP always ON */ + OutputDev = 0xAF; + break; + + case OUTPUT_DEVICE_BOTH: + counter += Codec_WriteRegister(0x04, 0xAA); /* SPK always ON & HP always ON */ + OutputDev = 0xAA; + break; + + case OUTPUT_DEVICE_AUTO: + counter += Codec_WriteRegister(0x04, 0x05); /* Detect the HP or the SPK automatically */ + OutputDev = 0x05; + break; + + default: + counter += Codec_WriteRegister(0x04, 0x05); /* Detect the HP or the SPK automatically */ + OutputDev = 0x05; + break; + } + + return counter; +} + +/** + * @brief Pauses or Resumes the audio stream playing from the Media. + * @param Cmd: AUDIO_PAUSE (or 0) to pause, AUDIO_RESUME (or any value different + * from 0) to resume. + * @param Addr: Address from/at which the audio stream should resume/pause. + * @retval None + */ +static void Audio_MAL_PauseResume(uint32_t Cmd, uint32_t Addr) +{ + /* Pause the audio file playing */ + if (Cmd == AUDIO_PAUSE) + { + /* Disable the I2S DMA request */ + SPI_I2S_DMACmd(CODEC_I2S, SPI_I2S_DMAReq_Tx, DISABLE); + + /* Pause the I2S DMA Channel + Note. For the STM32L1xx devices, the DMA implements a pause feature, + by disabling the Channel, all configuration is preserved and data + transfer is paused till the next enable of the Channel. + This feature is not available on STM32L1xx devices. */ + DMA_Cmd(AUDIO_MAL_DMA_CHANNEL, DISABLE); + } + else /* AUDIO_RESUME */ + { + /* Enable the I2S DMA request */ + SPI_I2S_DMACmd(CODEC_I2S, SPI_I2S_DMAReq_Tx, ENABLE); + + /* Resume the I2S DMA Channel + Note. For the STM32L1xx devices, the DMA implements a pause feature, + by disabling the channel, all configuration is preserved and data + transfer is paused till the next enable of the channel. + This feature is not available on STM32L1xx devices. */ + DMA_Cmd(AUDIO_MAL_DMA_CHANNEL, ENABLE); + + /* If the I2S peripheral is still not enabled, enable it */ + if ((CODEC_I2S->I2SCFGR & I2S_ENABLE_MASK) == 0) + { + I2S_Cmd(CODEC_I2S, ENABLE); + } + } +} + +/** + * @brief Stops audio stream playing on the used Media. + * @param None + * @retval None + */ +static void Audio_MAL_Stop(void) +{ + /* Stop the Transfer on the I2S side: Stop and disable the DMA channel */ + DMA_Cmd(AUDIO_MAL_DMA_CHANNEL, DISABLE); + + /* Clear all the DMA flags for the next transfer */ + DMA_ClearFlag(AUDIO_MAL_DMA_FLAG_TC |AUDIO_MAL_DMA_FLAG_HT | AUDIO_MAL_DMA_FLAG_TE); + + /* + The I2S DMA requests are not disabled here. + */ + /* In all modes, disable the I2S peripheral */ + I2S_Cmd(CODEC_I2S, DISABLE); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_audio_codec.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_audio_codec.h new file mode 100644 index 0000000..cb808e9 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_audio_codec.h @@ -0,0 +1,283 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_audio_codec.h + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file contains all the functions prototypes for the + * stm32l152d_eval_audio_codec.c driver. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L152D_EVAL_AUDIOCODEC_H +#define __STM32L152D_EVAL_AUDIOCODEC_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l1xx.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_AUDIO_CODEC + * @{ + */ + +/** @defgroup STM32L152D_EVAL_AUDIO_CODEC_Exported_Constants + * @{ + */ + +/*------------------------------------ + CONFIGURATION: Audio Codec Driver Configuration parameters + ----------------------------------------*/ +#define I2S_INTERRUPT /* Comment this line to enable the DMA Handler */ +/* Audio Transfer mode (DMA, Interrupt or Polling) */ +#define AUDIO_MAL_MODE_NORMAL /* Uncomment this line to enable the audio + Transfer using DMA with normal mode */ +/* #define AUDIO_MAL_MODE_CIRCULAR */ /* Uncomment this line to enable the audio + Transfer using DMA with circular mode */ + +/* For the DMA modes select the interrupt that will be used */ +#define AUDIO_MAL_DMA_IT_TC_EN /* Uncomment this line to enable DMA Transfer Complete interrupt */ +/* #define AUDIO_MAL_DMA_IT_HT_EN */ /* Uncomment this line to enable DMA Half Transfer Complete interrupt */ +/* #define AUDIO_MAL_DMA_IT_TE_EN */ /* Uncomment this line to enable DMA Transfer Error interrupt */ + +/* Select the interrupt preemption priority and subpriority for the DMA interrupt */ +#define EVAL_AUDIO_IRQ_PREPRIO 0 /* Select the preemption priority level(0 is the highest) */ +#define EVAL_AUDIO_IRQ_SUBRIO 0 /* Select the sub-priority level (0 is the highest) */ + +/* Uncomment the following line to use the default Codec_TIMEOUT_UserCallback() + function implemented in stm32l152d_eval_audio_codec.c file. + Codec_TIMEOUT_UserCallback() function is called whenever a timeout condition + occurs during communication (waiting on an event that doesn't occur, bus + errors, busy devices ...). */ +/* #define USE_DEFAULT_TIMEOUT_CALLBACK */ + +/*----------------------------------------------------------------------------*/ + +/*------------------------------------ + OPTIONAL Configuration defines parameters + ----------------------------------------*/ +/* I2C clock speed configuration (in Hz) + WARNING: + Make sure that this define is not already declared in other files (ie. + stm32l152d_eval.h file). It can be used in parallel by other modules. */ +#ifndef I2C_SPEED + #define I2C_SPEED 100000 +#endif /* I2C_SPEED */ + +/* Uncomment defines below to select standard for audio communication between + Codec and I2S peripheral */ +#define I2S_STANDARD_PHILLIPS +/* #define I2S_STANDARD_MSB */ +/* #define I2S_STANDARD_LSB */ + +/* Uncomment the defines below to select if the Master clock mode should be + enabled or not */ +#define CODEC_MCLK_ENABLED +/* #define CODEC_MCLK_DISABLED */ + +/* Uncomment this line to enable verifying data sent to codec after each write + operation */ +#define VERIFY_WRITTENDATA +/*----------------------------------------------------------------------------*/ + +/*----------------------------------- + Hardware Configuration defines parameters + -----------------------------------------*/ +/* Audio Reset Pin definition */ +#define AUDIO_RESET_GPIO_CLK RCC_AHBPeriph_GPIOB +#define AUDIO_RESET_PIN GPIO_Pin_1 +#define AUDIO_RESET_GPIO GPIOB + +/* I2S peripheral configuration defines */ +#define CODEC_I2S SPI2 +#define CODEC_I2S_CLK RCC_APB1Periph_SPI2 +#define CODEC_I2S_ADDRESS 0x4000380C +#define CODEC_I2S_GPIO_AF GPIO_AF_SPI2 +#define CODEC_I2S_IRQ SPI2_IRQn +#define CODEC_I2S_GPIO_CLOCK (RCC_AHBPeriph_GPIOC | RCC_AHBPeriph_GPIOB) +#define CODEC_I2S_WS_PIN GPIO_Pin_12 +#define CODEC_I2S_SCK_PIN GPIO_Pin_13 +#define CODEC_I2S_SD_PIN GPIO_Pin_15 +#define CODEC_I2S_MCK_PIN GPIO_Pin_6 +#define CODEC_I2S_WS_PINSRC GPIO_PinSource12 +#define CODEC_I2S_SCK_PINSRC GPIO_PinSource13 +#define CODEC_I2S_SD_PINSRC GPIO_PinSource15 +#define CODEC_I2S_MCK_PINSRC GPIO_PinSource6 +#define CODEC_I2S_GPIO GPIOB +#define CODEC_I2S_MCK_GPIO GPIOC +#define Audio_I2S_IRQHandler SPI2_IRQHandler + + +#define AUDIO_MAL_DMA_PERIPH_DATA_SIZE DMA_PeripheralDataSize_HalfWord +#define AUDIO_MAL_DMA_MEM_DATA_SIZE DMA_MemoryDataSize_HalfWord +#define DMA_MAX_SZE 0xFFFF + + /* I2S DMA Channel definitions */ +#define AUDIO_I2S_DMA_CLOCK RCC_AHBPeriph_DMA1 +#define AUDIO_I2S_DMA_DREG CODEC_I2S_ADDRESS +#define AUDIO_I2S_DMA_CHANNEL DMA1_Channel5 +#define AUDIO_I2S_DMA_IRQ DMA1_Channel5_IRQn +#define AUDIO_I2S_DMA_FLAG_TC DMA1_FLAG_TC5 +#define AUDIO_I2S_DMA_FLAG_HT DMA1_FLAG_HT5 +#define AUDIO_I2S_DMA_FLAG_TE DMA1_FLAG_TE5 + +#define Audio_MAL_I2S_IRQHandler DMA1_Channel5_IRQHandler + +/* I2C peripheral configuration defines (control interface of the audio codec) */ +#define CODEC_I2C I2C1 +#define CODEC_I2C_CLK RCC_APB1Periph_I2C1 +#define CODEC_I2C_GPIO_CLOCK RCC_AHBPeriph_GPIOB +#define CODEC_I2C_GPIO_AF GPIO_AF_I2C1 +#define CODEC_I2C_GPIO GPIOB +#define CODEC_I2C_SCL_PIN GPIO_Pin_8 +#define CODEC_I2C_SDA_PIN GPIO_Pin_9 +#define CODEC_I2S_SCL_PINSRC GPIO_PinSource8 +#define CODEC_I2S_SDA_PINSRC GPIO_PinSource9 + +/* Maximum Timeout values for flags and events waiting loops. These timeouts are + not based on accurate values, they just guarantee that the application will + not remain stuck if the I2C communication is corrupted. + You may modify these timeout values depending on CPU frequency and application + conditions (interrupts routines ...). */ +#define CODEC_FLAG_TIMEOUT ((uint32_t)0x1000) +#define CODEC_LONG_TIMEOUT ((uint32_t)(300 * CODEC_FLAG_TIMEOUT)) +/*----------------------------------------------------------------------------*/ + +/*----------------------------------- + Audio Codec User defines + -----------------------------------------*/ +/* Audio interface : I2S */ +#define AUDIO_INTERFACE_I2S 1 + +/* Codec output DEVICE */ +#define OUTPUT_DEVICE_SPEAKER 1 +#define OUTPUT_DEVICE_HEADPHONE 2 +#define OUTPUT_DEVICE_BOTH 3 +#define OUTPUT_DEVICE_AUTO 4 + +/* Volume Levels values */ +#define DEFAULT_VOLMIN 0x00 +#define DEFAULT_VOLMAX 0xFF +#define DEFAULT_VOLSTEP 0x04 + +#define AUDIO_PAUSE 0 +#define AUDIO_RESUME 1 + +/* Codec POWER DOWN modes */ +#define CODEC_PDWN_HW 1 +#define CODEC_PDWN_SW 2 + +/* MUTE commands */ +#define AUDIO_MUTE_ON 1 +#define AUDIO_MUTE_OFF 0 +/*----------------------------------------------------------------------------*/ + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_AUDIO_CODEC_Exported_Macros + * @{ + */ +#define VOLUME_CONVERT(x) ((Volume > 100)? 100:((uint8_t)((Volume * 255) / 100))) +#define DMA_MAX(x) (((x) <= DMA_MAX_SZE)? (x):DMA_MAX_SZE) + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_AUDIO_CODEC_Exported_Functions + * @{ + */ +void EVAL_AUDIO_SetAudioInterface(uint32_t Interface); +uint32_t EVAL_AUDIO_Init(uint16_t OutputDevice, uint8_t Volume, uint32_t AudioFreq); +uint32_t EVAL_AUDIO_DeInit(void); +uint32_t EVAL_AUDIO_Play(uint16_t* pBuffer, uint32_t Size); +uint32_t EVAL_AUDIO_PauseResume(uint32_t Cmd); +uint32_t EVAL_AUDIO_Stop(uint32_t CodecPowerDown_Mode); +uint32_t EVAL_AUDIO_VolumeCtl(uint8_t Volume); +uint32_t EVAL_AUDIO_Mute(uint32_t Command); +uint32_t Codec_SwitchOutput(uint8_t Output) ; + +/* User Callbacks: user has to implement these functions in his code if + they are needed. -----------------------------------------------------------*/ + +extern uint16_t EVAL_AUDIO_GetSampleCallBack(void); + +/* User I2S IrqnHandler : user has to implement these functions in his code if + they are needed. -----------------------------------------------------------*/ +extern void EVAL_Audio_I2S_IRQHandler(void); + + +/* This function is called when the requested data has been completely transferred. + In Normal mode (when the define AUDIO_MAL_MODE_NORMAL is enabled) this function + is called at the end of the whole audio file. + In circular mode (when the define AUDIO_MAL_MODE_CIRCULAR is enabled) this + function is called at the end of the current buffer transmission. */ +void EVAL_AUDIO_TransferComplete_CallBack(uint32_t pBuffer, uint32_t Size); + +/* This function is called when half of the requested buffer has been transferred + This callback is useful in Circular mode only (when AUDIO_MAL_MODE_CIRCULAR + define is enabled)*/ +void EVAL_AUDIO_HalfTransfer_CallBack(uint32_t pBuffer, uint32_t Size); + +/* This function is called when an Interrupt due to transfer error on or peripheral + error occurs. */ +void EVAL_AUDIO_Error_CallBack(void* pData); + +/* Codec_TIMEOUT_UserCallback() function is called whenever a timeout condition + occurs during communication (waiting on an event that doesn't occur, bus + errors, busy devices ...) on the Codec control interface (I2C). + You can use the default timeout callback implementation by uncommenting the + define USE_DEFAULT_TIMEOUT_CALLBACK in stm32l152d_eval_audio_codec.h file. + Typically the user implementation of this callback should reset I2C peripheral + and re-initialize communication or in worst case reset all the application. */ +uint32_t Codec_TIMEOUT_UserCallback(void); + +#endif /* __STM32L152D_EVAL_AUDIOCODEC_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_fsmc_nor.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_fsmc_nor.c new file mode 100644 index 0000000..9d6484f --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_fsmc_nor.c @@ -0,0 +1,535 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_fsmc_nor.c + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file provides a set of functions needed to drive the M29W128FL, + * M29W128GL and S29GL128P NOR memories mounted on STM32L152D-EVAL board. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval_fsmc_nor.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_FSMC_NOR + * @brief This file provides a set of functions needed to drive the M29W128FL, + * M29W128GL and S29GL128P NOR memories mounted on STM32L152D-EVAL board. + * @{ + */ + +/** @defgroup STM32L152D_EVAL_FSMC_NOR_Private_Types + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_FSMC_NOR_Private_Defines + * @{ + */ +/** + * @brief FSMC Bank 1 NOR/SRAM2 + */ +#define Bank1_NOR2_ADDR ((uint32_t)0x64000000) + +/* Delay definition */ +#define BlockErase_Timeout ((uint32_t)0x00A00000) +#define ChipErase_Timeout ((uint32_t)0x30000000) +#define Program_Timeout ((uint32_t)0x00001400) +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_FSMC_NOR_Private_Macros + * @{ + */ +#define ADDR_SHIFT(A) (Bank1_NOR2_ADDR + (2 * (A))) +#define NOR_WRITE(Address, Data) (*(__IO uint16_t *)(Address) = (Data)) +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_FSMC_NOR_Private_Variables + * @{ + */ +/** + * @} + */ + + +/** @defgroupSTM32L152D_EVAL_FSMC_NOR_Private_Function_Prototypes + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_FSMC_NOR_Private_Functions + * @{ + */ + +/** + * @brief Configures the FSMC and GPIOs to interface with the NOR memory. + * This function must be called before any write/read operation + * on the NOR. + * @param None + * @retval None + */ +void NOR_Init(void) +{ + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef p; + + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOE | RCC_AHBPeriph_GPIOF | + RCC_AHBPeriph_GPIOG, ENABLE); + +/*-- GPIO Configuration ------------------------------------------------------*/ + /*!< NOR Data lines configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 | + GPIO_Pin_10 | GPIO_Pin_14 | GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC); + + /*!< NOR Address lines configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | + GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_12 | GPIO_Pin_13 | + GPIO_Pin_14 | GPIO_Pin_15; + GPIO_Init(GPIOF, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource0, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource1, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource2, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource3, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource4, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource5, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource12, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource13, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource14, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource15, GPIO_AF_FSMC); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | + GPIO_Pin_4 | GPIO_Pin_5; + GPIO_Init(GPIOG, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOG, GPIO_PinSource0, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOG, GPIO_PinSource1, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOG, GPIO_PinSource2, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOG, GPIO_PinSource3, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOG, GPIO_PinSource4, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOG, GPIO_PinSource5, GPIO_AF_FSMC); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13; + GPIO_Init(GPIOD, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_FSMC); + + /*!< NOE and NWE configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5; + GPIO_Init(GPIOD, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC); + + /*!< NE2 configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_9; + GPIO_Init(GPIOG, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOG, GPIO_PinSource9, GPIO_AF_FSMC); + + /*!< NBL0, NBL1 configuration */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6; + GPIO_Init(GPIOE, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource3, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource4, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource5, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource6, GPIO_AF_FSMC); + + /*!< Configure PD6 for NOR memory Ready/Busy signal */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_Init(GPIOD, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource6, GPIO_AF_FSMC); + + /*-- FSMC Configuration ----------------------------------------------------*/ + p.FSMC_AddressSetupTime = 0x02; + p.FSMC_AddressHoldTime = 0x00; + p.FSMC_DataSetupTime = 0x05; + p.FSMC_BusTurnAroundDuration = 0x00; + p.FSMC_CLKDivision = 0x00; + p.FSMC_DataLatency = 0x00; + p.FSMC_AccessMode = FSMC_AccessMode_B; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM2; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + + /*!< Enable FSMC Bank1_NOR Bank */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); +} + +/** + * @brief Reads NOR memory's Manufacturer and Device Code. + * @param NOR_ID: pointer to a NOR_IDTypeDef structure which will hold the + * Manufacturer and Device Code. + * @retval None + */ +void NOR_ReadID(NOR_IDTypeDef* NOR_ID) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x0090); + + NOR_ID->Manufacturer_Code = *(__IO uint16_t *) ADDR_SHIFT(0x0000); + NOR_ID->Device_Code1 = *(__IO uint16_t *) ADDR_SHIFT(0x0001); + NOR_ID->Device_Code2 = *(__IO uint16_t *) ADDR_SHIFT(0x000E); + NOR_ID->Device_Code3 = *(__IO uint16_t *) ADDR_SHIFT(0x000F); +} + +/** + * @brief Erases the specified Nor memory block. + * @param BlockAddr: address of the block to erase. + * @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR + * or NOR_TIMEOUT + */ +NOR_Status NOR_EraseBlock(uint32_t BlockAddr) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE((Bank1_NOR2_ADDR + BlockAddr), 0x30); + + return (NOR_GetStatus(BlockErase_Timeout)); +} + +/** + * @brief Erases the entire chip. + * @param None + * @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR + * or NOR_TIMEOUT + */ +NOR_Status NOR_EraseChip(void) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x0080); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x0010); + + return (NOR_GetStatus(ChipErase_Timeout)); +} + +/** + * @brief Writes a half-word to the NOR memory. + * @param WriteAddr: NOR memory internal address to write to. + * @param Data: Data to write. + * @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR + * or NOR_TIMEOUT + */ +NOR_Status NOR_WriteHalfWord(uint32_t WriteAddr, uint16_t Data) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00A0); + NOR_WRITE((Bank1_NOR2_ADDR + WriteAddr), Data); + + return (NOR_GetStatus(Program_Timeout)); +} + +/** + * @brief Writes a half-word buffer to the FSMC NOR memory. + * @param pBuffer: pointer to buffer. + * @param WriteAddr: NOR memory internal address from which the data will be + * written. + * @param NumHalfwordToWrite: number of Half words to write. + * @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR + * or NOR_TIMEOUT + */ +NOR_Status NOR_WriteBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite) +{ + NOR_Status status = NOR_ONGOING; + + do + { + /*!< Transfer data to the memory */ + status = NOR_WriteHalfWord(WriteAddr, *pBuffer++); + WriteAddr = WriteAddr + 2; + NumHalfwordToWrite--; + } + while((status == NOR_SUCCESS) && (NumHalfwordToWrite != 0)); + + return (status); +} + +/** + * @brief Writes a half-word buffer to the FSMC NOR memory. This function + * must be used only with S29GL128P NOR memory. + * @param pBuffer: pointer to buffer. + * @param WriteAddr: NOR memory internal address from which the data will be + * written. + * @param NumHalfwordToWrite: number of Half words to write. + * The maximum allowed value is 32 Half words (64 bytes). + * @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR + * or NOR_TIMEOUT + */ +NOR_Status NOR_ProgramBuffer(uint16_t* pBuffer, uint32_t WriteAddr, uint32_t NumHalfwordToWrite) +{ + uint32_t lastloadedaddress = 0x00; + uint32_t currentaddress = 0x00; + uint32_t endaddress = 0x00; + + /*!< Initialize variables */ + currentaddress = WriteAddr; + endaddress = WriteAddr + NumHalfwordToWrite - 1; + lastloadedaddress = WriteAddr; + + /*!< Issue unlock command sequence */ + NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA); + + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + + /*!< Write Write Buffer Load Command */ + NOR_WRITE(ADDR_SHIFT(WriteAddr), 0x0025); + NOR_WRITE(ADDR_SHIFT(WriteAddr), (NumHalfwordToWrite - 1)); + + /*!< Load Data into NOR Buffer */ + while(currentaddress <= endaddress) + { + /*!< Store last loaded address & data value (for polling) */ + lastloadedaddress = currentaddress; + + NOR_WRITE(ADDR_SHIFT(currentaddress), *pBuffer++); + currentaddress += 1; + } + + NOR_WRITE(ADDR_SHIFT(lastloadedaddress), 0x29); + + return(NOR_GetStatus(Program_Timeout)); +} + +/** + * @brief Reads a half-word from the NOR memory. + * @param ReadAddr: NOR memory internal address to read from. + * @retval Half-word read from the NOR memory + */ +uint16_t NOR_ReadHalfWord(uint32_t ReadAddr) +{ + NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x002AA), 0x0055); + NOR_WRITE((Bank1_NOR2_ADDR + ReadAddr), 0x00F0 ); + + return (*(__IO uint16_t *)((Bank1_NOR2_ADDR + ReadAddr))); +} + +/** + * @brief Reads a block of data from the FSMC NOR memory. + * @param pBuffer: pointer to the buffer that receives the data read from the + * NOR memory. + * @param ReadAddr: NOR memory internal address to read from. + * @param NumHalfwordToRead : number of Half word to read. + * @retval None + */ +void NOR_ReadBuffer(uint16_t* pBuffer, uint32_t ReadAddr, uint32_t NumHalfwordToRead) +{ + NOR_WRITE(ADDR_SHIFT(0x0555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x02AA), 0x0055); + NOR_WRITE((Bank1_NOR2_ADDR + ReadAddr), 0x00F0); + + for(; NumHalfwordToRead != 0x00; NumHalfwordToRead--) /*!< while there is data to read */ + { + /*!< Read a Halfword from the NOR */ + *pBuffer++ = *(__IO uint16_t *)((Bank1_NOR2_ADDR + ReadAddr)); + ReadAddr = ReadAddr + 2; + } +} + +/** + * @brief Returns the NOR memory to Read mode. + * @param None + * @retval NOR_SUCCESS + */ +NOR_Status NOR_ReturnToReadMode(void) +{ + NOR_WRITE(Bank1_NOR2_ADDR, 0x00F0); + + return (NOR_SUCCESS); +} + +/** + * @brief Returns the NOR memory to Read mode and resets the errors in the NOR + * memory Status Register. + * @param None + * @retval NOR_SUCCESS + */ +NOR_Status NOR_Reset(void) +{ + NOR_WRITE(ADDR_SHIFT(0x00555), 0x00AA); + NOR_WRITE(ADDR_SHIFT(0x002AA), 0x0055); + NOR_WRITE(Bank1_NOR2_ADDR, 0x00F0); + + return (NOR_SUCCESS); +} + +/** + * @brief Returns the NOR operation status. + * @param Timeout: NOR progamming Timeout + * @retval NOR_Status: The returned value can be: NOR_SUCCESS, NOR_ERROR + * or NOR_TIMEOUT + */ +NOR_Status NOR_GetStatus(uint32_t Timeout) +{ + uint16_t val1 = 0x00, val2 = 0x00; + NOR_Status status = NOR_ONGOING; + uint32_t timeout = Timeout; + + /*!< Poll on NOR memory Ready/Busy signal ----------------------------------*/ + while((GPIO_ReadInputDataBit(GPIOD, GPIO_Pin_6) != RESET) && (timeout > 0)) + { + timeout--; + } + + timeout = Timeout; + + while((GPIO_ReadInputDataBit(GPIOD, GPIO_Pin_6) == RESET) && (timeout > 0)) + { + timeout--; + } + + /*!< Get the NOR memory operation status -----------------------------------*/ + while((Timeout != 0x00) && (status != NOR_SUCCESS)) + { + Timeout--; + + /*!< Read DQ6 and DQ5 */ + val1 = *(__IO uint16_t *)(Bank1_NOR2_ADDR); + val2 = *(__IO uint16_t *)(Bank1_NOR2_ADDR); + + /*!< If DQ6 did not toggle between the two reads then return NOR_Success */ + if((val1 & 0x0040) == (val2 & 0x0040)) + { + return NOR_SUCCESS; + } + + if((val1 & 0x0020) != 0x0020) + { + status = NOR_ONGOING; + } + + val1 = *(__IO uint16_t *)(Bank1_NOR2_ADDR); + val2 = *(__IO uint16_t *)(Bank1_NOR2_ADDR); + + if((val1 & 0x0040) == (val2 & 0x0040)) + { + return NOR_SUCCESS; + } + else if((val1 & 0x0020) == 0x0020) + { + return NOR_ERROR; + } + } + + if(Timeout == 0x00) + { + status = NOR_TIMEOUT; + } + + /*!< Return the operation status */ + return (status); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_glass_lcd.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_glass_lcd.c new file mode 100644 index 0000000..08dae7e --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_glass_lcd.c @@ -0,0 +1,3479 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_glass_lcd.c + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file includes the LCD Glass driver for LCD XHO5002B Module of + * STM32L152D-EVAL board. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval_glass_lcd.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @defgroup STM32L152D_EVAL_GLASS_LCD + * @brief This file includes the LCD Glass driver for LCD_XHO5002B Module of + * STM32L152D-EVAL board. + * @{ + */ + +/** @defgroup STM32L152D_EVAL_GLASS_LCD_Private_Types + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_GLASS_LCD_Private_Defines + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_GLASS_LCD_Private_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_GLASS_LCD_Private_Variables + * @{ + */ + +/** + @verbatim +================================================================================ + GLASS LCD MAPPING +================================================================================ + A + _ ---------- + P|_| |\ |H /| + F| G | I |B + | \ | / | + --M-- --N-- + | /| \ | + E| L | J |C + _ | / |K \| + Q|_| ----------- + D + +A LCD character coding is based on the following matrix: + COM0 COM1 COM4 COM5 COM6 COM7 + SEG(n) { 0 , 0 , I , B , C , J } + SEG(n+1) { D , K , A , H , M , N } + SEG(n+2) { Q , L , G , F , P , E } + +The character A for example is: +----------------------------------------------------------- + COM0 COM1 COM4 COM5 COM6 COM7 + SEG(n) { 0 , 0 , 0 , 1 , 1 , 0 } + SEG(n+1) { 0 , 0 , 1 , 0 , 1 , 1 } + SEG(n+2) { 0 , 0 , 0 , 1 , 0 , 1 } + -------------------------------------------------------- + = 0 0 2 5 3 6 hex + + => 'A' = 0x002536 + + @endverbatim + */ + +/** + * @brief LETTERS AND NUMBERS MAPPING DEFINITION + */ +uint16_t i; +__I uint32_t Mask[] = + { + 0x00F00000, 0x000F0000, 0x0000F000, 0x00000F00, 0x000000F0, 0x0000000F + }; +const uint8_t Shift[6] = + { + 20, 16, 12, 8, 4, 0 + }; + +uint32_t Digit[6]; /* Digit frame buffer */ + +/* Letters and number map of the custom LCD 8x40(STM8L152D-EVAL evaluation board) */ +__I uint32_t LetterMap[26] = + { + /* A B C D E F */ + 0x00002536, 0x00202536, 0x00202404, 0x00222310, 0x00202426, 0x00002426, + /* G H I J K L */ + 0x00202416, 0x00000536, 0x00222200, 0x00200114, 0x00001425, 0x00200404, + /* M N O P Q R */ + 0x00005514, 0x00004515, 0x00202514, 0x00002526, 0x00002532, 0x00002527, + /* S T U V W X */ + 0x00202432, 0x00022200, 0x00200514, 0x00041404, 0x00050515, 0x00045001, + /* Y Z */ + 0x00025000, 0x00243000 + }; + +__I uint32_t NumberMap[10] = + { + /* 0 1 2 3 4 */ + 0x00202514, 0x00000110, 0x00202126, 0x00202132, 0x00000532, + /* 5 6 7 8 9 */ + 0x00202432, 0x00202436, 0x00002110, 0x00202536, 0x00202532 + }; + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LCD_Private_Function_Prototypes + * @{ + */ +static void Convert(uint8_t* c, Point_Typedef Point, DoublePoint_Typedef DoublePoint); +static void delay(__IO uint32_t nCount); +static void LCD_GPIOConfig(void); + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LCD_Private_Functions + * @{ + */ + +/** + * @brief Configures the LCD GLASS relative GPIO port IOs and LCD peripheral. + * @param None + * @retval None + */ +void LCD_GLASS_Init(void) +{ + LCD_InitTypeDef LCD_InitStructure; + + LCD_GPIOConfig(); /*!< Configure the LCD Glass GPIO pins */ + + /*!< Configure the LCD interface -------------------------------------------*/ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_LCD, ENABLE); /*!< Enable LCD APB1 Clock */ + + LCD_InitStructure.LCD_Prescaler = LCD_Prescaler_4; + LCD_InitStructure.LCD_Divider = LCD_Divider_16; + LCD_InitStructure.LCD_Duty = LCD_Duty_1_8; + LCD_InitStructure.LCD_Bias = LCD_Bias_1_4; + LCD_InitStructure.LCD_VoltageSource = LCD_VoltageSource_Internal; + LCD_Init(&LCD_InitStructure); + + /*!< Configure the Pulse On Duration */ + LCD_PulseOnDurationConfig(LCD_PulseOnDuration_2); + + /*!< Configure the LCD Contrast (3.51V) */ + LCD_ContrastConfig(LCD_Contrast_Level_7); + + /*!< Wait Until the LCD FCR register is synchronized */ + LCD_WaitForSynchro(); + + /*!< Enable LCD peripheral */ + LCD_Cmd(ENABLE); + + /*!< Wait Until the LCD is enabled */ + while(LCD_GetFlagStatus(LCD_FLAG_ENS) == RESET) + { + } + /*!< Wait Until the LCD Booster is ready */ + while(LCD_GetFlagStatus(LCD_FLAG_RDY) == RESET) + { + } +} + +/** + * @brief This function writes a char in the LCD RAM. + * @param ch: The character to display. + * @param point: A point to add in front of char. + * This parameter can be one of the following values: + * @arg POINT_OFF : No point to add in front of char. + * @arg POINT_ON : Add a point in front of char. + * @param apostrophe: Flag indicating if a apostrophe has to be add in front + * of displayed character. + * This parameter can be one of the following values: + * @arg APOSTROPHE_OFF : No apostrophe to add in back of char. + * @arg APOSTROPHE_ON : Add an apostrophe in back of char. + * @param position: Position in the LCD of the caracter to write. + * This parameter can be any value in range [0:7]. + * @retval None + */ +void LCD_GLASS_WriteChar(uint8_t* ch, Point_Typedef point, DoublePoint_Typedef DoublePoint, uint8_t position) +{ + Convert(ch, point, DoublePoint); + + switch (position) + { + /* Position 0 on LCD */ + case 0: + /* Write Digit 0 on COM0 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFBFF; + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)(Digit[0] << (uint32_t)0x09); + /* Write Digit 1 on COM1 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFF3FF; + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)(Digit[1] << (uint32_t)0x09); + /* Write Digit 2 on COM4 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFFF1FF; + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)(Digit[2] << (uint32_t)0x09); + /* Write Digit 3 on COM5 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFFF1FF; + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)(Digit[3] << (uint32_t)0x09); + /* Write Digit 4 on COM6 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFFF9FF; + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)(Digit[4] << (uint32_t)0x09); + /* Write Digit 5 on COM7 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFFF1FF; + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)(Digit[5] << (uint32_t)0x09); + break; + + /* Position 1 on LCD */ + case 1: + /* Write Digit 0 on COM0 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFF9FFF; + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)(Digit[0] << (uint32_t)0x0C); + /* Write Digit 1 on COM1 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFF9FFF; + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)(Digit[1] << (uint32_t)0x0C); + /* Write Digit 2 on COM4 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFF8FFF; + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)(Digit[2] << (uint32_t)0x0C); + /* Write Digit 3 on COM5 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFF8FFF; + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)(Digit[3] << (uint32_t)0x0C); + /* Write Digit 4 on COM6 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFF8FFF; + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)(Digit[4] << (uint32_t)0x0C); + /* Write Digit 5 on COM7 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFF8FFF; + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)(Digit[5] << (uint32_t)0x0C); + break; + + /* Position 2 on LCD */ + case 2: + /* Write Digit 0 on COM0 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFCFFFF; + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)(Digit[0] << (uint32_t)0x0F); + /* Write Digit 1 on COM1 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFCFFFF; + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)(Digit[1] << (uint32_t)0x0F); + /* Write Digit 2 on COM4 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFC7FFF; + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)(Digit[2] << (uint32_t)0x0F); + /* Write Digit 3 on COM5 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFC7FFF; + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)(Digit[3] << (uint32_t)0x0F); + /* Write Digit 4 on COM6 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFC7FFF; + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)(Digit[4] << (uint32_t)0x0F); + /* Write Digit 5 on COM7 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFC7FFF; + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)(Digit[5] << (uint32_t)0x0F); + break; + + /* Position 3 on LCD */ + case 3: + /* Write Digit 0 on COM0 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFE7FFFF; + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)(Digit[0] << (uint32_t)0x12); + /* Write Digit 1 on COM1 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFE7FFFF; + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)(Digit[1] << (uint32_t)0x12); + /* Write Digit 2 on COM4 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFE3FFFF; + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)(Digit[2] << (uint32_t)0x12); + /* Write Digit 3 on COM5 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFE3FFFF; + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)(Digit[3] << (uint32_t)0x12); + /* Write Digit 4 on COM6 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFE3FFFF; + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)(Digit[4] << (uint32_t)0x12); + /* Write Digit 5 on COM7 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFE3FFFF; + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)(Digit[5] << (uint32_t)0x12); + break; + + /* Position 4 on LCD */ + case 4: + /* Write Digit 0 on COM0 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFFF9; + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)(Digit[0] ); + /* Write Digit 1 on COM1 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFFF9; + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)(Digit[1]); + /* Write Digit 2 on COM4 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFFFFF8; + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)(Digit[2]); + /* Write Digit 3 on COM5 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFFFFF8; + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)(Digit[3]); + /* Write Digit 4 on COM6 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFFFFF8; + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)(Digit[4]); + /* Write Digit 5 on COM7 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFFFFF8; + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)(Digit[5]); + break; + + /* Position 5 on LCD */ + case 5: + /* Write Digit 0 on COM0 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFFCF; + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)(Digit[0] << (uint32_t)0x03); + /* Write Digit 1 on COM1 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFFCF; + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)(Digit[1] << (uint32_t)0x03); + /* Write Digit 2 on COM4 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFFFFC7; + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)(Digit[2] << (uint32_t)0x03); + /* Write Digit 3 on COM5 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFFFFC7; + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)(Digit[3] << (uint32_t)0x03); + /* Write Digit 4 on COM6 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFFFFC7; + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)(Digit[4] << (uint32_t)0x03); + /* Write Digit 5 on COM7 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFFFFC7; + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)(Digit[5] << (uint32_t)0x03); + break; + + /* Position 6 on LCD */ + case 6: + /* Write Digit 0 on COM0 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFE7F; + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)(Digit[0] << (uint32_t)0x06); + /* Write Digit 1 on COM1 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFE7F; + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)(Digit[1] << (uint32_t)0x06); + /* Write Digit 2 on COM4 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFFFE3F; + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)(Digit[2] << (uint32_t)0x06); + /* Write Digit 3 on COM5 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFFFE3F; + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)(Digit[3] << (uint32_t)0x06); + /* Write Digit 4 on COM6 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFFFE3F; + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)(Digit[4] << (uint32_t)0x06); + /* Write Digit 5 on COM7 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFFFE3F; + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)(Digit[5] << (uint32_t)0x06); + break; + + default: + break; + } +} + +/** + * @brief This function Clear a char in the LCD RAM. + * @param position: Position in the LCD of the caracter to write. + * This parameter can be any value in range [0:7]. + * @retval None + */ +void LCD_GLASS_ClearChar(uint8_t position) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + switch (position) + { + /* Clear position 0 on LCD */ + case 0: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFBFF; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFF3FF; + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFFF1FF; + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFFF1FF; + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFFF9FF; + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFFF1FF; + break; + + /* Clear position 1 on LCD */ + case 1: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFF9FFF; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFF9FFF; + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFF8FFF; + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFF8FFF; + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFF8FFF; + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFF8FFF; + break; + + /* Clear position 2 on LCD */ + case 2: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFCFFFF; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFCFFFF; + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFC7FFF; + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFC7FFF; + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFC7FFF; + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFC7FFF; + break; + + /* Clear position 3 on LCD */ + case 3: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFE7FFFF; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFE7FFFF; + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFE3FFFF; + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFE3FFFF; + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFE3FFFF; + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFE3FFFF; + break; + + /* Clear position 4 on LCD */ + case 4: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFFF9; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFFF9; + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFFFFF8; + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFFFFF8; + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFFFFF8; + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFFFFF8; + break; + + /* Clear position 5 on LCD */ + case 5: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFFCF; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFFCF; + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFFFFC7; + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFFFFC7; + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFFFFC7; + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFFFFC7; + break; + + /* Clear position 6 on LCD */ + case 6: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFE7F; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFE7F; + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFFFFE3F; + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFFFFE3F; + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFFFE3F; + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFFFFE3F; + break; + + default: + break; + } + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief This function writes a char in the LCD RAM. + * @param ch: The character to display. + * @param point: A point to add in front of char. + * This parameter can be one of the following values: + * @arg POINT_OFF: No point to add in front of char. + * @arg POINT_ON: Add a point in front of char. + * @param apostrophe: Flag indicating if a apostrophe has to be add in front + * of displayed character. + * This parameter can be one of the following values: + * @arg APOSTROPHE_OFF: No apostrophe to add in back of char. + * @arg APOSTROPHE_ON: Add an apostrophe in back of char. + * @param position: Position in the LCD of the caracter to write. + * This parameter can be any value in range [0:7]. + * @retval None + */ +void LCD_GLASS_DisplayChar(uint8_t* ch, Point_Typedef point, DoublePoint_Typedef DoublePoint, uint8_t position) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + /*!< LCD Write Char */ + LCD_GLASS_WriteChar(ch, point, DoublePoint, position); + + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief This function writes a char in the LCD RAM. + * @param ptr: Pointer to string to display on the LCD Glass. + * @retval None + */ +void LCD_GLASS_DisplayString(uint8_t* ptr) +{ + uint8_t i = 0x00; + + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + /*!< Send the string character by character on lCD */ + while ((*ptr != 0) & (i < 8)) + { + /*!< Display one character on LCD */ + LCD_GLASS_WriteChar(ptr, POINT_OFF, DOUBLEPOINT_OFF, i); + /*!< Point on the next character */ + ptr++; + /*!< Increment the character counter */ + i++; + } + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief Display a string in scrolling mode + * @note The LCD should be cleared before to start the write operation. + * @param ptr: Pointer to string to display on the LCD Glass. + * @param nScroll: Specifies how many time the message will be scrolled + * @param ScrollSpeed: Specifies the speed of the scroll. + * Low value gives higher speed. + * @retval None + */ +void LCD_GLASS_ScrollString(uint8_t* ptr, uint16_t nScroll, uint16_t ScrollSpeed) +{ + uint8_t Repetition = 0; + uint8_t* ptr1; + uint8_t str[8] = ""; + ptr1 = ptr; + + LCD_GLASS_DisplayString(ptr1); + + delay(ScrollSpeed); + + for (Repetition = 0; Repetition < nScroll; Repetition++) + { + *(str + 1) = *ptr1; + *(str + 2) = *(ptr1 + 1); + *(str + 3) = *(ptr1 + 2); + *(str + 4) = *(ptr1 + 3); + *(str + 5) = *(ptr1 + 4); + *(str + 6) = *(ptr1 + 5); + *(str + 7) =*(ptr1 + 6); + *(str) = *(ptr1 + 7); + LCD_GLASS_ClearTextZone(); + LCD_GLASS_DisplayString(str); + delay(ScrollSpeed); + + *(str + 1) = *(ptr1 + 7); + *(str + 2) = *ptr1; + *(str + 3) = *(ptr1 + 1); + *(str + 4) = *(ptr1 + 2); + *(str + 5) = *(ptr1 + 3); + *(str + 6) = *(ptr1 + 4); + *(str + 7) = *(ptr1 + 5); + *(str) = *(ptr1 + 6); + LCD_GLASS_ClearTextZone(); + LCD_GLASS_DisplayString(str); + delay(ScrollSpeed); + + *(str + 1) = *(ptr1 + 6); + *(str + 2) = *(ptr1 + 7); + *(str + 3) = *ptr1; + *(str + 4) = *(ptr1 + 1); + *(str + 5) = *(ptr1 + 2); + *(str + 6) = *(ptr1 + 3); + *(str + 7) = *(ptr1 + 4); + *(str) = *(ptr1 + 5); + LCD_GLASS_ClearTextZone(); + LCD_GLASS_DisplayString(str); + delay(ScrollSpeed); + + *(str + 1) = *(ptr1 + 5); + *(str + 2) = *(ptr1 + 6); + *(str + 3) = *(ptr1 + 7); + *(str + 4) = *ptr1; + *(str + 5) = *(ptr1 + 1); + *(str + 6) = *(ptr1 + 2); + *(str + 7) = *(ptr1 + 3); + *(str) = *(ptr1 + 4); + LCD_GLASS_ClearTextZone(); + LCD_GLASS_DisplayString(str); + delay(ScrollSpeed); + + *(str + 1) = *(ptr1 + 4); + *(str + 2) = *(ptr1 + 5); + *(str + 3) = *(ptr1 + 6); + *(str + 4) = *(ptr1 + 7); + *(str + 5) = *ptr1; + *(str + 6) = *(ptr1 + 1); + *(str + 7) = *(ptr1 + 2); + *(str) = *(ptr1 + 3); + LCD_GLASS_ClearTextZone(); + LCD_GLASS_DisplayString(str); + delay(ScrollSpeed); + + *(str + 1) = *(ptr1 + 3); + *(str + 2) = *(ptr1 + 4); + *(str + 3) = *(ptr1 + 5); + *(str + 4) = *(ptr1 + 6); + *(str + 5) = *(ptr1 + 7); + *(str + 6) = *ptr1; + *(str + 7) = *(ptr1 + 1); + *(str) = *(ptr1 + 2); + LCD_GLASS_ClearTextZone(); + LCD_GLASS_DisplayString(str); + delay(ScrollSpeed); + + *(str + 1) = *(ptr1 + 2); + *(str + 2) = *(ptr1 + 3); + *(str + 3) = *(ptr1 + 4); + *(str + 4) = *(ptr1 + 5); + *(str + 5) = *(ptr1 + 6); + *(str + 6) = *(ptr1 + 7); + *(str + 7) = *ptr1; + *(str) = *(ptr1 + 1); + LCD_GLASS_ClearTextZone(); + LCD_GLASS_DisplayString(str); + delay(ScrollSpeed); + + *(str + 1) = *(ptr1 + 1); + *(str + 2) = *(ptr1 + 2); + *(str + 3) = *(ptr1 + 3); + *(str + 4) = *(ptr1 + 4); + *(str + 5) = *(ptr1 + 5); + *(str + 6) = *(ptr1 + 6); + *(str + 7) = *(ptr1 + 7); + *(str) = *(ptr1); + LCD_GLASS_ClearTextZone(); + LCD_GLASS_DisplayString(str); + delay(ScrollSpeed); + } +} + +/** + * @brief This function Clears the LCD Glass Text Zone. + * @param None + * @retval None + */ +void LCD_GLASS_ClearTextZone(void) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFE49A49; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFE49249; + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFE00000; + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFE00000; + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFE00800; + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFE00000; + + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief This function Clear the whole LCD RAM. + * @param None + * @retval None + */ +void LCD_GLASS_Clear(void) +{ + uint32_t counter = 0; + + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + for (counter = 0; counter <= 0x0F; counter++) + { + LCD->RAM[counter] = (uint32_t)0x00; + } + + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief Configure ST Logo display. + * @param NewState: enable or disable the logo display . + * @retval None + */ +void LCD_GLASS_DisplayLogo(FunctionalState NewState) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + if (NewState != DISABLE) + { + /* Set logo on */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000040; + } + else + { + /* Set logo of */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFFBF; + } + + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief Configure the LCD Battery Level. + * @param BatteryLevel: Specify the Battery Level to set. + * @retval None + */ +void LCD_GLASS_BatteryLevelConfig(BatteryLevel_TypeDef BatteryLevel) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + switch (BatteryLevel) + { + /* BATTERYLEVEL 1/4 */ + case BATTERYLEVEL_1_4: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFFF6; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFFF6; + /* Set BATTERYLEVEL_1_4 on */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000001; + break; + + /* BATTERYLEVEL 1/2 */ + case BATTERYLEVEL_1_2: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFFF6; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFFF6; + /* Set BatteryLevel_1_4 on */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000001; + /* Set BatteryLevel_1_2 on */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000001; + break; + + /* Battery Level 3/4 */ + case BATTERYLEVEL_3_4: + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFFF6; + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFFF6; + /* Set BATTERYLEVEL_3_4 on */ + /* Set BatteryLevel_1_4 on */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000001; + /* Set BatteryLevel_1_2 on */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000009; + break; + + /* BATTERYLEVEL_FULL */ + case BATTERYLEVEL_FULL: + /* Set BATTERYLEVEL_3_4 on */ + /* Set BatteryLevel_1_4 on */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000009; + /* Set BATTERYLEVEL_FULL on */ + /* Set BatteryLevel_1_2 on */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000009; + break; + + case BATTERYLEVEL_OFF: + /* Set BATTERYLEVEL_3_4 off */ + /* Set BATTERYLEVEL_1_4 off */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFFF6; + /* Set BATTERYLEVEL_1_2 off */ + /* Set BATTERYLEVEL_FULL off */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFFF6; + break; + + default: + break; + } + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief Configure the LCD ArrowDirection. + * @param Arrow: Specify the ArrowDirection to set. + * @retval None + */ +void LCD_GLASS_ArrowConfig(ArrowDirection_TypeDef ArrowDirection) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + switch (ArrowDirection) + { + /* ARROWDIRECTION_UP */ + case ARROWDIRECTION_UP: + /* Set ARROWDIRECTION_UP on */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00001000; + break; + + /* ARROWDIRECTION_LEFT */ + case ARROWDIRECTION_LEFT : + /* Set ARROWDIRECTION_LEFT on */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00001000; + break; + + /* ARROWDIRECTION_DOWN */ + case ARROWDIRECTION_DOWN: + /* Set ARROWDIRECTION_DOWN on */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00008000; + break; + + /* ARROWDIRECTION_RIGHT */ + case ARROWDIRECTION_RIGHT: + /* Set ARROWDIRECTION_RIGHT on */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00008000; + break; + + case ARROWDIRECTION_OFF: + /* Set ARROWDIRECTION_UP off */ + /* Set ARROWDIRECTION_RIGHT off */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFF6FFF; + /* Set ARROWDIRECTION_LEFT off */ + /* Set ARROWDIRECTION_DOWN off */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFF6FFF; + break; + + default: + break; + } + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief Configure the LCD Temperature level display . + * @param Temperature: indicate the Temperature level to set. + * @retval None + */ +void LCD_GLASS_TemperatureConfig(TemperatureLevel_TypeDef Temperature) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + switch (Temperature) + { + /* Temperature level 1*/ + case TEMPERATURELEVEL_1 : + /* Clear Temperature level 5 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 6 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 4 and level 2 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFF3FF; + /* Clear Temperature level 1 and level 3 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFF3FF; + /* Set Temperature level 1*/ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000200; + break; + + /* Temperature level 2 */ + case TEMPERATURELEVEL_2: + /* Clear Temperature level 5 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 6 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 4 and level 2 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFF3FF; + /* Clear Temperature level 1 and level 3 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFF3FF; + /* Set Temperature level 1 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000200; + /* Set Temperature level 2 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000200; + break; + + /* Temperature level 3 */ + case TEMPERATURELEVEL_3: + /* Clear Temperature level 5 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 6 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 4 and level 2 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFF3FF; + /* Clear Temperature level 1 and level 3 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFF3FF; + /* Set Temperature level 1 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000200; + /* Set Temperature level 2 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000200; + /* Set Temperature level 3 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000400; + break; + + /* Temperature level 4*/ + case TEMPERATURELEVEL_4: + /* Clear Temperature level 5 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 6 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 4 and level 2 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFF3FF; + /* Clear Temperature level 1 and level 3 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFF3FF; + /* Set Temperature level 1 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000200; + /* Set Temperature level 2 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000200; + /* Set Temperature level 3 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000400; + /* Set Temperature level 4 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000400; + break; + + /* Temperature_2*/ + case TEMPERATURELEVEL_5: + /* Clear Temperature level 5 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 6 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 4 and level 2 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFF3FF; + /* Clear Temperature level 1 and level 3 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFF3FF; + /* Set Temperature level 1 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000200; + /* Set Temperature level 2 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000200; + /* Set Temperature level 3 and level 5 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000C00; + /* Set Temperature level 4 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000400; + break; + + /* Temperature_6*/ + case TEMPERATURELEVEL_6: + /* Clear Temperature level 5 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 6 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 4 and level 2 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFF3FF; + /* Clear Temperature level 1 and level 3 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFF3FF; + /* Set Temperature level 1 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000200; + /* Set Temperature level 2 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000200; + /* Set Temperature level 3 and level 5 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000C00; + /* Set Temperature level 4 and level 6 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000C00; + break; + + case TEMPERATURELEVEL_OFF: + /* Clear Temperature level 5 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 6 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFFFDFF; + /* Clear Temperature level 4 and level 2 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFF3FF; + /* Clear Temperature level 1 and level 3 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFF3FF; + break; + + default: + break; + } + + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief Configure the LCD Value Unit. + * @param ValueUnit: indicate the Value Unit to set. + * @param NewState: enable or disable the Digit. + * @retval None + */ +void LCD_GLASS_ValueUnitConfig(ValueUnit_TypeDef ValueUnit) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + switch (ValueUnit) + { + /* VALUEUNIT MILLIAMPERE*/ + case VALUEUNIT_MILLIAMPERE: + /* Set VALUEUNIT_MILLIAMPERE on */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00040000; + break; + + /* VALUEUNIT MICROAMPERE)*/ + case VALUEUNIT_MICROAMPERE: + /* Set VALUEUNIT_MICROAMPERE */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00040000; + break; + + /* VALUEUNIT NANOAMPERE*/ + case VALUEUNIT_NANOAMPERE: + /* Set VALUEUNIT_NANOAMPERE on */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00000040; + break; + + case VALUEUNIT_OFF: + /* Set VALUEUNIT_MILLIAMPERE and VALUEUNIT_NANOAMPERE OFF */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFFBFFBF; + /* Set VALUEUNIT_MICROAMPERE off */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFBFFFF; + break; + + default: + break; + } + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief Configure the LCD sign. + * @param Sign: indicate the sign to set. + * @param NewState: enable or disable the Digit. + * @retval None + */ +void LCD_GLASS_SignCmd(Sign_TypeDef Sign, FunctionalState NewState) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + if (NewState != DISABLE) + { + switch (Sign) + { + /* Sign positive */ + case SIGN_POSITIVE: + /* Set SIGN_POSITIVE on */ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x00000800; + break; + + /* Sign negative*/ + case SIGN_NEGATIVE: + /* Set SIGN_NEGATIVE on */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00000800; + break; + + default: + break; + } + } + else + { + switch (Sign) + { + /* Sign positive */ + case SIGN_POSITIVE: + /* Set SIGN_POSITIVE off */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFFFF7FF; + break; + + /* Sign negative */ + case SIGN_NEGATIVE: + /* Set SIGN_NEGATIVE off */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFFFF7FF; + break; + + default: + break; + } + } + + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} +/** + * @brief Set Matrix Pixel on. + * @param PixelRow: Specify Matrix Row. + * @param PixelColumn: Specify Matrix Column. + * @retval None + */ +void LCD_GLASS_WriteMatrixPixel(PixelRow_TypeDef PixelRow, PixelColumn_TypeDef PixelColumn) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + switch (PixelRow) + { + case PIXELROW_1: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 1 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000200; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 1 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00004000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 1 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00002000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 1 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00001000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 1 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00020000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 1 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00010000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 1 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00008000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 1 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00100000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 1 , Column = 9 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00080000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 1 , Column = 10 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00040000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 1 , Column = 11 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 1 , Column = 12 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 1 , Column = 13 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 1 , Column = 14 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 1 , Column = 15 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 1 , Column = 16 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 1 , Column = 17 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000100; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 1 , Column = 18 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000080; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 1 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00000040; + break; + + default: + break; + + } + break; + + case PIXELROW_2: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 2 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000200; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 2 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00004000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 2 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00002000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 2 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00001000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 2 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00020000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 2 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00010000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 2 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00008000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 2 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00100000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 2 , Column = 9 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00080000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 2 , Column = 10 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00040000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 2 , Column = 11 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 2 , Column = 12 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 2 , Column = 13 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 2 , Column = 14 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 2 , Column = 15 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 2 , Column = 16 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 2 , Column = 17 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000100; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 2 , Column = 18 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000080; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 2 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00000040; + break; + + default: + break; + } + break; + + case PIXELROW_3: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 3 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00200000; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 3 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00400000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 3 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x00800000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 3 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x01000000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 3 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x02000000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 3 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x04000000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 3 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x08000000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 3 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x10000000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 3 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x20000000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 3 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x40000000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 3 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_4] |= (uint32_t)0x80000000; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 3 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_5] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 3 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_5] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 3 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_5] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 3 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_5] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 3 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_5] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 3 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_5] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 3 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_5] |= (uint32_t)0x00000040; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 3 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_5] |= (uint32_t)0x00000080; + break; + + default: + break; + } + break; + + case PIXELROW_4: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 4 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00200000; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 4 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00400000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 4 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x00800000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 4 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x01000000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 4 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x02000000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 4 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x04000000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 4 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x08000000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 4 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x10000000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 4 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x20000000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 4 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x40000000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 4 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_6] |= (uint32_t)0x80000000; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 4 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_7] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 4 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_7] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 4 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_7] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 4 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_7] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 4 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_7] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 4 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_7] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 4 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_7] |= (uint32_t)0x00000040; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 4 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_7] |= (uint32_t)0x00000080; + break; + + default: + break; + + } + break; + + case PIXELROW_5: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 5 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00200000; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 5 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00400000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 5 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x00800000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 5 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x01000000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 5 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x02000000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 5 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x04000000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 5 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x08000000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 5 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x10000000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 5 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x20000000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 5 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x40000000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 5 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_0] |= (uint32_t)0x80000000; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 5 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_1] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 5 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_1] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 5 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_1] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 5 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_1] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 5 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_1] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 5 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_1] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 5 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_1] |= (uint32_t)0x00000040; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 5 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_1] |= (uint32_t)0x00000080; + break; + + default: + break; + } + break; + + case PIXELROW_6: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 6 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00200000; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 6 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00400000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 6 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x00800000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 6 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x01000000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 6 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x02000000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 6 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x04000000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 6 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x08000000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 6 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x10000000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 6 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x20000000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 6 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x40000000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 6 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_2] |= (uint32_t)0x80000000; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 6 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_3] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 6 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_3] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 6 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_3] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 6 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_3] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 6 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_3] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 6 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_3] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 6 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_3] |= (uint32_t)0x00000040; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 6 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_3] |= (uint32_t)0x00000080; + break; + + default: + break; + } + break; + + case PIXELROW_7: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 7 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x00200000; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 7 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x00400000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 7 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x00800000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 7 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x01000000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 7 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x02000000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 7 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x04000000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 7 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x08000000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 7 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x10000000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 7 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x20000000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 7 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x40000000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 7 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_14] |= (uint32_t)0x80000000; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 7 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_15] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 7 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_15] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 7 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_15] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 7 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_15] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 7 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_15] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 7 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_15] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 7 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_15] |= (uint32_t)0x00000040; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 7 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_15] |= (uint32_t)0x00000080; + break; + + default: + break; + } + break; + + case PIXELROW_8: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 8 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x00200000; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 8 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x00400000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 8 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x00800000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 8 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x01000000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 8 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x02000000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 8 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x04000000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 8 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x08000000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 8 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x10000000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 8 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x20000000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 8 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x40000000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 8 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_12] |= (uint32_t)0x80000000; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 8 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_13] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 8 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_13] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 8 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_13] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 8 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_13] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 8 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_13] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 8 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_13] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 8 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_13] |= (uint32_t)0x00000040; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 8 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_13] |= (uint32_t)0x00000080; + break; + + default: + break; + } + break; + + case PIXELROW_9: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 9 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x00200000; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 9 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x00400000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 9 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x00800000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 9 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x01000000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 9 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x02000000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 9 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x04000000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 9 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x08000000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 9 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x10000000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 9 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x20000000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 9 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x40000000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 9 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_10] |= (uint32_t)0x80000000; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 9 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_11] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 9 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_11] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 9 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_11] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 9 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_11] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 9 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_11] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 9 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_11] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 9 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_11] |= (uint32_t)0x00000040; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 9 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_11] |= (uint32_t)0x00000080; + break; + + default: + break; + } + break; + + case PIXELROW_10: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 10 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x00200000; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 10 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x00400000; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 10 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x00800000; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 10 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x01000000; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 10 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x02000000; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 10 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x04000000; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 10 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x08000000; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 10 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x10000000; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 10 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x20000000; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 10 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x40000000; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 10 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_8] |= (uint32_t)0x80000000; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 10 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_9] |= (uint32_t)0x00000001; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 10 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_9] |= (uint32_t)0x00000002; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 10 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_9] |= (uint32_t)0x00000004; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 10 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_9] |= (uint32_t)0x00000008; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 10 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_9] |= (uint32_t)0x00000010; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 10 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_9] |= (uint32_t)0x00000020; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 10 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_9] |= (uint32_t)0x00000040; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 10 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_9] |= (uint32_t)0x00000080; + break; + + default: + break; + } + break; + } + + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief Set Matrix Pixel off. + * @param PixelRow: Specify Matrix Row. + * @param PixelColumn: Specify Matrix Column. + * @retval None + */ +void LCD_GLASS_ClearMatrixPixel(PixelRow_TypeDef PixelRow, PixelColumn_TypeDef PixelColumn) +{ + /*!< Wait Until the last LCD RAM update finish */ + while(LCD_GetFlagStatus(LCD_FLAG_UDR) != RESET) + { + } + + switch (PixelRow) + { + case PIXELROW_1: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 1 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFDFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 1 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFBFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 1 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFDFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 1 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFEFFF; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 1 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFDFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 1 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFEFFFF; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 1 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFF7FFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 1 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFEFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 1 , Column = 9 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFF7FFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 1 , Column = 10 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFBFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 1 , Column = 11 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 1 , Column = 12 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 1 , Column = 13 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 1 , Column = 14 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 1 , Column = 15 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 1 , Column = 16 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 1 , Column = 17 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFEFF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 1 , Column = 18 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFF7F; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 1 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFFFFFBF; + break; + + default: + break; + } + break; + + case PIXELROW_2: + + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 2 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFDFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 2 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFBFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 2 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFDFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 2 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFEFFF; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 2 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFDFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 2 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFEFFFF; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 2 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFF7FFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 2 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFEFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 2 , Column = 9 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFF7FFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 2 , Column = 10 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFBFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 2 , Column = 11 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 2 , Column = 12 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 2 , Column = 13 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 2 , Column = 14 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 2 , Column = 15 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 2 , Column = 16 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 2 , Column = 17 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFEFF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 2 , Column = 18 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFF7F; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 2 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFFFFFBF; + break; + + default: + break; + } + break; + + case PIXELROW_3: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 3 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFDFFFFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 3 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFFBFFFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 3 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFF7FFFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 3 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFEFFFFFF; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 3 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFDFFFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 3 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xFBFFFFFF; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 3 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xF7FFFFFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 3 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xEFFFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 3 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xDFFFFFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 3 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0xBFFFFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 3 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_4] &= (uint32_t)0x7FFFFFFF; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 3 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_5] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 3 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_5] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 3 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_5] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 3 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_5] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 3 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_5] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 3 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_5] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 3 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_5] &= (uint32_t)0xFFFFFFBF; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 3 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_5] &= (uint32_t)0xFFFFFF7F; + break; + + default: + break; + } + break; + + case PIXELROW_4: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 4 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFDFFFFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 4 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFFBFFFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 4 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFF7FFFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 4 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFEFFFFFF; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 4 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFDFFFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 4 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xFBFFFFFF; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 4 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xF7FFFFFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 4 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xEFFFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 4 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xDFFFFFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 4 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0xBFFFFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 4 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_6] &= (uint32_t)0x7FFFFFFF; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 4 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_7] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 4 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_7] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 4 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_7] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 4 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_7] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 4 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_7] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 4 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_7] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 4 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_7] &= (uint32_t)0xFFFFFFBF; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 4 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_7] &= (uint32_t)0xFFFFFF7F; + break; + + default: + break; + } + break; + + case PIXELROW_5: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 5 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFDFFFFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 5 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFFBFFFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 5 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFF7FFFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 5 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFEFFFFFF; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 5 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFDFFFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 5 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xFBFFFFFF; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 5 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xF7FFFFFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 5 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xEFFFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 5 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xDFFFFFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 5 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0xBFFFFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 5 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_0] &= (uint32_t)0x7FFFFFFF; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 5 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_1] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 5 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_1] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 5 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_1] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 5 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_1] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 5 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_1] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 5 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_1] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 5 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_1] &= (uint32_t)0xFFFFFFBF; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 5 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_1] &= (uint32_t)0xFFFFFF7F; + break; + + default: + break; + } + break; + + case PIXELROW_6: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 6 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFDFFFFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 6 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFFBFFFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 6 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFF7FFFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 6 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFEFFFFFF; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 6 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFDFFFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 6 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xFBFFFFFF; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 6 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xF7FFFFFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 6 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xEFFFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 6 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xDFFFFFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 6 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0xBFFFFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 6 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_2] &= (uint32_t)0x7FFFFFFF; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 6 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_3] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 6 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_3] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 6 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_3] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 6 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_3] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 6 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_3] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 6 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_3] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 6 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_3] &= (uint32_t)0xFFFFFFBF; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 6 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_3] &= (uint32_t)0xFFFFFF7F; + break; + + default: + break; + } + break; + + case PIXELROW_7: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 7 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFDFFFFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 7 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFFBFFFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 7 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFF7FFFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 7 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFEFFFFFF; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 7 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFDFFFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 7 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xFBFFFFFF; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 7 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xF7FFFFFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 7 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xEFFFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 7 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xDFFFFFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 7 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0xBFFFFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 7 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_14] &= (uint32_t)0x7FFFFFFF; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 7 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_15] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 7 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_15] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 7 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_15] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 7 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_15] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 7 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_15] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 7 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_15] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 7 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_15] &= (uint32_t)0xFFFFFFBF; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 7 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_15] &= (uint32_t)0xFFFFFF7F; + break; + + default: + break; + } + break; + + case PIXELROW_8: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 8 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFDFFFFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 8 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFFBFFFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 8 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFF7FFFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 8 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFEFFFFF0; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 8 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFDFFFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 8 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xFBFFFFF0; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 8 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xF7FFFFFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 8 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xEFFFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 8 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xDFFFFFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 8 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0xBFFFFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 8 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_12] &= (uint32_t)0x7FFFFFFF; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 8 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_13] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 8 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_13] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 8 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_13] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 8 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_13] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 8 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_13] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 8 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_13] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 8 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_13] &= (uint32_t)0xFFFFFFBF; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 8 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_13] &= (uint32_t)0xFFFFFF7F; + break; + + default: + break; + } + break; + + case PIXELROW_9: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 9 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFDFFFFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 9 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFFBFFFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 9 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFF7FFFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 9 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFEFFFFFF; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 9 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFDFFFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 9 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xFBFFFFFF; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 9 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xF7FFFFFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 9 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xEFFFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 9 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xDFFFFFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 9 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0xBFFFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 9 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_10] &= (uint32_t)0x7FFFFFFF; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 9 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_11] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 9 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_11] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 9 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_11] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 9 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_11] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 9 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_11] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 9 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_11] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 9 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_11] &= (uint32_t)0xFFFFFFBF; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 9 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_11] &= (uint32_t)0xFFFFFF7F; + break; + + default: + break; + } + break; + + case PIXELROW_10: + switch (PixelColumn) + { + case PIXELCOLUMN_1: + /* Position : Row = 10 , Column = 1 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFDFFFFF; + break; + + case PIXELCOLUMN_2: + /* Position : Row = 10 , Column = 2 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFFBFFFFF; + break; + + case PIXELCOLUMN_3: + /* Position : Row = 10 , Column = 3 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFF7FFFFF; + break; + + case PIXELCOLUMN_4: + /* Position : Row = 10 , Column = 4 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFEFFFFFF; + break; + + case PIXELCOLUMN_5: + /* Position : Row = 10 , Column = 5 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFDFFFFFF; + break; + + case PIXELCOLUMN_6: + /* Position : Row = 10 , Column = 6 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xFBFFFFFF; + break; + + case PIXELCOLUMN_7: + /* Position : Row = 10 , Column = 7 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xF7FFFFFF; + break; + + case PIXELCOLUMN_8: + /* Position : Row = 10 , Column = 8 */ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xEFFFFFFF; + break; + + case PIXELCOLUMN_9: + /* Position : Row = 10 , Column = 9*/ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xDFFFFFFF; + break; + + case PIXELCOLUMN_10: + /* Position : Row = 10 , Column = 10*/ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0xBFFFFFFF; + break; + + case PIXELCOLUMN_11: + /* Position : Row = 10 , Column = 11*/ + LCD->RAM[LCD_RAMRegister_8] &= (uint32_t)0x7FFFFFFF; + break; + + case PIXELCOLUMN_12: + /* Position : Row = 10 , Column = 12*/ + LCD->RAM[LCD_RAMRegister_9] &= (uint32_t)0xFFFFFFFE; + break; + + case PIXELCOLUMN_13: + /* Position : Row = 10 , Column = 13*/ + LCD->RAM[LCD_RAMRegister_9] &= (uint32_t)0xFFFFFFFD; + break; + + case PIXELCOLUMN_14: + /* Position : Row = 10 , Column = 14*/ + LCD->RAM[LCD_RAMRegister_9] &= (uint32_t)0xFFFFFFFB; + break; + + case PIXELCOLUMN_15: + /* Position : Row = 10 , Column = 15*/ + LCD->RAM[LCD_RAMRegister_9] &= (uint32_t)0xFFFFFFF7; + break; + + case PIXELCOLUMN_16: + /* Position : Row = 10 , Column = 16*/ + LCD->RAM[LCD_RAMRegister_9] &= (uint32_t)0xFFFFFFEF; + break; + + case PIXELCOLUMN_17: + /* Position : Row = 10 , Column = 17*/ + LCD->RAM[LCD_RAMRegister_9] &= (uint32_t)0xFFFFFFDF; + break; + + case PIXELCOLUMN_18: + /* Position : Row = 10 , Column = 18*/ + LCD->RAM[LCD_RAMRegister_9] &= (uint32_t)0xFFFFFFBF; + break; + + case PIXELCOLUMN_19: + /* Position : Row = 10 , Column = 19 */ + LCD->RAM[LCD_RAMRegister_9] &= (uint32_t)0xFFFFFF7F; + break; + + default: + break; + } + break; + } + + /*!< Request LCD RAM update */ + LCD_UpdateDisplayRequest(); +} + +/** + * @brief Converts an ascii char to the a LCD Digit (previous coding). + * @param c: a char to display. + * @param Point: a point to add in front of a char + * This parameter can be: POINT_OFF or POINT_ON + * @param DoublePoint: flag indicating if Double Point has to be added in front + * of the displayed character. + * This parameter can be: DOUBLEPOINT_ON or DOUBLEPOINT_OFF. + * @retval None + */ +static void Convert(uint8_t* c, Point_Typedef Point, DoublePoint_Typedef DoublePoint) +{ + uint32_t ch = 0 , tmp = 0; + uint8_t i = 0; + + /* The character c is a letter in upper case*/ + if ((*c < (uint8_t)0x5B)&(*c > (uint8_t)0x40)) + { + ch = LetterMap[*c-(uint8_t)0x41]; + } + /* The character c is a number*/ + if ((*c < (uint8_t)0x3A)&(*c > (uint8_t)0x2F)) + { + ch = NumberMap[*c-(uint8_t)0x30]; + } + /* The character c is a space character */ + if (*c == (uint8_t)0x20) + { + ch = (uint32_t)0x00; + } + /* Set the Q pixel in the character that can be displayed if the point is on */ + if (Point == POINT_ON) + { + ch |= (uint32_t)0x00400000; + } + + /* Set the P pixel in the character that can be displayed if the double point is on */ + if (DoublePoint == DOUBLEPOINT_ON) + { + ch |= (uint32_t)0x00000040; + } + + for (i = 0;i < 6; i++) + { + tmp = ch & Mask[i]; + Digit[i] = (uint8_t)(tmp >> (uint8_t)Shift[i]); + } +} + +/** + * @brief Configures the LCD Segments and Coms GPIOs. + * @param None + * @retval None + */ +static void LCD_GPIOConfig(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< Enable GPIOA, GPIOB, GPIOC, GPIOD and GPIOE AHB Clocks */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA | RCC_AHBPeriph_GPIOB | RCC_AHBPeriph_GPIOC + | RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOE, ENABLE); + + /*!< Connect PA.08 to LCD COM0 */ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource8, GPIO_AF_LCD); + + /*!< Connect PA.09 to LCD COM1 */ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource9, GPIO_AF_LCD); + + /*!< Connect PA.10 to LCD COM2 */ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource10, GPIO_AF_LCD); + + /*!< Connect PB.09 to LCD COM3 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource9, GPIO_AF_LCD); + + /*!< Connect PA.01 to LCD SEG0 */ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource1, GPIO_AF_LCD); + + /*!< Connect PA.02 to LCD SEG1 */ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource2, GPIO_AF_LCD); + + /*!< Connect PA.03 to LCD SEG2 */ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource3, GPIO_AF_LCD); + + /*!< Connect PA.06 to LCD SEG3 */ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource6, GPIO_AF_LCD); + + /*!< Connect PA.07 to LCD SEG4 */ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_LCD); + + /*!< Connect PB.00 to LCD SEG5 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource0, GPIO_AF_LCD); + + /*!< Connect PB.01 to LCD SEG6 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource1, GPIO_AF_LCD); + + /*!< Connect PB.03 to LCD SEG7 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource3, GPIO_AF_LCD); + + /*!< Connect PB.04 to LCD SEG8 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource4, GPIO_AF_LCD); + + /*!< Connect PB.05 to LCD SEG9 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource5, GPIO_AF_LCD); + + /*!< Connect PB.10 to LCD SEG10 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource10, GPIO_AF_LCD); + + /*!< Connect PB.11 to LCD SEG11 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource11, GPIO_AF_LCD); + + /*!< Connect PB.12 to LCD SEG12 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource12, GPIO_AF_LCD); + + /*!< Connect PB.13 to LCD SEG13 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource13, GPIO_AF_LCD); + + /*!< Connect PB.14 to LCD SEG14 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource14, GPIO_AF_LCD); + + /*!< Connect PB.15 to LCD SEG15 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource15, GPIO_AF_LCD); + + /*!< Connect PB.8 to LCD SEG16 */ + GPIO_PinAFConfig(GPIOB, GPIO_PinSource8, GPIO_AF_LCD); + + /*!< Connect PA15 to LCD SEG17 */ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource15, GPIO_AF_LCD); + + /*!< Connect PC.00 to LCD SEG18 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource0, GPIO_AF_LCD); + + /*!< Connect PC.01 to LCD SEG19 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource1, GPIO_AF_LCD); + + /*!< Connect PC.02 to LCD SEG20 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource2, GPIO_AF_LCD); + + /*!< Connect PC.03 to LCD SEG21 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource3, GPIO_AF_LCD); + + /*!< Connect PC.04 to LCD SEG22 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource4, GPIO_AF_LCD); + + /*!< Connect PC.05 to LCD SEG23 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource5, GPIO_AF_LCD); + + /*!< Connect PC.06 to LCD SEG24 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource6, GPIO_AF_LCD); + + /*!< Connect PC.07 to LCD SEG25 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource7, GPIO_AF_LCD); + + /*!< Connect PC.08 to LCD SEG26 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource8, GPIO_AF_LCD); + + /*!< Connect PC.09 to LCD SEG27 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource9, GPIO_AF_LCD); + + /*!< Connect PD.08 to LCD SEG28 */ + GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_LCD); + + /*!< Connect PD.09 to LCD SEG29 */ + GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_LCD); + + /*!< Connect PD.10 to LCD SEG30 */ + GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_LCD); + + /*!< Connect PD.11 to LCD SEG31 */ + GPIO_PinAFConfig(GPIOD, GPIO_PinSource11, GPIO_AF_LCD); + + /*!< Connect PD.12 to LCD SEG32 */ + GPIO_PinAFConfig(GPIOD, GPIO_PinSource12, GPIO_AF_LCD); + + /*!< Connect PD.13 to LCD SEG33 */ + GPIO_PinAFConfig(GPIOD, GPIO_PinSource13, GPIO_AF_LCD); + + /*!< Connect PD.14 to LCD SEG34 */ + GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_LCD); + + /*!< Connect PD.15 to LCD SEG35 */ + GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_LCD); + + /*!< Connect PE.00 to LCD SEG36 */ + GPIO_PinAFConfig(GPIOE, GPIO_PinSource0, GPIO_AF_LCD); + + /*!< Connect PE.01 to LCD SEG37 */ + GPIO_PinAFConfig(GPIOE, GPIO_PinSource1, GPIO_AF_LCD); + + /*!< Connect PE.02 to LCD SEG38 */ + GPIO_PinAFConfig(GPIOE, GPIO_PinSource2, GPIO_AF_LCD); + + /*!< Connect PE.03 to LCD SEG39 */ + GPIO_PinAFConfig(GPIOE, GPIO_PinSource3, GPIO_AF_LCD); + + /*!< Connect PC.10 to LCD SEG40 or LCD COM4 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource10, GPIO_AF_LCD); + + /*!< Connect PC.11 to LCD SEG41 or LCD COM5 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource11, GPIO_AF_LCD); + + /*!< Connect PC.12 to LCD SEG42 or LCD COM6 */ + GPIO_PinAFConfig(GPIOC, GPIO_PinSource12, GPIO_AF_LCD); + + /*!< Connect PD.02 to LCD SEG43 or LCD COM7 */ + GPIO_PinAFConfig(GPIOD, GPIO_PinSource2, GPIO_AF_LCD); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_6 | \ + GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | \ + GPIO_Pin_15; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_3 | GPIO_Pin_4 | \ + GPIO_Pin_5 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | \ + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | \ + GPIO_Pin_15; + GPIO_Init(GPIOB, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | \ + GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7 | \ + GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 | \ + GPIO_Pin_12; + GPIO_Init(GPIOC, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | \ + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | \ + GPIO_Pin_15; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3; + GPIO_Init(GPIOE, &GPIO_InitStructure); +} + +/** + * @brief Inserts a delay time. + * @param nCount: specifies the delay time length. + * @retval None + */ +static void delay(__IO uint32_t nCount) +{ + __IO uint32_t index = 0; + for(index = (0xFF * nCount); index != 0; index--) + { + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_glass_lcd.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_glass_lcd.h new file mode 100644 index 0000000..10c9e68 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_glass_lcd.h @@ -0,0 +1,264 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_glass_lcd.h + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief Header file for stm32l152d_eval_glass_lcd.c module. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L152D_EVAL_GLASS_LCD_H +#define __STM32L152D_EVAL_GLASS_LCD_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_GLASS_LCD + * @{ + */ + +/** @defgroup STM32L152D_EVAL_GLASS_LCD_Exported_Types + * @{ + */ + +/** + * @brief LCD Glass point + * Warning: element values correspond to LCD Glass point. + */ + +typedef enum +{ + POINT_OFF = 0, + POINT_ON = 1 +}Point_Typedef; + +/** + * @brief LCD Glass Double point + * Warning: element values correspond to LCD Glass Double point. + */ +typedef enum +{ + DOUBLEPOINT_OFF = 0, + DOUBLEPOINT_ON = 1 +}DoublePoint_Typedef; + +/** + * @brief LCD Glass Battery Level + * Warning: element values correspond to LCD Glass Battery Level. + */ + +typedef enum +{ + BATTERYLEVEL_OFF = 0, + BATTERYLEVEL_1_4 = 1, + BATTERYLEVEL_1_2 = 2, + BATTERYLEVEL_3_4 = 3, + BATTERYLEVEL_FULL = 4 +}BatteryLevel_TypeDef; + +/** + * @brief LCD Glass Temperature Level + * Warning: element values correspond to LCD Glass Temperature Level. + */ + +typedef enum +{ + TEMPERATURELEVEL_OFF = 0, + TEMPERATURELEVEL_1 = 1, + TEMPERATURELEVEL_2 = 2, + TEMPERATURELEVEL_3 = 3, + TEMPERATURELEVEL_4 = 4, + TEMPERATURELEVEL_5 = 5, + TEMPERATURELEVEL_6 = 6 +}TemperatureLevel_TypeDef; + +/** + * @brief LCD Glass Arrow Direction + * Warning: element values correspond to LCD Glass Arrow Direction. + */ + +typedef enum +{ + ARROWDIRECTION_OFF = 0, + ARROWDIRECTION_UP = 1, + ARROWDIRECTION_DOWN = 2, + ARROWDIRECTION_LEFT = 3, + ARROWDIRECTION_RIGHT = 4 +}ArrowDirection_TypeDef; + +/** + * @brief LCD Glass Value Unit + * Warning: element values correspond to LCD Glass Value Unit. + */ +typedef enum +{ + VALUEUNIT_OFF = 0, + VALUEUNIT_MILLIAMPERE = 1, + VALUEUNIT_MICROAMPERE = 2, + VALUEUNIT_NANOAMPERE = 3 +}ValueUnit_TypeDef; + +/** + * @brief LCD Glass Sign + * Warning: element values correspond to LCD Glass Sign. + */ +typedef enum +{ + SIGN_POSITIVE = 0, + SIGN_NEGATIVE = 1 +}Sign_TypeDef; + +/** + * @brief LCD Glass Pixel Row + * Warning: element values correspond to LCD Glass Pixel Row. + */ +typedef enum +{ + PIXELROW_1 = 1, + PIXELROW_2 = 2, + PIXELROW_3 = 3, + PIXELROW_4 = 4, + PIXELROW_5 = 5, + PIXELROW_6 = 6, + PIXELROW_7 = 7, + PIXELROW_8 = 8, + PIXELROW_9 = 9, + PIXELROW_10 = 10 +}PixelRow_TypeDef; + +/** + * @brief LCD Glass Pixel Column + * Warning: element values correspond to LCD Glass Pixel Column. + */ +typedef enum +{ + PIXELCOLUMN_1 = 1, + PIXELCOLUMN_2 = 2, + PIXELCOLUMN_3 = 3, + PIXELCOLUMN_4 = 4, + PIXELCOLUMN_5 = 5, + PIXELCOLUMN_6 = 6, + PIXELCOLUMN_7 = 7, + PIXELCOLUMN_8 = 8, + PIXELCOLUMN_9 = 9, + PIXELCOLUMN_10 = 10, + PIXELCOLUMN_11 = 11, + PIXELCOLUMN_12 = 12, + PIXELCOLUMN_13 = 13, + PIXELCOLUMN_14 = 14, + PIXELCOLUMN_15 = 15, + PIXELCOLUMN_16 = 16, + PIXELCOLUMN_17 = 17, + PIXELCOLUMN_18 = 18, + PIXELCOLUMN_19 = 19 +}PixelColumn_TypeDef; + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_GLASS_LCD_Exported_Constants + * @{ + */ + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_GLASS_LCD_Exported_Macros + * @{ + */ + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_GLASS_LCD_Exported_Functions + * @{ + */ +void LCD_GLASS_Init(void); +void LCD_GLASS_DisplayChar(uint8_t* ch, Point_Typedef point, DoublePoint_Typedef DoublePoint,uint8_t position); +void LCD_GLASS_DisplayString(uint8_t* ptr); +void LCD_GLASS_WriteChar(uint8_t* ch, Point_Typedef point, DoublePoint_Typedef DoublePoint,uint8_t position); +void LCD_GLASS_ClearChar(uint8_t position); +void LCD_GLASS_Clear(void); +void LCD_GLASS_ScrollString(uint8_t* ptr, uint16_t nScroll, uint16_t ScrollSpeed); + +void LCD_GLASS_ClearTextZone(void); +void LCD_GLASS_DisplayLogo(FunctionalState NewState); +void LCD_GLASS_BatteryLevelConfig(BatteryLevel_TypeDef BatteryLevel); +void LCD_GLASS_ArrowConfig(ArrowDirection_TypeDef ArrowDirection); +void LCD_GLASS_TemperatureConfig(TemperatureLevel_TypeDef TemperatureLevel); +void LCD_GLASS_ValueUnitConfig(ValueUnit_TypeDef ValueUnit); +void LCD_GLASS_SignCmd(Sign_TypeDef Sign, FunctionalState NewState); + +void LCD_GLASS_WriteMatrixPixel(PixelRow_TypeDef PixelRow, PixelColumn_TypeDef PixelColumn); +void LCD_GLASS_ClearMatrixPixel(PixelRow_TypeDef PixelRow, PixelColumn_TypeDef PixelColumn); +/** + * @} + */ + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L152D_EVAL_GLASS_LCD_H */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_lcd.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_lcd.c new file mode 100644 index 0000000..eaf7823 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_lcd.c @@ -0,0 +1,1684 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_lcd.c + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file includes the LCD driver for AM-240320D4TOQW-T00H(R), + * AM240320L8TNQW-00H(ILI9320), AM-240320LDTNQW-00H(SPFD5408B), + * AM240320LDTNQW04H00(ILI9325 or RM68050) and AM240320LGTNQW00H (HX8347-D) + * Liquid Crystal Display Module of STM32L152D-EVAL board. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval_lcd.h" +#include "../Common/fonts.c" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @defgroup STM32L152D_EVAL_LCD + * @brief This file includes the LCD driver for AM-240320D4TOQW-T00H(R), + * AM240320L8TNQW-00H(ILI9320), AM-240320LDTNQW-00H(SPFD5408B), + * AM240320LDTNQW04H00(ILI9325 or RM68050) and AM240320LGTNQW00H (HX8347-D) + * Liquid Crystal Display Module of STM32L152D-EVAL board. + * @{ + */ + +/** @defgroup STM32L152D_EVAL_LCD_Private_TypesDefinitions + * @{ + */ +typedef struct +{ + __IO uint16_t LCD_REG_R; /* Read Register */ + __IO uint16_t LCD_RAM_R; /* Read RAM */ + __IO uint16_t LCD_REG_W; /* Write Register */ + __IO uint16_t LCD_RAM_W; /* Write RAM */ +} TFT_LCD_TypeDef; +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_LCD_Private_Defines + * @{ + */ +/* Note: LCD /CS is CE4 - Bank 4 of NOR/SRAM Bank 1~4 */ +#define TFT_LCD_BASE ((uint32_t)(0x60000000 | 0x0C000000)) +#define TFT_LCD ((TFT_LCD_TypeDef *) TFT_LCD_BASE) +#define MAX_POLY_CORNERS 200 +#define POLY_Y(Z) ((int32_t)((Points + Z)->X)) +#define POLY_X(Z) ((int32_t)((Points + Z)->Y)) +#define LCD_ILI9325 0x9325 +#define LCD_ILI9320 0x9320 +#define LCD_SPFD5408 0x5408 +#define LCD_HX8347D 0x0047 +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LCD_Private_Macros + * @{ + */ +#define ABS(X) ((X) > 0 ? (X) : -(X)) +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LCD_Private_Variables + * @{ + */ +static sFONT *LCD_Currentfonts; +/* Global variables to set the written text color */ +static __IO uint16_t TextColor = 0x0000, BackColor = 0xFFFF; +static __IO uint16_t LCD_ID = 0; + +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_LCD_Private_FunctionPrototypes + * @{ + */ +#ifndef USE_Delay +static void delay(__IO uint32_t nCount); +#endif /* USE_Delay*/ +static void PutPixel(int16_t x, int16_t y); +static void LCD_PolyLineRelativeClosed(pPoint Points, uint16_t PointCount, uint16_t Closed); +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_LCD_Private_Functions + * @{ + */ + +/** + * @brief DeInitializes the LCD. + * @param None + * @retval None + */ +void STM32L152D_LCD_DeInit(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /*!< LCD Display Off */ + LCD_DisplayOff(); + + /* BANK 4 (of NOR/SRAM Bank 1~4) is disabled */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); + + /*!< LCD_SPI DeInit */ + FSMC_NORSRAMDeInit(FSMC_Bank1_NORSRAM4); + +/*-- GPIO Configuration ------------------------------------------------------*/ + /* Set PD.00(D2), PD.01(D3), PD.04(NOE), PD.05(NWE), PD.08(D13), PD.09(D14), + PD.10(D15), PD.14(D0), PD.15(D1) as input floating */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | + GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_EVENTOUT); + + /* Set PE.07(D4), PE.08(D5), PE.09(D6), PE.10(D7), PE.11(D8), PE.12(D9), PE.13(D10), + PE.14(D11), PE.15(D12) as input floating */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_EVENTOUT); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_EVENTOUT); + + /* Set PF.00(A0 (RS)) as input floating */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0; + GPIO_Init(GPIOF, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource0, GPIO_AF_EVENTOUT); + + /* Set PG.12(NE4 (LCD/CS)) as input floating - NE4(LCD /CS) */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; + GPIO_Init(GPIOG, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOG, GPIO_PinSource12, GPIO_AF_EVENTOUT); +} + +/** + * @brief Initializes the LCD. + * @param None + * @retval None + */ +void STM32L152D_LCD_Init(void) +{ +/* Configure the LCD Control pins --------------------------------------------*/ + LCD_CtrlLinesConfig(); +/* Configure the FSMC Parallel interface -------------------------------------*/ + LCD_FSMCConfig(); + + _delay_(5); /* Delay 50 ms */ + + /* Read the LCD ID */ + LCD_ID = LCD_ReadReg(0x00); + + /* Check if the LCD is HX8347D Controller */ + if(LCD_ID == LCD_HX8347D) + { + /* Driving ability setting */ + LCD_WriteReg(LCD_REG_234, 0x00); + LCD_WriteReg(LCD_REG_235, 0x20); + LCD_WriteReg(LCD_REG_236, 0x0C); + LCD_WriteReg(LCD_REG_237, 0xC4); + LCD_WriteReg(LCD_REG_232, 0x40); + LCD_WriteReg(LCD_REG_233, 0x38); + LCD_WriteReg(LCD_REG_241, 0x01); /* RGB 18-bit interface ;0x0110 */ + LCD_WriteReg(LCD_REG_242, 0x10); + LCD_WriteReg(LCD_REG_39, 0xA3); + + /* Adjust the Gamma Curve */ + LCD_WriteReg(LCD_REG_64, 0x01); + LCD_WriteReg(LCD_REG_65, 0x00); + LCD_WriteReg(LCD_REG_66, 0x00); + LCD_WriteReg(LCD_REG_67, 0x10); + LCD_WriteReg(LCD_REG_68, 0x0E); + LCD_WriteReg(LCD_REG_69, 0x24); + LCD_WriteReg(LCD_REG_70, 0x04); + LCD_WriteReg(LCD_REG_71, 0x50); + LCD_WriteReg(LCD_REG_72, 0x02); + LCD_WriteReg(LCD_REG_73, 0x13); + LCD_WriteReg(LCD_REG_74, 0x19); + LCD_WriteReg(LCD_REG_75, 0x19); + LCD_WriteReg(LCD_REG_76, 0x16); + + LCD_WriteReg(LCD_REG_80, 0x1B); + LCD_WriteReg(LCD_REG_81, 0x31); + LCD_WriteReg(LCD_REG_82, 0x2F); + LCD_WriteReg(LCD_REG_83, 0x3F); + LCD_WriteReg(LCD_REG_84, 0x3F); + LCD_WriteReg(LCD_REG_85, 0x3E); + LCD_WriteReg(LCD_REG_86, 0x2F); + LCD_WriteReg(LCD_REG_87, 0x7B); + LCD_WriteReg(LCD_REG_88, 0x09); + LCD_WriteReg(LCD_REG_89, 0x06); + LCD_WriteReg(LCD_REG_90, 0x06); + LCD_WriteReg(LCD_REG_91, 0x0C); + LCD_WriteReg(LCD_REG_92, 0x1D); + LCD_WriteReg(LCD_REG_93, 0xCC); + + /* Power voltage setting */ + LCD_WriteReg(LCD_REG_27, 0x1B); + LCD_WriteReg(LCD_REG_26, 0x01); + LCD_WriteReg(LCD_REG_36, 0x2F); + LCD_WriteReg(LCD_REG_37, 0x57); + /*****VCOM offset ****/ + LCD_WriteReg(LCD_REG_35, 0x86); + + /* Power on setting */ + LCD_WriteReg(LCD_REG_24, 0x36); /* Display frame rate:75Hz(2.85MHz X 117%) */ + LCD_WriteReg(LCD_REG_25, 0x01); /* Internal oscillator start to oscillate */ + LCD_WriteReg(LCD_REG_1,0x00); + LCD_WriteReg(LCD_REG_31, 0x88); /* Step-up Circuit 1 on,open abnormal power-off monitor */ + _delay_(2); + LCD_WriteReg(LCD_REG_31, 0x80); /* Step-up Circuit 1 off */ + _delay_(2); + LCD_WriteReg(LCD_REG_31, 0x90); /* VCOML voltage can output to negative voltage, + (1.0V ~ VCL+0.5V) */ + _delay_(2); + LCD_WriteReg(LCD_REG_31, 0xD0); /* Step-up Circuit 2 on */ + _delay_(2); + + LCD_WriteReg(LCD_REG_23, 0x05); /* COLMOD control */ + + /* Set GRAM Area - Partial Display Control */ + LCD_WriteReg(LCD_REG_1, 0x00); /* Scroll off */ + + LCD_WriteReg(LCD_REG_2, 0x00); + LCD_WriteReg(LCD_REG_3, 0x00); + LCD_WriteReg(LCD_REG_4, 0x01); /* X,Y swap */ + LCD_WriteReg(LCD_REG_5, 0x3F); /* X,Y swap */ + + LCD_WriteReg(LCD_REG_6, 0x00); + LCD_WriteReg(LCD_REG_7, 0x00); + LCD_WriteReg(LCD_REG_8, 0x00); /* X,Y swap */ + LCD_WriteReg(LCD_REG_9, 0xEF); /* X,Y swap */ + + /* Memory access control */ + /* bit7 controls left,right swap(X) */ + /* bit6 controls up,down swap(Y) */ + /* bit5 controls X,Y swap */ + LCD_WriteReg(LCD_REG_22, 0x28); + + /* SET PANEL */ + LCD_WriteReg(LCD_REG_54, 0x00); /* Panel characteristic control */ + LCD_WriteReg(LCD_REG_54, 0x04); /* Panel characteristic control: gate driver shift reverse[work] */ + LCD_WriteReg(LCD_REG_40, 0x38); /* Display control3: source output->PT(0,0) */ + _delay_(6); + LCD_WriteReg(LCD_REG_40, 0x3C); /* Display control3: source output->Display */ + } + /* Check if the LCD is SPFD5408B Controller */ + else if(LCD_ID == LCD_SPFD5408) + { + /* Start Initial Sequence ------------------------------------------------*/ + LCD_WriteReg(LCD_REG_1, 0x0100); /* Set SS bit */ + LCD_WriteReg(LCD_REG_2, 0x0700); /* Set 1 line inversion */ + LCD_WriteReg(LCD_REG_3, 0x1030); /* Set GRAM write direction and BGR=1. */ + LCD_WriteReg(LCD_REG_4, 0x0000); /* Resize register */ + LCD_WriteReg(LCD_REG_8, 0x0202); /* Set the back porch and front porch */ + LCD_WriteReg(LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + LCD_WriteReg(LCD_REG_10, 0x0000); /* FMARK function */ + LCD_WriteReg(LCD_REG_12, 0x0000); /* RGB 18-bit System interface setting */ + LCD_WriteReg(LCD_REG_13, 0x0000); /* Frame marker Position */ + LCD_WriteReg(LCD_REG_15, 0x0000); /* RGB interface polarity, no impact */ + /* Power On sequence -----------------------------------------------------*/ + LCD_WriteReg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + LCD_WriteReg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + LCD_WriteReg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ + LCD_WriteReg(LCD_REG_17, 0x0007); /* DC1[2:0], DC0[2:0], VC[2:0] */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_16, 0x12B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_18, 0x01BD); /* External reference voltage= Vci */ + _delay_(5); + LCD_WriteReg(LCD_REG_19, 0x1400); /* VDV[4:0] for VCOM amplitude */ + LCD_WriteReg(LCD_REG_41, 0x000E); /* VCM[4:0] for VCOMH */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + LCD_WriteReg(LCD_REG_33, 0x013F); /* GRAM Vertical Address */ + /* Adjust the Gamma Curve (SPFD5408B)-------------------------------------*/ + LCD_WriteReg(LCD_REG_48, 0x0b0d); + LCD_WriteReg(LCD_REG_49, 0x1923); + LCD_WriteReg(LCD_REG_50, 0x1c26); + LCD_WriteReg(LCD_REG_51, 0x261c); + LCD_WriteReg(LCD_REG_52, 0x2419); + LCD_WriteReg(LCD_REG_53, 0x0d0b); + LCD_WriteReg(LCD_REG_54, 0x1006); + LCD_WriteReg(LCD_REG_55, 0x0610); + LCD_WriteReg(LCD_REG_56, 0x0706); + LCD_WriteReg(LCD_REG_57, 0x0304); + LCD_WriteReg(LCD_REG_58, 0x0e05); + LCD_WriteReg(LCD_REG_59, 0x0e01); + LCD_WriteReg(LCD_REG_60, 0x010e); + LCD_WriteReg(LCD_REG_61, 0x050e); + LCD_WriteReg(LCD_REG_62, 0x0403); + LCD_WriteReg(LCD_REG_63, 0x0607); + /* Set GRAM area ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + LCD_WriteReg(LCD_REG_81, 0x00EF); /* Horizontal GRAM End Address */ + LCD_WriteReg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + LCD_WriteReg(LCD_REG_83, 0x013F); /* Vertical GRAM End Address */ + LCD_WriteReg(LCD_REG_96, 0xA700); /* Gate Scan Line */ + LCD_WriteReg(LCD_REG_97, 0x0001); /* NDL, VLE, REV */ + LCD_WriteReg(LCD_REG_106, 0x0000); /* set scrolling line */ + /* Partial Display Control -----------------------------------------------*/ + LCD_WriteReg(LCD_REG_128, 0x0000); + LCD_WriteReg(LCD_REG_129, 0x0000); + LCD_WriteReg(LCD_REG_130, 0x0000); + LCD_WriteReg(LCD_REG_131, 0x0000); + LCD_WriteReg(LCD_REG_132, 0x0000); + LCD_WriteReg(LCD_REG_133, 0x0000); + /* Panel Control ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_144, 0x0010); + LCD_WriteReg(LCD_REG_146, 0x0000); + LCD_WriteReg(LCD_REG_147, 0x0003); + LCD_WriteReg(LCD_REG_149, 0x0110); + LCD_WriteReg(LCD_REG_151, 0x0000); + LCD_WriteReg(LCD_REG_152, 0x0000); + /* Set GRAM write direction and BGR=1 + I/D=01 (Horizontal : increment, Vertical : decrement) + AM=1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1018); + LCD_WriteReg(LCD_REG_7, 0x0112); /* 262K color and display ON */ + } + /* Check if the LCD is ILI9320 Controller */ + else if(LCD_ID == LCD_ILI9320) + { + /* Start Initial Sequence ------------------------------------------------*/ + LCD_WriteReg(LCD_REG_229,0x8000); /* Set the internal vcore voltage */ + LCD_WriteReg(LCD_REG_0, 0x0001); /* Start internal OSC. */ + LCD_WriteReg(LCD_REG_1, 0x0100); /* set SS and SM bit */ + LCD_WriteReg(LCD_REG_2, 0x0700); /* set 1 line inversion */ + LCD_WriteReg(LCD_REG_3, 0x1030); /* set GRAM write direction and BGR=1. */ + LCD_WriteReg(LCD_REG_4, 0x0000); /* Resize register */ + LCD_WriteReg(LCD_REG_8, 0x0202); /* set the back porch and front porch */ + LCD_WriteReg(LCD_REG_9, 0x0000); /* set non-display area refresh cycle ISC[3:0] */ + LCD_WriteReg(LCD_REG_10, 0x0000); /* FMARK function */ + LCD_WriteReg(LCD_REG_12, 0x0000); /* RGB interface setting */ + LCD_WriteReg(LCD_REG_13, 0x0000); /* Frame marker Position */ + LCD_WriteReg(LCD_REG_15, 0x0000); /* RGB interface polarity */ + + /* Power On sequence -----------------------------------------------------*/ + LCD_WriteReg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + LCD_WriteReg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + LCD_WriteReg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ + LCD_WriteReg(LCD_REG_16, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_18, 0x0139); /* VREG1OUT voltage */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ + LCD_WriteReg(LCD_REG_41, 0x0013); /* VCM[4:0] for VCOMH */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + LCD_WriteReg(LCD_REG_33, 0x0000); /* GRAM Vertical Address */ + + /* Adjust the Gamma Curve ------------------------------------------------*/ + LCD_WriteReg(LCD_REG_48, 0x0006); + LCD_WriteReg(LCD_REG_49, 0x0101); + LCD_WriteReg(LCD_REG_50, 0x0003); + LCD_WriteReg(LCD_REG_53, 0x0106); + LCD_WriteReg(LCD_REG_54, 0x0b02); + LCD_WriteReg(LCD_REG_55, 0x0302); + LCD_WriteReg(LCD_REG_56, 0x0707); + LCD_WriteReg(LCD_REG_57, 0x0007); + LCD_WriteReg(LCD_REG_60, 0x0600); + LCD_WriteReg(LCD_REG_61, 0x020b); + + /* Set GRAM area ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + LCD_WriteReg(LCD_REG_81, 0x00EF); /* Horizontal GRAM End Address */ + LCD_WriteReg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + LCD_WriteReg(LCD_REG_83, 0x013F); /* Vertical GRAM End Address */ + LCD_WriteReg(LCD_REG_96, 0x2700); /* Gate Scan Line */ + LCD_WriteReg(LCD_REG_97, 0x0001); /* NDL,VLE, REV */ + LCD_WriteReg(LCD_REG_106, 0x0000); /* set scrolling line */ + + /* Partial Display Control -----------------------------------------------*/ + LCD_WriteReg(LCD_REG_128, 0x0000); + LCD_WriteReg(LCD_REG_129, 0x0000); + LCD_WriteReg(LCD_REG_130, 0x0000); + LCD_WriteReg(LCD_REG_131, 0x0000); + LCD_WriteReg(LCD_REG_132, 0x0000); + LCD_WriteReg(LCD_REG_133, 0x0000); + + /* Panel Control ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_144, 0x0010); + LCD_WriteReg(LCD_REG_146, 0x0000); + LCD_WriteReg(LCD_REG_147, 0x0003); + LCD_WriteReg(LCD_REG_149, 0x0110); + LCD_WriteReg(LCD_REG_151, 0x0000); + LCD_WriteReg(LCD_REG_152, 0x0000); + + /* Set GRAM write direction and BGR = 1 */ + /* I/D=01 (Horizontal : increment, Vertical : decrement) */ + /* AM=1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1018); + + LCD_WriteReg(LCD_REG_7, 0x0173); /* 262K color and display ON */ + } + else if(LCD_ID == LCD_ILI9325) /* Check if the LCD is ILI9325 Controller */ + { + /* Start Initial Sequence ------------------------------------------------*/ + LCD_WriteReg(LCD_REG_0, 0x0001); /* Start internal OSC. */ + LCD_WriteReg(LCD_REG_1, 0x0100); /* Set SS and SM bit */ + LCD_WriteReg(LCD_REG_2, 0x0700); /* Set 1 line inversion */ + LCD_WriteReg(LCD_REG_3, 0x1018); /* Set GRAM write direction and BGR=1. */ + LCD_WriteReg(LCD_REG_4, 0x0000); /* Resize register */ + LCD_WriteReg(LCD_REG_8, 0x0202); /* Set the back porch and front porch */ + LCD_WriteReg(LCD_REG_9, 0x0000); /* Set non-display area refresh cycle ISC[3:0] */ + LCD_WriteReg(LCD_REG_10, 0x0000); /* FMARK function */ + LCD_WriteReg(LCD_REG_12, 0x0000); /* RGB interface setting */ + LCD_WriteReg(LCD_REG_13, 0x0000); /* Frame marker Position */ + LCD_WriteReg(LCD_REG_15, 0x0000); /* RGB interface polarity */ + + /* Power On sequence -----------------------------------------------------*/ + LCD_WriteReg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + LCD_WriteReg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + LCD_WriteReg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude */ + _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ + LCD_WriteReg(LCD_REG_16, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_18, 0x0139); /* VREG1OUT voltage */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ + LCD_WriteReg(LCD_REG_41, 0x0013); /* VCM[4:0] for VCOMH */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_32, 0x0000); /* GRAM horizontal Address */ + LCD_WriteReg(LCD_REG_33, 0x0000); /* GRAM Vertical Address */ + + /* Adjust the Gamma Curve (ILI9325)---------------------------------------*/ + LCD_WriteReg(LCD_REG_48, 0x0007); + LCD_WriteReg(LCD_REG_49, 0x0302); + LCD_WriteReg(LCD_REG_50, 0x0105); + LCD_WriteReg(LCD_REG_53, 0x0206); + LCD_WriteReg(LCD_REG_54, 0x0808); + LCD_WriteReg(LCD_REG_55, 0x0206); + LCD_WriteReg(LCD_REG_56, 0x0504); + LCD_WriteReg(LCD_REG_57, 0x0007); + LCD_WriteReg(LCD_REG_60, 0x0105); + LCD_WriteReg(LCD_REG_61, 0x0808); + + /* Set GRAM area ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_80, 0x0000); /* Horizontal GRAM Start Address */ + LCD_WriteReg(LCD_REG_81, 0x00EF); /* Horizontal GRAM End Address */ + LCD_WriteReg(LCD_REG_82, 0x0000); /* Vertical GRAM Start Address */ + LCD_WriteReg(LCD_REG_83, 0x013F); /* Vertical GRAM End Address */ + + LCD_WriteReg(LCD_REG_96, 0xA700); /* Gate Scan Line(GS=1, scan direction is G320~G1) */ + LCD_WriteReg(LCD_REG_97, 0x0001); /* NDL,VLE, REV */ + LCD_WriteReg(LCD_REG_106, 0x0000); /* set scrolling line */ + + /* Partial Display Control -----------------------------------------------*/ + LCD_WriteReg(LCD_REG_128, 0x0000); + LCD_WriteReg(LCD_REG_129, 0x0000); + LCD_WriteReg(LCD_REG_130, 0x0000); + LCD_WriteReg(LCD_REG_131, 0x0000); + LCD_WriteReg(LCD_REG_132, 0x0000); + LCD_WriteReg(LCD_REG_133, 0x0000); + + /* Panel Control ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_144, 0x0010); + LCD_WriteReg(LCD_REG_146, 0x0000); + LCD_WriteReg(LCD_REG_147, 0x0003); + LCD_WriteReg(LCD_REG_149, 0x0110); + LCD_WriteReg(LCD_REG_151, 0x0000); + LCD_WriteReg(LCD_REG_152, 0x0000); + + /* Set GRAM write direction and BGR = 1 */ + /* I/D=00 (Horizontal : increment, Vertical : decrement) */ + /* AM=1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1018); + + LCD_WriteReg(LCD_REG_7, 0x0133); /* 262K color and display ON */ + } + LCD_SetFont(&LCD_DEFAULT_FONT); +} + +/** + * @brief Sets the LCD Text and Background colors. + * @param _TextColor: specifies the Text Color. + * @param _BackColor: specifies the Background Color. + * @retval None + */ +void LCD_SetColors(__IO uint16_t _TextColor, __IO uint16_t _BackColor) +{ + TextColor = _TextColor; + BackColor = _BackColor; +} + +/** + * @brief Gets the LCD Text and Background colors. + * @param _TextColor: pointer to the variable that will contain the Text + Color. + * @param _BackColor: pointer to the variable that will contain the Background + Color. + * @retval None + */ +void LCD_GetColors(__IO uint16_t *_TextColor, __IO uint16_t *_BackColor) +{ + *_TextColor = TextColor; *_BackColor = BackColor; +} + +/** + * @brief Sets the Text color. + * @param Color: specifies the Text color code RGB(5-6-5). + * @retval None + */ +void LCD_SetTextColor(__IO uint16_t Color) +{ + TextColor = Color; +} + + +/** + * @brief Sets the Background color. + * @param Color: specifies the Background color code RGB(5-6-5). + * @retval None + */ +void LCD_SetBackColor(__IO uint16_t Color) +{ + BackColor = Color; +} + +/** + * @brief Sets the Text Font. + * @param fonts: specifies the font to be used. + * @retval None + */ +void LCD_SetFont(sFONT *fonts) +{ + LCD_Currentfonts = fonts; +} + +/** + * @brief Gets the Text Font. + * @param None. + * @retval the used font. + */ +sFONT *LCD_GetFont(void) +{ + return LCD_Currentfonts; +} + +/** + * @brief Clears the selected line. + * @param Line: the Line to be cleared. + * This parameter can be one of the following values: + * @arg Linex: where x can be 0..n + * @retval None + */ +void LCD_ClearLine(uint16_t Line) +{ + uint16_t refcolumn = LCD_PIXEL_WIDTH - 1; + + if(LCD_ID == LCD_HX8347D) + { + refcolumn = 0; + /* Send the string character by character on LCD */ + while ((LCD_PIXEL_WIDTH - (refcolumn & 0xFFFF)) >= LCD_Currentfonts->Width) + { + /* Display one character on LCD */ + LCD_DisplayChar(Line, refcolumn, ' '); + /* Increment the column position by 16 */ + refcolumn += LCD_Currentfonts->Width; + } + } + else + { + /* Send the string character by character on lCD */ + while (((refcolumn + 1)&0xFFFF) >= LCD_Currentfonts->Width) + { + /* Display one character on LCD */ + LCD_DisplayChar(Line, refcolumn, ' '); + /* Decrement the column position by 16 */ + refcolumn -= LCD_Currentfonts->Width; + } + } +} + +/** + * @brief Clears the hole LCD. + * @param Color: the color of the background. + * @retval None + */ +void LCD_Clear(uint16_t Color) +{ + uint32_t index = 0; + + if(LCD_ID == LCD_HX8347D) + { + LCD_SetCursor(0x00, 0x0000); + } + else + { + LCD_SetCursor(0x00, 0x013F); + } + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + for(index = 0; index < 76800; index++) + { + TFT_LCD->LCD_RAM_W = Color; + } +} + +/** + * @brief Sets the cursor position. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @retval None + */ +void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos) +{ + if(LCD_ID == LCD_HX8347D) + { + LCD_WriteReg(LCD_REG_2, Ypos >> 8); + LCD_WriteReg(LCD_REG_3, Ypos & 0xFF); + LCD_WriteReg(LCD_REG_6, 0x00); + LCD_WriteReg(LCD_REG_7, Xpos); + } + else + { + LCD_WriteReg(LCD_REG_32, Xpos); + LCD_WriteReg(LCD_REG_33, Ypos); + } +} + +/** + * @brief Draws a character on LCD. + * @param Xpos: the Line where to display the character shape. + * @param Ypos: start column address. + * @param c: pointer to the character data. + * @retval None + */ +void LCD_DrawChar(uint16_t Xpos, uint16_t Ypos, const uint16_t *c) +{ + uint32_t index = 0, i = 0; + uint16_t Xaddress = 0; + + Xaddress = Xpos; + + LCD_SetCursor(Xaddress, Ypos); + + for(index = 0; index < LCD_Currentfonts->Height; index++) + { + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + for(i = 0; i < LCD_Currentfonts->Width; i++) + { + if((((c[index] & ((0x80 << ((LCD_Currentfonts->Width / 12 ) * 8 ) ) >> i)) == 0x00) &&(LCD_Currentfonts->Width <= 12))|| + (((c[index] & (0x1 << i)) == 0x00)&&(LCD_Currentfonts->Width > 12 ))) + + { + LCD_WriteRAM(BackColor); + } + else + { + LCD_WriteRAM(TextColor); + } + } + Xaddress++; + LCD_SetCursor(Xaddress, Ypos); + } +} + +/** + * @brief Displays one character (16dots width, 24dots height). + * @param Line: the Line where to display the character shape . + * This parameter can be one of the following values: + * @arg Linex: where x can be 0..9 + * @param Column: start column address. + * @param Ascii: character ascii code, must be between 0x20 and 0x7E. + * @retval None + */ +void LCD_DisplayChar(uint16_t Line, uint16_t Column, uint8_t Ascii) +{ + Ascii -= 32; + LCD_DrawChar(Line, Column, &LCD_Currentfonts->table[Ascii * LCD_Currentfonts->Height]); +} + +/** + * @brief Displays a maximum of 20 char on the LCD. + * @param Line: the Line where to display the character shape . + * This parameter can be one of the following values: + * @arg Linex: where x can be 0..9 + * @param *ptr: pointer to string to display on LCD. + * @retval None + */ +void LCD_DisplayStringLine(uint16_t Line, uint8_t *ptr) +{ + uint16_t refcolumn = LCD_PIXEL_WIDTH - 1; + + if(LCD_ID == LCD_HX8347D) + { + refcolumn = 0; + /* Send the string character by character on LCD */ + while ((*ptr != 0) & ((LCD_PIXEL_WIDTH - (refcolumn & 0xFFFF)) >= LCD_Currentfonts->Width)) + { + /* Display one character on LCD */ + LCD_DisplayChar(Line, refcolumn, *ptr); + /* Increment the column position by 16 */ + refcolumn += LCD_Currentfonts->Width; + /* Point on the next character */ + ptr++; + } + } + else + { + /* Send the string character by character on LCD */ + while ((*ptr != 0) & (((refcolumn + 1) & 0xFFFF) >= LCD_Currentfonts->Width)) + { + /* Display one character on LCD */ + LCD_DisplayChar(Line, refcolumn, *ptr); + /* Decrement the column position by 16 */ + refcolumn -= LCD_Currentfonts->Width; + /* Point on the next character */ + ptr++; + } + } +} + +/** + * @brief Sets a display window + * @param Xpos: specifies the X buttom left position. + * @param Ypos: specifies the Y buttom left position. + * @param Height: display window height. + * @param Width: display window width. + * @retval None + */ +void LCD_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width) +{ + if(LCD_ID == LCD_HX8347D) + { + LCD_WriteReg(LCD_REG_2, (319 - Ypos) >> 8); /* SC */ + LCD_WriteReg(LCD_REG_3, (319 - Ypos) & 0xFF); /* SC */ + + LCD_WriteReg(LCD_REG_4, (319 - (Ypos - Width + 1)) >> 8); /* EC */ + LCD_WriteReg(LCD_REG_5, (319 - (Ypos - Width + 1)) & 0xFF); /* EC */ + + LCD_WriteReg(LCD_REG_6, 0x0); /* SP */ + LCD_WriteReg(LCD_REG_7, (239 - Xpos) & 0xFF); /* SP */ + + LCD_WriteReg(LCD_REG_8, 0x0); /* EP */ + LCD_WriteReg(LCD_REG_9, (239 - (Xpos - Height + 1)) & 0xFF); /* EP */ + } + else + { + /* Horizontal GRAM Start Address */ + if(Xpos >= Height) + { + LCD_WriteReg(LCD_REG_80, (Xpos - Height + 1)); + } + else + { + LCD_WriteReg(LCD_REG_80, 0); + } + /* Horizontal GRAM End Address */ + LCD_WriteReg(LCD_REG_81, Xpos); + /* Vertical GRAM Start Address */ + if(Ypos >= Width) + { + LCD_WriteReg(LCD_REG_82, (Ypos - Width + 1)); + } + else + { + LCD_WriteReg(LCD_REG_82, 0); + } + /* Vertical GRAM End Address */ + LCD_WriteReg(LCD_REG_83, Ypos); + LCD_SetCursor(Xpos, Ypos); + } +} + +/** + * @brief Disables LCD Window mode. + * @param None + * @retval None + */ +void LCD_WindowModeDisable(void) +{ + LCD_SetDisplayWindow(239, 0x13F, 240, 320); + + if(LCD_ID != LCD_HX8347D) + { + LCD_WriteReg(LCD_REG_3, 0x1018); + } +} + +/** + * @brief Displays a line. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Length: line length. + * @param Direction: line direction. + * This parameter can be one of the following values: Vertical or Horizontal. + * @retval None + */ +void LCD_DrawLine(uint16_t Xpos, uint16_t Ypos, uint16_t Length, uint8_t Direction) +{ + uint32_t i = 0; + + if(LCD_ID == LCD_HX8347D) + { + LCD_SetCursor(Xpos, (LCD_PIXEL_WIDTH - 1) - Ypos); + } + else + { + LCD_SetCursor(Xpos, Ypos); + } + + if(Direction == LCD_DIR_HORIZONTAL) + { + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + for(i = 0; i < Length; i++) + { + LCD_WriteRAM(TextColor); + } + } + else + { + for(i = 0; i < Length; i++) + { + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + Xpos++; + if(LCD_ID == LCD_HX8347D) + { + LCD_SetCursor(Xpos, (LCD_PIXEL_WIDTH - 1) - Ypos); + } + else + { + LCD_SetCursor(Xpos, Ypos); + } + } + } +} + +/** + * @brief Displays a rectangle. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Height: display rectangle height. + * @param Width: display rectangle width. + * @retval None + */ +void LCD_DrawRect(uint16_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width) +{ + LCD_DrawLine(Xpos, Ypos, Width, LCD_DIR_HORIZONTAL); + LCD_DrawLine((Xpos + Height), Ypos, Width, LCD_DIR_HORIZONTAL); + + LCD_DrawLine(Xpos, Ypos, Height, LCD_DIR_VERTICAL); + LCD_DrawLine(Xpos, (Ypos - Width + 1), Height, LCD_DIR_VERTICAL); +} + +/** + * @brief Displays a circle. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Radius + * @retval None + */ +void LCD_DrawCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius) +{ + int32_t D;/* Decision Variable */ + uint32_t CurX;/* Current X Value */ + uint32_t CurY;/* Current Y Value */ + + if(LCD_ID == LCD_HX8347D) + { + Ypos = (LCD_PIXEL_WIDTH - 1) - Ypos; + } + D = 3 - (Radius << 1); + CurX = 0; + CurY = Radius; + + while (CurX <= CurY) + { + LCD_SetCursor(Xpos + CurX, Ypos + CurY); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos + CurX, Ypos - CurY); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos - CurX, Ypos + CurY); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos - CurX, Ypos - CurY); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos + CurY, Ypos + CurX); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos + CurY, Ypos - CurX); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos - CurY, Ypos + CurX); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + LCD_SetCursor(Xpos - CurY, Ypos - CurX); + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + LCD_WriteRAM(TextColor); + if (D < 0) + { + D += (CurX << 2) + 6; + } + else + { + D += ((CurX - CurY) << 2) + 10; + CurY--; + } + CurX++; + } +} + +/** + * @brief Displays a monocolor picture. + * @param Pict: pointer to the picture array. + * @retval None + */ +void LCD_DrawMonoPict(const uint32_t *Pict) +{ + uint32_t index = 0, i = 0; + + if(LCD_ID == LCD_HX8347D) + { + LCD_SetCursor(0, 0); + } + else + { + LCD_SetCursor(0, (LCD_PIXEL_WIDTH - 1)); + } + + LCD_WriteRAM_Prepare(); /* Prepare to write GRAM */ + for(index = 0; index < 2400; index++) + { + for(i = 0; i < 32; i++) + { + if((Pict[index] & (1 << i)) == 0x00) + { + LCD_WriteRAM(BackColor); + } + else + { + LCD_WriteRAM(TextColor); + } + } + } +} + +/** + * @brief Displays a bitmap picture loaded in the internal Flash. + * @param BmpAddress: Bmp picture address in the internal Flash. + * @retval None + */ +void LCD_WriteBMP(uint32_t BmpAddress) +{ + uint32_t index = 0, size = 0; + /* Read bitmap size */ + size = *(__IO uint16_t *) (BmpAddress + 2); + size |= (*(__IO uint16_t *) (BmpAddress + 4)) << 16; + /* Get bitmap data address offset */ + index = *(__IO uint16_t *) (BmpAddress + 10); + index |= (*(__IO uint16_t *) (BmpAddress + 12)) << 16; + size = (size - index)/2; + BmpAddress += index; + /* Set GRAM write direction and BGR = 1 */ + /* I/D=00 (Horizontal : decrement, Vertical : decrement) */ + /* AM=1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1008); + + LCD_WriteRAM_Prepare(); + + for(index = 0; index < size; index++) + { + LCD_WriteRAM(*(__IO uint16_t *)BmpAddress); + BmpAddress += 2; + } + + /* Set GRAM write direction and BGR = 1 */ + /* I/D = 01 (Horizontal : increment, Vertical : decrement) */ + /* AM = 1 (address is updated in vertical writing direction) */ + LCD_WriteReg(LCD_REG_3, 0x1018); +} + +/** + * @brief Displays a full rectangle. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Height: rectangle height. + * @param Width: rectangle width. + * @retval None + */ +void LCD_DrawFullRect(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height) +{ + LCD_SetTextColor(TextColor); + + LCD_DrawLine(Xpos, Ypos, Width, LCD_DIR_HORIZONTAL); + LCD_DrawLine((Xpos + Height), Ypos, Width, LCD_DIR_HORIZONTAL); + + LCD_DrawLine(Xpos, Ypos, Height, LCD_DIR_VERTICAL); + LCD_DrawLine(Xpos, (Ypos - Width + 1), Height, LCD_DIR_VERTICAL); + + Width -= 2; + Height--; + Ypos--; + + LCD_SetTextColor(BackColor); + + while(Height--) + { + LCD_DrawLine(++Xpos, Ypos, Width, LCD_DIR_HORIZONTAL); + } + + LCD_SetTextColor(TextColor); +} + +/** + * @brief Displays a full circle. + * @param Xpos: specifies the X position. + * @param Ypos: specifies the Y position. + * @param Radius + * @retval None + */ +void LCD_DrawFullCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius) +{ + int32_t D; /* Decision Variable */ + uint32_t CurX;/* Current X Value */ + uint32_t CurY;/* Current Y Value */ + + D = 3 - (Radius << 1); + + CurX = 0; + CurY = Radius; + + LCD_SetTextColor(BackColor); + + while (CurX <= CurY) + { + if(CurY > 0) + { + LCD_DrawLine(Xpos - CurX, Ypos + CurY, 2*CurY, LCD_DIR_HORIZONTAL); + LCD_DrawLine(Xpos + CurX, Ypos + CurY, 2*CurY, LCD_DIR_HORIZONTAL); + } + + if(CurX > 0) + { + LCD_DrawLine(Xpos - CurY, Ypos + CurX, 2*CurX, LCD_DIR_HORIZONTAL); + LCD_DrawLine(Xpos + CurY, Ypos + CurX, 2*CurX, LCD_DIR_HORIZONTAL); + } + if (D < 0) + { + D += (CurX << 2) + 6; + } + else + { + D += ((CurX - CurY) << 2) + 10; + CurY--; + } + CurX++; + } + + LCD_SetTextColor(TextColor); + LCD_DrawCircle(Xpos, Ypos, Radius); +} + +/** + * @brief Displays an uni line (between two points). + * @param x1: specifies the point 1 x position. + * @param y1: specifies the point 1 y position. + * @param x2: specifies the point 2 x position. + * @param y2: specifies the point 2 y position. + * @retval None + */ +void LCD_DrawUniLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2) +{ + int16_t deltax = 0, deltay = 0, x = 0, y = 0, xinc1 = 0, xinc2 = 0, + yinc1 = 0, yinc2 = 0, den = 0, num = 0, numadd = 0, numpixels = 0, + curpixel = 0; + + deltax = ABS(x2 - x1); /* The difference between the x's */ + deltay = ABS(y2 - y1); /* The difference between the y's */ + x = x1; /* Start x off at the first pixel */ + y = y1; /* Start y off at the first pixel */ + + if (x2 >= x1) /* The x-values are increasing */ + { + xinc1 = 1; + xinc2 = 1; + } + else /* The x-values are decreasing */ + { + xinc1 = -1; + xinc2 = -1; + } + + if (y2 >= y1) /* The y-values are increasing */ + { + yinc1 = 1; + yinc2 = 1; + } + else /* The y-values are decreasing */ + { + yinc1 = -1; + yinc2 = -1; + } + + if (deltax >= deltay) /* There is at least one x-value for every y-value */ + { + xinc1 = 0; /* Don't change the x when numerator >= denominator */ + yinc2 = 0; /* Don't change the y for every iteration */ + den = deltax; + num = deltax / 2; + numadd = deltay; + numpixels = deltax; /* There are more x-values than y-values */ + } + else /* There is at least one y-value for every x-value */ + { + xinc2 = 0; /* Don't change the x for every iteration */ + yinc1 = 0; /* Don't change the y when numerator >= denominator */ + den = deltay; + num = deltay / 2; + numadd = deltax; + numpixels = deltay; /* There are more y-values than x-values */ + } + + for (curpixel = 0; curpixel <= numpixels; curpixel++) + { + PutPixel(x, y); /* Draw the current pixel */ + num += numadd; /* Increase the numerator by the top of the fraction */ + if (num >= den) /* Check if numerator >= denominator */ + { + num -= den; /* Calculate the new numerator value */ + x += xinc1; /* Change the x as appropriate */ + y += yinc1; /* Change the y as appropriate */ + } + x += xinc2; /* Change the x as appropriate */ + y += yinc2; /* Change the y as appropriate */ + } +} + +/** + * @brief Displays an polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_PolyLine(pPoint Points, uint16_t PointCount) +{ + int16_t X = 0, Y = 0; + + if(PointCount < 2) + { + return; + } + + while(--PointCount) + { + X = Points->X; + Y = Points->Y; + Points++; + LCD_DrawUniLine(X, Y, Points->X, Points->Y); + } +} + +/** + * @brief Displays an relative polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @param Closed: specifies if the draw is closed or not. + * 1: closed, 0 : not closed. + * @retval None + */ +static void LCD_PolyLineRelativeClosed(pPoint Points, uint16_t PointCount, uint16_t Closed) +{ + int16_t X = 0, Y = 0; + pPoint First = Points; + + if(PointCount < 2) + { + return; + } + X = Points->X; + Y = Points->Y; + while(--PointCount) + { + Points++; + LCD_DrawUniLine(X, Y, X + Points->X, Y + Points->Y); + X = X + Points->X; + Y = Y + Points->Y; + } + if(Closed) + { + LCD_DrawUniLine(First->X, First->Y, X, Y); + } +} + +/** + * @brief Displays a closed polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_ClosedPolyLine(pPoint Points, uint16_t PointCount) +{ + LCD_PolyLine(Points, PointCount); + LCD_DrawUniLine(Points->X, Points->Y, (Points+PointCount-1)->X, (Points+PointCount-1)->Y); +} + +/** + * @brief Displays a relative polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_PolyLineRelative(pPoint Points, uint16_t PointCount) +{ + LCD_PolyLineRelativeClosed(Points, PointCount, 0); +} + +/** + * @brief Displays a closed relative polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_ClosedPolyLineRelative(pPoint Points, uint16_t PointCount) +{ + LCD_PolyLineRelativeClosed(Points, PointCount, 1); +} + +/** + * @brief Displays a full polyline (between many points). + * @param Points: pointer to the points array. + * @param PointCount: Number of points. + * @retval None + */ +void LCD_FillPolyLine(pPoint Points, uint16_t PointCount) +{ + /* public-domain code by Darel Rex Finley, 2007 */ + uint16_t nodes = 0, nodeX[MAX_POLY_CORNERS], pixelX = 0, pixelY = 0, i = 0, + j = 0, swap = 0; + uint16_t IMAGE_LEFT = 0, IMAGE_RIGHT = 0, IMAGE_TOP = 0, IMAGE_BOTTOM = 0; + + IMAGE_LEFT = IMAGE_RIGHT = Points->X; + IMAGE_TOP= IMAGE_BOTTOM = Points->Y; + + for(i = 1; i < PointCount; i++) + { + pixelX = POLY_X(i); + if(pixelX < IMAGE_LEFT) + { + IMAGE_LEFT = pixelX; + } + if(pixelX > IMAGE_RIGHT) + { + IMAGE_RIGHT = pixelX; + } + + pixelY = POLY_Y(i); + if(pixelY < IMAGE_TOP) + { + IMAGE_TOP = pixelY; + } + if(pixelY > IMAGE_BOTTOM) + { + IMAGE_BOTTOM = pixelY; + } + } + + LCD_SetTextColor(BackColor); + + /* Loop through the rows of the image. */ + for (pixelY = IMAGE_TOP; pixelY < IMAGE_BOTTOM; pixelY++) + { + /* Build a list of nodes. */ + nodes = 0; j = PointCount-1; + + for (i = 0; i < PointCount; i++) + { + if (((POLY_Y(i)<(double) pixelY) && (POLY_Y(j)>=(double) pixelY)) || \ + ((POLY_Y(j)<(double) pixelY) && (POLY_Y(i)>=(double) pixelY))) + { + nodeX[nodes++]=(int) (POLY_X(i)+((pixelY-POLY_Y(i))*(POLY_X(j)-POLY_X(i)))/(POLY_Y(j)-POLY_Y(i))); + } + j = i; + } + + /* Sort the nodes, via a simple "Bubble" sort. */ + i = 0; + while (i < nodes-1) + { + if (nodeX[i]>nodeX[i+1]) + { + swap = nodeX[i]; + nodeX[i] = nodeX[i+1]; + nodeX[i+1] = swap; + if(i) + { + i--; + } + } + else + { + i++; + } + } + + /* Fill the pixels between node pairs. */ + for (i = 0; i < nodes; i+=2) + { + if(nodeX[i] >= IMAGE_RIGHT) + { + break; + } + if(nodeX[i+1] > IMAGE_LEFT) + { + if (nodeX[i] < IMAGE_LEFT) + { + nodeX[i]=IMAGE_LEFT; + } + if(nodeX[i+1] > IMAGE_RIGHT) + { + nodeX[i+1] = IMAGE_RIGHT; + } + LCD_SetTextColor(BackColor); + LCD_DrawLine(pixelY, nodeX[i+1], nodeX[i+1] - nodeX[i], LCD_DIR_HORIZONTAL); + LCD_SetTextColor(TextColor); + PutPixel(pixelY, nodeX[i+1]); + PutPixel(pixelY, nodeX[i]); + /* for (j=nodeX[i]; j<nodeX[i+1]; j++) PutPixel(j,pixelY); */ + } + } + } + + /* draw the edges */ + LCD_SetTextColor(TextColor); +} + +/** + * @brief Writes to the selected LCD register. + * @param LCD_Reg: address of the selected register. + * @param LCD_RegValue: value to write to the selected register. + * @retval None + */ +void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue) +{ + /* Write 16-bit Index, then Write Reg */ + TFT_LCD->LCD_REG_W = LCD_Reg; + /* Write 16-bit Reg */ + TFT_LCD->LCD_RAM_W = LCD_RegValue; +} + +/** + * @brief Reads the selected LCD Register. + * @param LCD_Reg: address of the selected register. + * @retval LCD Register Value. + */ +uint16_t LCD_ReadReg(uint8_t LCD_Reg) +{ + /* Write 16-bit Index (then Read Reg) */ + TFT_LCD->LCD_REG_W = LCD_Reg; + /* Read 16-bit Reg */ + return (TFT_LCD->LCD_RAM_R); +} + +/** + * @brief Prepare to write to the LCD RAM. + * @param None + * @retval None + */ +void LCD_WriteRAM_Prepare(void) +{ + TFT_LCD->LCD_REG_W = LCD_REG_34; +} + +/** + * @brief Writes to the LCD RAM. + * @param RGB_Code: the pixel color in RGB mode (5-6-5). + * @retval None + */ +void LCD_WriteRAM(uint16_t RGB_Code) +{ + /* Write 16-bit GRAM Reg */ + TFT_LCD->LCD_RAM_W = RGB_Code; +} + +/** + * @brief Reads the LCD RAM. + * @param None + * @retval LCD RAM Value. + */ +uint16_t LCD_ReadRAM(void) +{ + /* Write 16-bit Index (then Read Reg) */ + TFT_LCD->LCD_REG_W = LCD_REG_34; /* Select GRAM Reg */ + /* Read 16-bit Reg */ + return TFT_LCD->LCD_RAM_R; +} + +/** + * @brief Power on the LCD. + * @param None + * @retval None + */ +void LCD_PowerOn(void) +{ +/* Power On sequence ---------------------------------------------------------*/ + LCD_WriteReg(LCD_REG_16, 0x0000); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0000); /* DC1[2:0], DC0[2:0], VC[2:0] */ + LCD_WriteReg(LCD_REG_18, 0x0000); /* VREG1OUT voltage */ + LCD_WriteReg(LCD_REG_19, 0x0000); /* VDV[4:0] for VCOM amplitude*/ + _delay_(20); /* Dis-charge capacitor power voltage (200ms) */ + LCD_WriteReg(LCD_REG_16, 0x17B0); /* SAP, BT[3:0], AP, DSTB, SLP, STB */ + LCD_WriteReg(LCD_REG_17, 0x0137); /* DC1[2:0], DC0[2:0], VC[2:0] */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_18, 0x0139); /* VREG1OUT voltage */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_19, 0x1d00); /* VDV[4:0] for VCOM amplitude */ + LCD_WriteReg(LCD_REG_41, 0x0013); /* VCM[4:0] for VCOMH */ + _delay_(5); /* Delay 50 ms */ + LCD_WriteReg(LCD_REG_7, 0x0173); /* 262K color and display ON */ +} + +/** + * @brief Enables the Display. + * @param None + * @retval None + */ +void LCD_DisplayOn(void) +{ + if(LCD_ID == LCD_HX8347D) + { + LCD_WriteReg(LCD_REG_40, 0x38); + _delay_(6); + LCD_WriteReg(LCD_REG_40, 0x3C); + } + else + { + /* Display On */ + LCD_WriteReg(LCD_REG_7, 0x0173); /* 262K color and display ON */ + } +} + +/** + * @brief Disables the Display. + * @param None + * @retval None + */ +void LCD_DisplayOff(void) +{ + if(LCD_ID == LCD_HX8347D) + { + LCD_WriteReg(LCD_REG_40, 0x38); + _delay_(6); + LCD_WriteReg(LCD_REG_40, 0x04); + } + else + { + /* Display Off */ + LCD_WriteReg(LCD_REG_7, 0x0); + } +} + +/** + * @brief Configures LCD Control lines (FSMC Pins) in alternate function mode. + * @param None + * @retval None + */ +void LCD_CtrlLinesConfig(void) +{ + GPIO_InitTypeDef GPIO_InitStructure; + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOD | RCC_AHBPeriph_GPIOE | RCC_AHBPeriph_GPIOF | + RCC_AHBPeriph_GPIOG, ENABLE); + +/*-- GPIO Configuration ------------------------------------------------------*/ + /* Set PD.00(D2), PD.01(D3), PD.04(NOE), PD.05(NWE), PD.08(D13), PD.09(D14), + PD.10(D15), PD.14(D0), PD.15(D1) as alternate function push pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_4 | GPIO_Pin_5 | + GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_40MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(GPIOD, &GPIO_InitStructure); + + GPIO_PinAFConfig(GPIOD, GPIO_PinSource0, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource1, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource4, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource5, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource8, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource9, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource10, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource14, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOD, GPIO_PinSource15, GPIO_AF_FSMC); + + /* Set PE.07(D4), PE.08(D5), PE.09(D6), PE.10(D7), PE.11(D8), PE.12(D9), PE.13(D10), + PE.14(D11), PE.15(D12) as alternate function push pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | + GPIO_Pin_11 | GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | + GPIO_Pin_15; + GPIO_Init(GPIOE, &GPIO_InitStructure); + + GPIO_PinAFConfig(GPIOE, GPIO_PinSource7 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource8 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource9 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource10 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource11 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource12 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource13 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource14 , GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOE, GPIO_PinSource15 , GPIO_AF_FSMC); + + /* Set PF.00(A0 (RS)) and PF.01 (A1 (Level Shifter Direction) as alternate + function push pull */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1; + GPIO_Init(GPIOF, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource0, GPIO_AF_FSMC); + GPIO_PinAFConfig(GPIOF, GPIO_PinSource1, GPIO_AF_FSMC); + + /* Set PG.12(NE4 (LCD/CS)) as alternate function push pull - NE4(LCD /CS) */ + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12; + GPIO_Init(GPIOG, &GPIO_InitStructure); + GPIO_PinAFConfig(GPIOG, GPIO_PinSource12, GPIO_AF_FSMC); +} + +/** + * @brief Configures the Parallel interface (FSMC) for LCD(Parallel mode) + * @param None + * @retval None + */ +void LCD_FSMCConfig(void) +{ + FSMC_NORSRAMInitTypeDef FSMC_NORSRAMInitStructure; + FSMC_NORSRAMTimingInitTypeDef p; + + /* Enable FSMC clock */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); + +/*-- FSMC Configuration ------------------------------------------------------*/ +/*----------------------- SRAM Bank 4 ----------------------------------------*/ + /* FSMC_Bank1_NORSRAM4 configuration */ + p.FSMC_AddressSetupTime = 1; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 2; + p.FSMC_BusTurnAroundDuration = 0; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + /* Color LCD configuration ------------------------------------ + LCD configured as follow: + - Data/Address MUX = Disable + - Memory Type = SRAM + - Data Width = 16bit + - Write Operation = Enable + - Extended Mode = Enable + - Asynchronous Wait = Disable */ + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM4; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + /* BANK 4 (of NOR/SRAM Bank) is enabled */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM4, ENABLE); +} + +/** + * @brief Displays a pixel. + * @param x: pixel x. + * @param y: pixel y. + * @retval None + */ +static void PutPixel(int16_t x, int16_t y) +{ + if(x < 0 || x > 239 || y < 0 || y > 319) + { + return; + } + LCD_DrawLine(x, y, 1, LCD_DIR_HORIZONTAL); +} + +#ifndef USE_Delay +/** + * @brief Inserts a delay time. + * @param nCount: specifies the delay time length. + * @retval None + */ +static void delay(__IO uint32_t nCount) +{ + __IO uint32_t index = 0; + for(index = (10000 * nCount); index != 0; index--) + { + } +} +#endif /* USE_Delay*/ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_lcd.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_lcd.h new file mode 100644 index 0000000..46016c8 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_lcd.h @@ -0,0 +1,385 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_lcd.h + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file contains all the functions prototypes for the stm32l152d_eval_lcd + * firmware driver. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L152D_EVAL_LCD_H +#define __STM32L152D_EVAL_LCD_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval.h" +#include "../Common/fonts.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_LCD + * @{ + */ + +/** @defgroup STM32L152D_EVAL_LCD_Exported_Types + * @{ + */ +typedef struct +{ + int16_t X; + int16_t Y; +} Point, * pPoint; +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LCD_Exported_Constants + * @{ + */ + +/** + * @brief Uncomment the line below if you want to use user defined Delay function + * (for precise timing), otherwise default _delay_ function defined within + * this driver is used (less precise timing). + */ +/* #define USE_Delay */ + +#ifdef USE_Delay +#include "main.h" + #define _delay_ Delay /* !< User can provide more timing precise _delay_ function + (with 10ms time base), using SysTick for example */ +#else + #define _delay_ delay /* !< Default _delay_ function with less precise timing */ +#endif + +/** + * @brief LCD Registers + */ +#define LCD_REG_0 0x00 +#define LCD_REG_1 0x01 +#define LCD_REG_2 0x02 +#define LCD_REG_3 0x03 +#define LCD_REG_4 0x04 +#define LCD_REG_5 0x05 +#define LCD_REG_6 0x06 +#define LCD_REG_7 0x07 +#define LCD_REG_8 0x08 +#define LCD_REG_9 0x09 +#define LCD_REG_10 0x0A +#define LCD_REG_12 0x0C +#define LCD_REG_13 0x0D +#define LCD_REG_14 0x0E +#define LCD_REG_15 0x0F +#define LCD_REG_16 0x10 +#define LCD_REG_17 0x11 +#define LCD_REG_18 0x12 +#define LCD_REG_19 0x13 +#define LCD_REG_20 0x14 +#define LCD_REG_21 0x15 +#define LCD_REG_22 0x16 +#define LCD_REG_23 0x17 +#define LCD_REG_24 0x18 +#define LCD_REG_25 0x19 +#define LCD_REG_26 0x1A +#define LCD_REG_27 0x1B +#define LCD_REG_28 0x1C +#define LCD_REG_29 0x1D +#define LCD_REG_30 0x1E +#define LCD_REG_31 0x1F +#define LCD_REG_32 0x20 +#define LCD_REG_33 0x21 +#define LCD_REG_34 0x22 +#define LCD_REG_35 0x23 +#define LCD_REG_36 0x24 +#define LCD_REG_37 0x25 +#define LCD_REG_39 0x27 +#define LCD_REG_40 0x28 +#define LCD_REG_41 0x29 +#define LCD_REG_43 0x2B +#define LCD_REG_45 0x2D +#define LCD_REG_48 0x30 +#define LCD_REG_49 0x31 +#define LCD_REG_50 0x32 +#define LCD_REG_51 0x33 +#define LCD_REG_52 0x34 +#define LCD_REG_53 0x35 +#define LCD_REG_54 0x36 +#define LCD_REG_55 0x37 +#define LCD_REG_56 0x38 +#define LCD_REG_57 0x39 +#define LCD_REG_58 0x3A +#define LCD_REG_59 0x3B +#define LCD_REG_60 0x3C +#define LCD_REG_61 0x3D +#define LCD_REG_62 0x3E +#define LCD_REG_63 0x3F +#define LCD_REG_64 0x40 +#define LCD_REG_65 0x41 +#define LCD_REG_66 0x42 +#define LCD_REG_67 0x43 +#define LCD_REG_68 0x44 +#define LCD_REG_69 0x45 +#define LCD_REG_70 0x46 +#define LCD_REG_71 0x47 +#define LCD_REG_72 0x48 +#define LCD_REG_73 0x49 +#define LCD_REG_74 0x4A +#define LCD_REG_75 0x4B +#define LCD_REG_76 0x4C +#define LCD_REG_77 0x4D +#define LCD_REG_78 0x4E +#define LCD_REG_79 0x4F +#define LCD_REG_80 0x50 +#define LCD_REG_81 0x51 +#define LCD_REG_82 0x52 +#define LCD_REG_83 0x53 +#define LCD_REG_84 0x54 +#define LCD_REG_85 0x55 +#define LCD_REG_86 0x56 +#define LCD_REG_87 0x57 +#define LCD_REG_88 0x58 +#define LCD_REG_89 0x59 +#define LCD_REG_90 0x5A +#define LCD_REG_91 0x5B +#define LCD_REG_92 0x5C +#define LCD_REG_93 0x5D +#define LCD_REG_96 0x60 +#define LCD_REG_97 0x61 +#define LCD_REG_106 0x6A +#define LCD_REG_118 0x76 +#define LCD_REG_128 0x80 +#define LCD_REG_129 0x81 +#define LCD_REG_130 0x82 +#define LCD_REG_131 0x83 +#define LCD_REG_132 0x84 +#define LCD_REG_133 0x85 +#define LCD_REG_134 0x86 +#define LCD_REG_135 0x87 +#define LCD_REG_136 0x88 +#define LCD_REG_137 0x89 +#define LCD_REG_139 0x8B +#define LCD_REG_140 0x8C +#define LCD_REG_141 0x8D +#define LCD_REG_143 0x8F +#define LCD_REG_144 0x90 +#define LCD_REG_145 0x91 +#define LCD_REG_146 0x92 +#define LCD_REG_147 0x93 +#define LCD_REG_148 0x94 +#define LCD_REG_149 0x95 +#define LCD_REG_150 0x96 +#define LCD_REG_151 0x97 +#define LCD_REG_152 0x98 +#define LCD_REG_153 0x99 +#define LCD_REG_154 0x9A +#define LCD_REG_157 0x9D +#define LCD_REG_192 0xC0 +#define LCD_REG_193 0xC1 +#define LCD_REG_229 0xE5 +#define LCD_REG_232 0xE8 +#define LCD_REG_233 0xE9 +#define LCD_REG_234 0xEA +#define LCD_REG_235 0xEB +#define LCD_REG_236 0xEC +#define LCD_REG_237 0xED +#define LCD_REG_241 0xF1 +#define LCD_REG_242 0xF2 + +/** + * @brief LCD color + */ +#define LCD_COLOR_WHITE 0xFFFF +#define LCD_COLOR_BLACK 0x0000 +#define LCD_COLOR_GREY 0xF7DE +#define LCD_COLOR_BLUE 0x001F +#define LCD_COLOR_BLUE2 0x051F +#define LCD_COLOR_RED 0xF800 +#define LCD_COLOR_MAGENTA 0xF81F +#define LCD_COLOR_GREEN 0x07E0 +#define LCD_COLOR_CYAN 0x7FFF +#define LCD_COLOR_YELLOW 0xFFE0 + +/** + * @brief LCD Lines depending on the chosen fonts. + */ +#define LCD_LINE_0 LINE(0) +#define LCD_LINE_1 LINE(1) +#define LCD_LINE_2 LINE(2) +#define LCD_LINE_3 LINE(3) +#define LCD_LINE_4 LINE(4) +#define LCD_LINE_5 LINE(5) +#define LCD_LINE_6 LINE(6) +#define LCD_LINE_7 LINE(7) +#define LCD_LINE_8 LINE(8) +#define LCD_LINE_9 LINE(9) +#define LCD_LINE_10 LINE(10) +#define LCD_LINE_11 LINE(11) +#define LCD_LINE_12 LINE(12) +#define LCD_LINE_13 LINE(13) +#define LCD_LINE_14 LINE(14) +#define LCD_LINE_15 LINE(15) +#define LCD_LINE_16 LINE(16) +#define LCD_LINE_17 LINE(17) +#define LCD_LINE_18 LINE(18) +#define LCD_LINE_19 LINE(19) +#define LCD_LINE_20 LINE(20) +#define LCD_LINE_21 LINE(21) +#define LCD_LINE_22 LINE(22) +#define LCD_LINE_23 LINE(23) +#define LCD_LINE_24 LINE(24) +#define LCD_LINE_25 LINE(25) +#define LCD_LINE_26 LINE(26) +#define LCD_LINE_27 LINE(27) +#define LCD_LINE_28 LINE(28) +#define LCD_LINE_29 LINE(29) + +/** + * @brief LCD default font + */ +#define LCD_DEFAULT_FONT Font16x24 + +/** + * @brief LCD Direction + */ +#define LCD_DIR_HORIZONTAL 0x0000 +#define LCD_DIR_VERTICAL 0x0001 + +/** + * @brief LCD Size (Width and Height) + */ +#define LCD_PIXEL_WIDTH 0x0140 +#define LCD_PIXEL_HEIGHT 0x00F0 + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LCD_Exported_Macros + * @{ + */ +#define ASSEMBLE_RGB(R, G, B) ((((R)& 0xF8) << 8) | (((G) & 0xFC) << 3) | (((B) & 0xF8) >> 3)) +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_LCD_Exported_Functions + * @{ + */ +/** @defgroup + * @{ + */ +void STM32L152D_LCD_DeInit(void); +void STM32L152D_LCD_Init(void); +void LCD_SetColors(__IO uint16_t _TextColor, __IO uint16_t _BackColor); +void LCD_GetColors(__IO uint16_t *_TextColor, __IO uint16_t *_BackColor); +void LCD_SetTextColor(__IO uint16_t Color); +void LCD_SetBackColor(__IO uint16_t Color); +void LCD_ClearLine(uint16_t Line); +void LCD_Clear(uint16_t Color); +void LCD_SetCursor(uint16_t Xpos, uint16_t Ypos); +void LCD_DrawChar(uint16_t Xpos, uint16_t Ypos, const uint16_t *c); +void LCD_DisplayChar(uint16_t Line, uint16_t Column, uint8_t Ascii); +void LCD_SetFont(sFONT *fonts); +sFONT *LCD_GetFont(void); +void LCD_DisplayStringLine(uint16_t Line, uint8_t *ptr); +void LCD_SetDisplayWindow(uint16_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width); +void LCD_WindowModeDisable(void); +void LCD_DrawLine(uint16_t Xpos, uint16_t Ypos, uint16_t Length, uint8_t Direction); +void LCD_DrawRect(uint16_t Xpos, uint16_t Ypos, uint8_t Height, uint16_t Width); +void LCD_DrawCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius); +void LCD_DrawMonoPict(const uint32_t *Pict); +void LCD_WriteBMP(uint32_t BmpAddress); +void LCD_DrawUniLine(uint16_t x1, uint16_t y1, uint16_t x2, uint16_t y2); +void LCD_DrawFullRect(uint16_t Xpos, uint16_t Ypos, uint16_t Width, uint16_t Height); +void LCD_DrawFullCircle(uint16_t Xpos, uint16_t Ypos, uint16_t Radius); +void LCD_PolyLine(pPoint Points, uint16_t PointCount); +void LCD_PolyLineRelative(pPoint Points, uint16_t PointCount); +void LCD_ClosedPolyLine(pPoint Points, uint16_t PointCount); +void LCD_ClosedPolyLineRelative(pPoint Points, uint16_t PointCount); +void LCD_FillPolyLine(pPoint Points, uint16_t PointCount); +/** + * @} + */ + +/** @defgroup + * @{ + */ +void LCD_WriteReg(uint8_t LCD_Reg, uint16_t LCD_RegValue); +uint16_t LCD_ReadReg(uint8_t LCD_Reg); +void LCD_WriteRAM_Prepare(void); +void LCD_WriteRAM(uint16_t RGB_Code); +uint16_t LCD_ReadRAM(void); +void LCD_PowerOn(void); +void LCD_DisplayOn(void); +void LCD_DisplayOff(void); +/** + * @} + */ + +/** @defgroup + * @{ + */ +void LCD_CtrlLinesConfig(void); +void LCD_FSMCConfig(void); +/** + * @} + */ + +/** + * @} + */ +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L152D_EVAL_LCD_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_sdio_sd.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_sdio_sd.c new file mode 100644 index 0000000..f95f418 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_sdio_sd.c @@ -0,0 +1,2818 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_sdio_sd.c + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file provides a set of functions needed to manage the SDIO SD + * Card memory mounted on STM32L152D-EVAL evaluation board. + * + * + * @verbatim + * + * =================================================================== + * How to use this driver + * =================================================================== + * It implements a high level communication layer for read and write + * from/to this memory. The needed STM32 hardware resources (SDIO and + * GPIO) are defined in stm32l152d_eval.h file, and the initialization is + * performed in SD_LowLevel_Init() function declared in stm32l152d_eval.c + * file. + * You can easily tailor this driver to any other development board, + * by just adapting the defines for hardware resources and + * SD_LowLevel_Init() function. + * + * A - SD Card Initialization and configuration + * ============================================ + * - To initialize the SD Card, use the SD_Init() function. It + * Initializes the SD Card and put it into StandBy State (Ready + * for data transfer). This function provide the following operations: + * + * 1 - Apply the SD Card initialization process at 400KHz and check + * the SD Card type (Standard Capacity or High Capacity). You + * can change or adapt this frequency by adjusting the + * "SDIO_INIT_CLK_DIV" define inside the stm32l152d_eval.h file. + * The SD Card frequency (SDIO_CK) is computed as follows: + * + * +---------------------------------------------+ + * | SDIO_CK = SDIOCLK / (SDIO_INIT_CLK_DIV + 2) | + * +---------------------------------------------+ + * + * In initialization mode and according to the SD Card standard, + * make sure that the SDIO_CK frequency don't exceed 400KHz. + * + * 2 - Get the SD CID and CSD data. All these information are + * managed by the SDCardInfo structure. This structure provide + * also ready computed SD Card capacity and Block size. + * + * 3 - Configure the SD Card Data transfer frequency. By Default, + * the card transfer frequency is set to 24MHz. You can change + * or adapt this frequency by adjusting the "SDIO_TRANSFER_CLK_DIV" + * define inside the stm32l152d_eval.h file. + * The SD Card frequency (SDIO_CK) is computed as follows: + * + * +---------------------------------------------+ + * | SDIO_CK = SDIOCLK / (SDIO_INIT_CLK_DIV + 2) | + * +---------------------------------------------+ + * + * In transfer mode and according to the SD Card standard, + * make sure that the SDIO_CK frequency don't exceed 25MHz + * and 50MHz in High-speed mode switch. + * To be able to use a frequency higher than 24MHz, you should + * use the SDIO peripheral in bypass mode. Refer to the + * corresponding reference manual for more details. + * + * 4 - Select the corresponding SD Card according to the address + * read with the step 2. + * + * 5 - Configure the SD Card in wide bus mode: 4-bits data. + * + * B - SD Card Read operation + * ========================== + * - You can read SD card by using two function: SD_ReadBlock() and + * SD_ReadMultiBlocks() functions. These functions support only + * 512-byte block length. + * - The SD_ReadBlock() function read only one block (512-byte). This + * function can transfer the data using DMA controller or using + * polling mode. To select between DMA or polling mode refer to + * "SD_DMA_MODE" or "SD_POLLING_MODE" inside the stm32l152d_eval_sdio_sd.h + * file and uncomment the corresponding line. By default the SD DMA + * mode is selected + * - The SD_ReadMultiBlocks() function read only mutli blocks (multiple + * of 512-byte). + * - Any read operation should be followed by two functions to check + * if the DMA Controller and SD Card status. + * - SD_ReadWaitOperation(): this function insure that the DMA + * controller has finished all data transfer. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. + * + * - The DMA transfer is finished by the SDIO Data End interrupt. + * User has to call the SD_ProcessIRQ() function inside the SDIO_IRQHandler() + * and SD_ProcessDMAIRQ() function inside the DMA2_Channel4_IRQHandler(). + * Don't forget to enable the SDIO_IRQn and DMA2_Channel4_IRQn + * interrupts using the NVIC controller. + * + * C - SD Card Write operation + * =========================== + * - You can write SD card by using two function: SD_WriteBlock() and + * SD_WriteMultiBlocks() functions. These functions support only + * 512-byte block length. + * - The SD_WriteBlock() function write only one block (512-byte). This + * function can transfer the data using DMA controller or using + * polling mode. To select between DMA or polling mode refer to + * "SD_DMA_MODE" or "SD_POLLING_MODE" inside the stm32l152d_eval_sdio_sd.h + * file and uncomment the corresponding line. By default the SD DMA + * mode is selected + * - The SD_WriteMultiBlocks() function write only mutli blocks (multiple + * of 512-byte). + * - Any write operation should be followed by two functions to check + * if the DMA Controller and SD Card status. + * - SD_ReadWaitOperation(): this function insure that the DMA + * controller has finished all data transfer. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. + * + * - The DMA transfer is finished by the SDIO Data End interrupt. + * User has to call the SD_ProcessIRQ() function inside the SDIO_IRQHandler() + * and SD_ProcessDMAIRQ() function inside the DMA2_Channel4_IRQHandler(). + * Don't forget to enable the SDIO_IRQn and DMA2_Channel4_IRQn + * interrupts using the NVIC controller. + * + * + * D - SD card status + * ================== + * - At any time, you can check the SD Card status and get the SD card + * state by using the SD_GetStatus() function. This function checks + * first if the SD card is still connected and then get the internal + * SD Card transfer state. + * - You can also get the SD card SD Status register by using the + * SD_SendSDStatus() function. + * + * E - Programming Model (Selecting DMA for SDIO data Transfer) + * ============================================================ + * Status = SD_Init(); // Initialization Step as described in section A + * + * // SDIO Interrupt ENABLE + * NVIC_InitStructure.NVIC_IRQChannel = SDIO_IRQn; + * NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + * NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + * NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + * NVIC_Init(&NVIC_InitStructure); + * // DMA2 Channel4 Interrupt ENABLE + * NVIC_InitStructure.NVIC_IRQChannel = SD_SDIO_DMA_IRQn; + * NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1; + * NVIC_Init(&NVIC_InitStructure); + * + * // Write operation as described in Section C + * Status = SD_WriteBlock(buffer, address, 512); + * Status = SD_WaitWriteOperation(); + * while(SD_GetStatus() != SD_TRANSFER_OK); + * + * Status = SD_WriteMultiBlocks(buffer, address, 512, NUMBEROFBLOCKS); + * Status = SD_WaitWriteOperation(); + * while(SD_GetStatus() != SD_TRANSFER_OK); + * + * // Read operation as described in Section B + * Status = SD_ReadBlock(buffer, address, 512); + * Status = SD_WaitReadOperation(); + * while(SD_GetStatus() != SD_TRANSFER_OK); + * + * Status = SD_ReadMultiBlocks(buffer, address, 512, NUMBEROFBLOCKS); + * Status = SD_WaitReadOperation(); + * while(SD_GetStatus() != SD_TRANSFER_OK); + * + * - Add the SDIO and DMA2 Channel4 IRQ Handlers: + * void SDIO_IRQHandler(void) + * { + * SD_ProcessIRQ(); + * } + * void SD_SDIO_DMA_IRQHANDLER(void) + * { + * SD_ProcessDMAIRQ(); + * } + * + * F - Programming Model (Selecting Polling for SDIO data Transfer) + * ================================================================ + * //Only SD Card Single Block operation are managed. + * Status = SD_Init(); // Initialization Step as described in section + * + * // Write operation as described in Section C + * Status = SD_WriteBlock(buffer, address, 512); + * + * // Read operation as described in Section B + * Status = SD_ReadBlock(buffer, address, 512); + * + * STM32 SDIO Pin assignment + * ========================= + * +-----------------------------------------------------------+ + * | Pin assignment | + * +-----------------------------+---------------+-------------+ + * | STM32 SDIO Pins | SD | Pin | + * +-----------------------------+---------------+-------------+ + * | SDIO D2 | D2 | 1 | + * | SDIO D3 | D3 | 2 | + * | SDIO CMD | CMD | 3 | + * | | VCC | 4 (3.3 V)| + * | SDIO CLK | CLK | 5 | + * | | GND | 6 (0 V) | + * | SDIO D0 | D0 | 7 | + * | SDIO D1 | D1 | 8 | + * +-----------------------------+---------------+-------------+ + * + * @endverbatim + * + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval_sdio_sd.h" + + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_SDIO_SD + * @brief This file provides all the SD Card driver firmware functions. + * @{ + */ + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Private_Types + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Private_Defines + * @{ + */ + +/** + * @brief SDIO Static flags, TimeOut, FIFO Address + */ +#define NULL 0 +#define SDIO_STATIC_FLAGS ((uint32_t)0x000005FF) +#define SDIO_CMD0TIMEOUT ((uint32_t)0x00010000) + +/** + * @brief Mask for errors Card Status R1 (OCR Register) + */ +#define SD_OCR_ADDR_OUT_OF_RANGE ((uint32_t)0x80000000) +#define SD_OCR_ADDR_MISALIGNED ((uint32_t)0x40000000) +#define SD_OCR_BLOCK_LEN_ERR ((uint32_t)0x20000000) +#define SD_OCR_ERASE_SEQ_ERR ((uint32_t)0x10000000) +#define SD_OCR_BAD_ERASE_PARAM ((uint32_t)0x08000000) +#define SD_OCR_WRITE_PROT_VIOLATION ((uint32_t)0x04000000) +#define SD_OCR_LOCK_UNLOCK_FAILED ((uint32_t)0x01000000) +#define SD_OCR_COM_CRC_FAILED ((uint32_t)0x00800000) +#define SD_OCR_ILLEGAL_CMD ((uint32_t)0x00400000) +#define SD_OCR_CARD_ECC_FAILED ((uint32_t)0x00200000) +#define SD_OCR_CC_ERROR ((uint32_t)0x00100000) +#define SD_OCR_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00080000) +#define SD_OCR_STREAM_READ_UNDERRUN ((uint32_t)0x00040000) +#define SD_OCR_STREAM_WRITE_OVERRUN ((uint32_t)0x00020000) +#define SD_OCR_CID_CSD_OVERWRIETE ((uint32_t)0x00010000) +#define SD_OCR_WP_ERASE_SKIP ((uint32_t)0x00008000) +#define SD_OCR_CARD_ECC_DISABLED ((uint32_t)0x00004000) +#define SD_OCR_ERASE_RESET ((uint32_t)0x00002000) +#define SD_OCR_AKE_SEQ_ERROR ((uint32_t)0x00000008) +#define SD_OCR_ERRORBITS ((uint32_t)0xFDFFE008) + +/** + * @brief Masks for R6 Response + */ +#define SD_R6_GENERAL_UNKNOWN_ERROR ((uint32_t)0x00002000) +#define SD_R6_ILLEGAL_CMD ((uint32_t)0x00004000) +#define SD_R6_COM_CRC_FAILED ((uint32_t)0x00008000) + +#define SD_VOLTAGE_WINDOW_SD ((uint32_t)0x80100000) +#define SD_HIGH_CAPACITY ((uint32_t)0x40000000) +#define SD_STD_CAPACITY ((uint32_t)0x00000000) +#define SD_CHECK_PATTERN ((uint32_t)0x000001AA) + +#define SD_MAX_VOLT_TRIAL ((uint32_t)0x0000FFFF) +#define SD_ALLZERO ((uint32_t)0x00000000) + +#define SD_WIDE_BUS_SUPPORT ((uint32_t)0x00040000) +#define SD_SINGLE_BUS_SUPPORT ((uint32_t)0x00010000) +#define SD_CARD_LOCKED ((uint32_t)0x02000000) + +#define SD_DATATIMEOUT ((uint32_t)0xFFFFFFFF) +#define SD_0TO7BITS ((uint32_t)0x000000FF) +#define SD_8TO15BITS ((uint32_t)0x0000FF00) +#define SD_16TO23BITS ((uint32_t)0x00FF0000) +#define SD_24TO31BITS ((uint32_t)0xFF000000) +#define SD_MAX_DATA_LENGTH ((uint32_t)0x01FFFFFF) + +#define SD_HALFFIFO ((uint32_t)0x00000008) +#define SD_HALFFIFOBYTES ((uint32_t)0x00000020) + +/** + * @brief Command Class Supported + */ +#define SD_CCCC_LOCK_UNLOCK ((uint32_t)0x00000080) +#define SD_CCCC_WRITE_PROT ((uint32_t)0x00000040) +#define SD_CCCC_ERASE ((uint32_t)0x00000020) + +/** + * @brief Following commands are SD Card Specific commands. + * SDIO_APP_CMD should be sent before sending these commands. + */ +#define SDIO_SEND_IF_COND ((uint32_t)0x00000008) + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Private_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Private_Variables + * @{ + */ + +static uint32_t CardType = SDIO_STD_CAPACITY_SD_CARD_V1_1; +static uint32_t CSD_Tab[4], CID_Tab[4], RCA = 0; +static uint8_t SDSTATUS_Tab[16]; +__IO uint32_t StopCondition = 0; +__IO SD_Error TransferError = SD_OK; +__IO uint32_t TransferEnd = 0, DMAEndOfTransfer = 0; +SD_CardInfo SDCardInfo; + +SDIO_InitTypeDef SDIO_InitStructure; +SDIO_CmdInitTypeDef SDIO_CmdInitStructure; +SDIO_DataInitTypeDef SDIO_DataInitStructure; +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Private_Function_Prototypes + * @{ + */ +static SD_Error CmdError(void); +static SD_Error CmdResp1Error(uint8_t cmd); +static SD_Error CmdResp7Error(void); +static SD_Error CmdResp3Error(void); +static SD_Error CmdResp2Error(void); +static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca); +static SD_Error SDEnWideBus(FunctionalState NewState); +static SD_Error IsCardProgramming(uint8_t *pstatus); +static SD_Error FindSCR(uint16_t rca, uint32_t *pscr); +uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes); + +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Private_Functions + * @{ + */ + +/** + * @brief DeInitializes the SDIO interface. + * @param None + * @retval None + */ +void SD_DeInit(void) +{ + SD_LowLevel_DeInit(); +} + +/** + * @brief Initializes the SD Card and put it into StandBy State (Ready for data + * transfer). + * @param None + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_Init(void) +{ + __IO SD_Error errorstatus = SD_OK; + + /* SDIO Peripheral Low Level Init */ + SD_LowLevel_Init(); + + SDIO_DeInit(); + + errorstatus = SD_PowerON(); + + if (errorstatus != SD_OK) + { + /*!< CMD Response TimeOut (wait for CMDSENT flag) */ + return(errorstatus); + } + + errorstatus = SD_InitializeCards(); + + if (errorstatus != SD_OK) + { + /*!< CMD Response TimeOut (wait for CMDSENT flag) */ + return(errorstatus); + } + + /*!< Configure the SDIO peripheral */ + /*!< SDIO_CK = SDIOCLK / (SDIO_TRANSFER_CLK_DIV + 2) */ + /*!< on STM32L1xx devices, SDIOCLK is fixed to 48MHz */ + SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; + SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; + SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; + SDIO_Init(&SDIO_InitStructure); + + /*----------------- Read CSD/CID MSD registers ------------------*/ + errorstatus = SD_GetCardInfo(&SDCardInfo); + + if (errorstatus == SD_OK) + { + /*----------------- Select Card --------------------------------*/ + errorstatus = SD_SelectDeselect((uint32_t) (SDCardInfo.RCA << 16)); + } + + if (errorstatus == SD_OK) + { + errorstatus = SD_EnableWideBusOperation(SDIO_BusWide_4b); + } + + return(errorstatus); +} + +/** + * @brief Gets the cuurent sd card data transfer status. + * @param None + * @retval SDTransferState: Data Transfer state. + * This value can be: + * - SD_TRANSFER_OK: No data transfer is acting + * - SD_TRANSFER_BUSY: Data transfer is acting + */ +SDTransferState SD_GetStatus(void) +{ + SDCardState cardstate = SD_CARD_TRANSFER; + + cardstate = SD_GetState(); + + if (cardstate == SD_CARD_TRANSFER) + { + return(SD_TRANSFER_OK); + } + else if(cardstate == SD_CARD_ERROR) + { + return (SD_TRANSFER_ERROR); + } + else + { + return(SD_TRANSFER_BUSY); + } +} + +/** + * @brief Returns the current card's state. + * @param None + * @retval SDCardState: SD Card Error or SD Card Current State. + */ +SDCardState SD_GetState(void) +{ + uint32_t resp1 = 0; + + if(SD_Detect()== SD_PRESENT) + { + if (SD_SendStatus(&resp1) != SD_OK) + { + return SD_CARD_ERROR; + } + else + { + return (SDCardState)((resp1 >> 9) & 0x0F); + } + } + else + { + return SD_CARD_ERROR; + } +} + +/** + * @brief Detect if SD card is correctly plugged in the memory slot. + * @param None + * @retval Return if SD is detected or not + */ +uint8_t SD_Detect(void) +{ + __IO uint8_t status = SD_PRESENT; + + /*!< Check GPIO to detect SD */ + if (GPIO_ReadInputDataBit(SD_DETECT_GPIO_PORT, SD_DETECT_PIN) != Bit_RESET) + { + status = SD_NOT_PRESENT; + } + return status; +} + +/** + * @brief Enquires cards about their operating voltage and configures + * clock controls. + * @param None + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_PowerON(void) +{ + __IO SD_Error errorstatus = SD_OK; + uint32_t response = 0, count = 0, validvoltage = 0; + uint32_t SDType = SD_STD_CAPACITY; + + /*!< Power ON Sequence -----------------------------------------------------*/ + /*!< Configure the SDIO peripheral */ + /*!< SDIO_CK = SDIOCLK / (SDIO_INIT_CLK_DIV + 2) */ + /*!< on STM32L1xx devices, SDIOCLK is fixed to 48MHz */ + /*!< SDIO_CK for initialization should not exceed 400 KHz */ + SDIO_InitStructure.SDIO_ClockDiv = SDIO_INIT_CLK_DIV; + SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; + SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; + SDIO_Init(&SDIO_InitStructure); + + /*!< Set Power State to ON */ + SDIO_SetPowerState(SDIO_PowerState_ON); + + /*!< Enable SDIO Clock */ + SDIO_ClockCmd(ENABLE); + + /*!< CMD0: GO_IDLE_STATE ---------------------------------------------------*/ + /*!< No CMD response required */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_GO_IDLE_STATE; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_No; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdError(); + + if (errorstatus != SD_OK) + { + /*!< CMD Response TimeOut (wait for CMDSENT flag) */ + return(errorstatus); + } + + /*!< CMD8: SEND_IF_COND ----------------------------------------------------*/ + /*!< Send CMD8 to verify SD card interface operating condition */ + /*!< Argument: - [31:12]: Reserved (shall be set to '0') + - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V) + - [7:0]: Check Pattern (recommended 0xAA) */ + /*!< CMD Response: R7 */ + SDIO_CmdInitStructure.SDIO_Argument = SD_CHECK_PATTERN; + SDIO_CmdInitStructure.SDIO_CmdIndex = SDIO_SEND_IF_COND; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp7Error(); + + if (errorstatus == SD_OK) + { + CardType = SDIO_STD_CAPACITY_SD_CARD_V2_0; /*!< SD Card 2.0 */ + SDType = SD_HIGH_CAPACITY; + } + else + { + /*!< CMD55 */ + SDIO_CmdInitStructure.SDIO_Argument = 0x00; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + errorstatus = CmdResp1Error(SD_CMD_APP_CMD); + } + /*!< CMD55 */ + SDIO_CmdInitStructure.SDIO_Argument = 0x00; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + errorstatus = CmdResp1Error(SD_CMD_APP_CMD); + + /*!< If errorstatus is Command TimeOut, it is a MMC card */ + /*!< If errorstatus is SD_OK it is a SD card: SD card 2.0 (voltage range mismatch) + or SD card 1.x */ + if (errorstatus == SD_OK) + { + /*!< SD CARD */ + /*!< Send ACMD41 SD_APP_OP_COND with Argument 0x80100000 */ + while ((!validvoltage) && (count < SD_MAX_VOLT_TRIAL)) + { + + /*!< SEND CMD55 APP_CMD with RCA as 0 */ + SDIO_CmdInitStructure.SDIO_Argument = 0x00; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + SDIO_CmdInitStructure.SDIO_Argument = SD_VOLTAGE_WINDOW_SD | SDType; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_APP_OP_COND; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp3Error(); + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + response = SDIO_GetResponse(SDIO_RESP1); + validvoltage = (((response >> 31) == 1) ? 1 : 0); + count++; + } + if (count >= SD_MAX_VOLT_TRIAL) + { + errorstatus = SD_INVALID_VOLTRANGE; + return(errorstatus); + } + + if (response &= SD_HIGH_CAPACITY) + { + CardType = SDIO_HIGH_CAPACITY_SD_CARD; + } + + }/*!< else MMC Card */ + + return(errorstatus); +} + +/** + * @brief Turns the SDIO output signals off. + * @param None + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_PowerOFF(void) +{ + SD_Error errorstatus = SD_OK; + + /*!< Set Power State to OFF */ + SDIO_SetPowerState(SDIO_PowerState_OFF); + + return(errorstatus); +} + +/** + * @brief Intialises all cards or single card as the case may be Card(s) come + * into standby state. + * @param None + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_InitializeCards(void) +{ + SD_Error errorstatus = SD_OK; + uint16_t rca = 0x01; + + if (SDIO_GetPowerState() == SDIO_PowerState_OFF) + { + errorstatus = SD_REQUEST_NOT_APPLICABLE; + return(errorstatus); + } + + if (SDIO_SECURE_DIGITAL_IO_CARD != CardType) + { + /*!< Send CMD2 ALL_SEND_CID */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_ALL_SEND_CID; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp2Error(); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + CID_Tab[0] = SDIO_GetResponse(SDIO_RESP1); + CID_Tab[1] = SDIO_GetResponse(SDIO_RESP2); + CID_Tab[2] = SDIO_GetResponse(SDIO_RESP3); + CID_Tab[3] = SDIO_GetResponse(SDIO_RESP4); + } + if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_SECURE_DIGITAL_IO_COMBO_CARD == CardType) + || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) + { + /*!< Send CMD3 SET_REL_ADDR with argument 0 */ + /*!< SD Card publishes its RCA. */ + SDIO_CmdInitStructure.SDIO_Argument = 0x00; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_REL_ADDR; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp6Error(SD_CMD_SET_REL_ADDR, &rca); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + } + + if (SDIO_SECURE_DIGITAL_IO_CARD != CardType) + { + RCA = rca; + + /*!< Send CMD9 SEND_CSD with argument as card's RCA */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)(rca << 16); + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SEND_CSD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Long; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp2Error(); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + CSD_Tab[0] = SDIO_GetResponse(SDIO_RESP1); + CSD_Tab[1] = SDIO_GetResponse(SDIO_RESP2); + CSD_Tab[2] = SDIO_GetResponse(SDIO_RESP3); + CSD_Tab[3] = SDIO_GetResponse(SDIO_RESP4); + } + + errorstatus = SD_OK; /*!< All cards get intialized */ + + return(errorstatus); +} + +/** + * @brief Returns information about specific card. + * @param cardinfo: pointer to a SD_CardInfo structure that contains all SD card + * information. + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo) +{ + SD_Error errorstatus = SD_OK; + uint8_t tmp = 0; + + cardinfo->CardType = (uint8_t)CardType; + cardinfo->RCA = (uint16_t)RCA; + + /*!< Byte 0 */ + tmp = (uint8_t)((CSD_Tab[0] & 0xFF000000) >> 24); + cardinfo->SD_csd.CSDStruct = (tmp & 0xC0) >> 6; + cardinfo->SD_csd.SysSpecVersion = (tmp & 0x3C) >> 2; + cardinfo->SD_csd.Reserved1 = tmp & 0x03; + + /*!< Byte 1 */ + tmp = (uint8_t)((CSD_Tab[0] & 0x00FF0000) >> 16); + cardinfo->SD_csd.TAAC = tmp; + + /*!< Byte 2 */ + tmp = (uint8_t)((CSD_Tab[0] & 0x0000FF00) >> 8); + cardinfo->SD_csd.NSAC = tmp; + + /*!< Byte 3 */ + tmp = (uint8_t)(CSD_Tab[0] & 0x000000FF); + cardinfo->SD_csd.MaxBusClkFrec = tmp; + + /*!< Byte 4 */ + tmp = (uint8_t)((CSD_Tab[1] & 0xFF000000) >> 24); + cardinfo->SD_csd.CardComdClasses = tmp << 4; + + /*!< Byte 5 */ + tmp = (uint8_t)((CSD_Tab[1] & 0x00FF0000) >> 16); + cardinfo->SD_csd.CardComdClasses |= (tmp & 0xF0) >> 4; + cardinfo->SD_csd.RdBlockLen = tmp & 0x0F; + + /*!< Byte 6 */ + tmp = (uint8_t)((CSD_Tab[1] & 0x0000FF00) >> 8); + cardinfo->SD_csd.PartBlockRead = (tmp & 0x80) >> 7; + cardinfo->SD_csd.WrBlockMisalign = (tmp & 0x40) >> 6; + cardinfo->SD_csd.RdBlockMisalign = (tmp & 0x20) >> 5; + cardinfo->SD_csd.DSRImpl = (tmp & 0x10) >> 4; + cardinfo->SD_csd.Reserved2 = 0; /*!< Reserved */ + + if ((CardType == SDIO_STD_CAPACITY_SD_CARD_V1_1) || (CardType == SDIO_STD_CAPACITY_SD_CARD_V2_0)) + { + cardinfo->SD_csd.DeviceSize = (tmp & 0x03) << 10; + + /*!< Byte 7 */ + tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF); + cardinfo->SD_csd.DeviceSize |= (tmp) << 2; + + /*!< Byte 8 */ + tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24); + cardinfo->SD_csd.DeviceSize |= (tmp & 0xC0) >> 6; + + cardinfo->SD_csd.MaxRdCurrentVDDMin = (tmp & 0x38) >> 3; + cardinfo->SD_csd.MaxRdCurrentVDDMax = (tmp & 0x07); + + /*!< Byte 9 */ + tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16); + cardinfo->SD_csd.MaxWrCurrentVDDMin = (tmp & 0xE0) >> 5; + cardinfo->SD_csd.MaxWrCurrentVDDMax = (tmp & 0x1C) >> 2; + cardinfo->SD_csd.DeviceSizeMul = (tmp & 0x03) << 1; + /*!< Byte 10 */ + tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); + cardinfo->SD_csd.DeviceSizeMul |= (tmp & 0x80) >> 7; + + cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) ; + cardinfo->CardCapacity *= (1 << (cardinfo->SD_csd.DeviceSizeMul + 2)); + cardinfo->CardBlockSize = 1 << (cardinfo->SD_csd.RdBlockLen); + cardinfo->CardCapacity *= cardinfo->CardBlockSize; + } + else if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + /*!< Byte 7 */ + tmp = (uint8_t)(CSD_Tab[1] & 0x000000FF); + cardinfo->SD_csd.DeviceSize = (tmp & 0x3F) << 16; + + /*!< Byte 8 */ + tmp = (uint8_t)((CSD_Tab[2] & 0xFF000000) >> 24); + + cardinfo->SD_csd.DeviceSize |= (tmp << 8); + + /*!< Byte 9 */ + tmp = (uint8_t)((CSD_Tab[2] & 0x00FF0000) >> 16); + + cardinfo->SD_csd.DeviceSize |= (tmp); + + /*!< Byte 10 */ + tmp = (uint8_t)((CSD_Tab[2] & 0x0000FF00) >> 8); + + cardinfo->CardCapacity = (cardinfo->SD_csd.DeviceSize + 1) * 512 * 1024; + cardinfo->CardBlockSize = 512; + } + + + cardinfo->SD_csd.EraseGrSize = (tmp & 0x40) >> 6; + cardinfo->SD_csd.EraseGrMul = (tmp & 0x3F) << 1; + + /*!< Byte 11 */ + tmp = (uint8_t)(CSD_Tab[2] & 0x000000FF); + cardinfo->SD_csd.EraseGrMul |= (tmp & 0x80) >> 7; + cardinfo->SD_csd.WrProtectGrSize = (tmp & 0x7F); + + /*!< Byte 12 */ + tmp = (uint8_t)((CSD_Tab[3] & 0xFF000000) >> 24); + cardinfo->SD_csd.WrProtectGrEnable = (tmp & 0x80) >> 7; + cardinfo->SD_csd.ManDeflECC = (tmp & 0x60) >> 5; + cardinfo->SD_csd.WrSpeedFact = (tmp & 0x1C) >> 2; + cardinfo->SD_csd.MaxWrBlockLen = (tmp & 0x03) << 2; + + /*!< Byte 13 */ + tmp = (uint8_t)((CSD_Tab[3] & 0x00FF0000) >> 16); + cardinfo->SD_csd.MaxWrBlockLen |= (tmp & 0xC0) >> 6; + cardinfo->SD_csd.WriteBlockPaPartial = (tmp & 0x20) >> 5; + cardinfo->SD_csd.Reserved3 = 0; + cardinfo->SD_csd.ContentProtectAppli = (tmp & 0x01); + + /*!< Byte 14 */ + tmp = (uint8_t)((CSD_Tab[3] & 0x0000FF00) >> 8); + cardinfo->SD_csd.FileFormatGrouop = (tmp & 0x80) >> 7; + cardinfo->SD_csd.CopyFlag = (tmp & 0x40) >> 6; + cardinfo->SD_csd.PermWrProtect = (tmp & 0x20) >> 5; + cardinfo->SD_csd.TempWrProtect = (tmp & 0x10) >> 4; + cardinfo->SD_csd.FileFormat = (tmp & 0x0C) >> 2; + cardinfo->SD_csd.ECC = (tmp & 0x03); + + /*!< Byte 15 */ + tmp = (uint8_t)(CSD_Tab[3] & 0x000000FF); + cardinfo->SD_csd.CSD_CRC = (tmp & 0xFE) >> 1; + cardinfo->SD_csd.Reserved4 = 1; + + + /*!< Byte 0 */ + tmp = (uint8_t)((CID_Tab[0] & 0xFF000000) >> 24); + cardinfo->SD_cid.ManufacturerID = tmp; + + /*!< Byte 1 */ + tmp = (uint8_t)((CID_Tab[0] & 0x00FF0000) >> 16); + cardinfo->SD_cid.OEM_AppliID = tmp << 8; + + /*!< Byte 2 */ + tmp = (uint8_t)((CID_Tab[0] & 0x000000FF00) >> 8); + cardinfo->SD_cid.OEM_AppliID |= tmp; + + /*!< Byte 3 */ + tmp = (uint8_t)(CID_Tab[0] & 0x000000FF); + cardinfo->SD_cid.ProdName1 = tmp << 24; + + /*!< Byte 4 */ + tmp = (uint8_t)((CID_Tab[1] & 0xFF000000) >> 24); + cardinfo->SD_cid.ProdName1 |= tmp << 16; + + /*!< Byte 5 */ + tmp = (uint8_t)((CID_Tab[1] & 0x00FF0000) >> 16); + cardinfo->SD_cid.ProdName1 |= tmp << 8; + + /*!< Byte 6 */ + tmp = (uint8_t)((CID_Tab[1] & 0x0000FF00) >> 8); + cardinfo->SD_cid.ProdName1 |= tmp; + + /*!< Byte 7 */ + tmp = (uint8_t)(CID_Tab[1] & 0x000000FF); + cardinfo->SD_cid.ProdName2 = tmp; + + /*!< Byte 8 */ + tmp = (uint8_t)((CID_Tab[2] & 0xFF000000) >> 24); + cardinfo->SD_cid.ProdRev = tmp; + + /*!< Byte 9 */ + tmp = (uint8_t)((CID_Tab[2] & 0x00FF0000) >> 16); + cardinfo->SD_cid.ProdSN = tmp << 24; + + /*!< Byte 10 */ + tmp = (uint8_t)((CID_Tab[2] & 0x0000FF00) >> 8); + cardinfo->SD_cid.ProdSN |= tmp << 16; + + /*!< Byte 11 */ + tmp = (uint8_t)(CID_Tab[2] & 0x000000FF); + cardinfo->SD_cid.ProdSN |= tmp << 8; + + /*!< Byte 12 */ + tmp = (uint8_t)((CID_Tab[3] & 0xFF000000) >> 24); + cardinfo->SD_cid.ProdSN |= tmp; + + /*!< Byte 13 */ + tmp = (uint8_t)((CID_Tab[3] & 0x00FF0000) >> 16); + cardinfo->SD_cid.Reserved1 |= (tmp & 0xF0) >> 4; + cardinfo->SD_cid.ManufactDate = (tmp & 0x0F) << 8; + + /*!< Byte 14 */ + tmp = (uint8_t)((CID_Tab[3] & 0x0000FF00) >> 8); + cardinfo->SD_cid.ManufactDate |= tmp; + + /*!< Byte 15 */ + tmp = (uint8_t)(CID_Tab[3] & 0x000000FF); + cardinfo->SD_cid.CID_CRC = (tmp & 0xFE) >> 1; + cardinfo->SD_cid.Reserved2 = 1; + + return(errorstatus); +} + +/** + * @brief Enables wide bus opeartion for the requeseted card if supported by + * card. + * @param WideMode: Specifies the SD card wide bus mode. + * This parameter can be one of the following values: + * @arg SDIO_BusWide_8b: 8-bit data transfer (Only for MMC) + * @arg SDIO_BusWide_4b: 4-bit data transfer + * @arg SDIO_BusWide_1b: 1-bit data transfer + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_GetCardStatus(SD_CardStatus *cardstatus) +{ + SD_Error errorstatus = SD_OK; + uint8_t tmp = 0; + + errorstatus = SD_SendSDStatus((uint32_t *)SDSTATUS_Tab); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /*!< Byte 0 */ + tmp = (uint8_t)((SDSTATUS_Tab[0] & 0xC0) >> 6); + cardstatus->DAT_BUS_WIDTH = tmp; + + /*!< Byte 0 */ + tmp = (uint8_t)((SDSTATUS_Tab[0] & 0x20) >> 5); + cardstatus->SECURED_MODE = tmp; + + /*!< Byte 2 */ + tmp = (uint8_t)((SDSTATUS_Tab[2] & 0xFF)); + cardstatus->SD_CARD_TYPE = tmp << 8; + + /*!< Byte 3 */ + tmp = (uint8_t)((SDSTATUS_Tab[3] & 0xFF)); + cardstatus->SD_CARD_TYPE |= tmp; + + /*!< Byte 4 */ + tmp = (uint8_t)(SDSTATUS_Tab[4] & 0xFF); + cardstatus->SIZE_OF_PROTECTED_AREA = tmp << 24; + + /*!< Byte 5 */ + tmp = (uint8_t)(SDSTATUS_Tab[5] & 0xFF); + cardstatus->SIZE_OF_PROTECTED_AREA |= tmp << 16; + + /*!< Byte 6 */ + tmp = (uint8_t)(SDSTATUS_Tab[6] & 0xFF); + cardstatus->SIZE_OF_PROTECTED_AREA |= tmp << 8; + + /*!< Byte 7 */ + tmp = (uint8_t)(SDSTATUS_Tab[7] & 0xFF); + cardstatus->SIZE_OF_PROTECTED_AREA |= tmp; + + /*!< Byte 8 */ + tmp = (uint8_t)((SDSTATUS_Tab[8] & 0xFF)); + cardstatus->SPEED_CLASS = tmp; + + /*!< Byte 9 */ + tmp = (uint8_t)((SDSTATUS_Tab[9] & 0xFF)); + cardstatus->PERFORMANCE_MOVE = tmp; + + /*!< Byte 10 */ + tmp = (uint8_t)((SDSTATUS_Tab[10] & 0xF0) >> 4); + cardstatus->AU_SIZE = tmp; + + /*!< Byte 11 */ + tmp = (uint8_t)(SDSTATUS_Tab[11] & 0xFF); + cardstatus->ERASE_SIZE = tmp << 8; + + /*!< Byte 12 */ + tmp = (uint8_t)(SDSTATUS_Tab[12] & 0xFF); + cardstatus->ERASE_SIZE |= tmp; + + /*!< Byte 13 */ + tmp = (uint8_t)((SDSTATUS_Tab[13] & 0xFC) >> 2); + cardstatus->ERASE_TIMEOUT = tmp; + + /*!< Byte 13 */ + tmp = (uint8_t)((SDSTATUS_Tab[13] & 0x3)); + cardstatus->ERASE_OFFSET = tmp; + + return(errorstatus); +} + +/** + * @brief Enables wide bus opeartion for the requeseted card if supported by + * card. + * @param WideMode: Specifies the SD card wide bus mode. + * This parameter can be one of the following values: + * @arg SDIO_BusWide_8b: 8-bit data transfer (Only for MMC) + * @arg SDIO_BusWide_4b: 4-bit data transfer + * @arg SDIO_BusWide_1b: 1-bit data transfer + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_EnableWideBusOperation(uint32_t WideMode) +{ + SD_Error errorstatus = SD_OK; + + /*!< MMC Card doesn't support this feature */ + if (SDIO_MULTIMEDIA_CARD == CardType) + { + errorstatus = SD_UNSUPPORTED_FEATURE; + return(errorstatus); + } + else if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) + { + if (SDIO_BusWide_8b == WideMode) + { + errorstatus = SD_UNSUPPORTED_FEATURE; + return(errorstatus); + } + else if (SDIO_BusWide_4b == WideMode) + { + errorstatus = SDEnWideBus(ENABLE); + + if (SD_OK == errorstatus) + { + /*!< Configure the SDIO peripheral */ + SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; + SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_4b; + SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; + SDIO_Init(&SDIO_InitStructure); + } + } + else + { + errorstatus = SDEnWideBus(DISABLE); + + if (SD_OK == errorstatus) + { + /*!< Configure the SDIO peripheral */ + SDIO_InitStructure.SDIO_ClockDiv = SDIO_TRANSFER_CLK_DIV; + SDIO_InitStructure.SDIO_ClockEdge = SDIO_ClockEdge_Rising; + SDIO_InitStructure.SDIO_ClockBypass = SDIO_ClockBypass_Disable; + SDIO_InitStructure.SDIO_ClockPowerSave = SDIO_ClockPowerSave_Disable; + SDIO_InitStructure.SDIO_BusWide = SDIO_BusWide_1b; + SDIO_InitStructure.SDIO_HardwareFlowControl = SDIO_HardwareFlowControl_Disable; + SDIO_Init(&SDIO_InitStructure); + } + } + } + + return(errorstatus); +} + +/** + * @brief Selects od Deselects the corresponding card. + * @param addr: Address of the Card to be selected. + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_SelectDeselect(uint32_t addr) +{ + SD_Error errorstatus = SD_OK; + + /*!< Send CMD7 SDIO_SEL_DESEL_CARD */ + SDIO_CmdInitStructure.SDIO_Argument = addr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SEL_DESEL_CARD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SEL_DESEL_CARD); + + return(errorstatus); +} + +/** + * @brief Allows to read one block from a specified address in a card. The Data + * transfer can be managed by DMA mode or Polling mode. + * @note This operation should be followed by two functions to check if the + * DMA Controller and SD Card status. + * - SD_ReadWaitOperation(): this function insure that the DMA + * controller has finished all data transfer. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. + * @param readbuff: pointer to the buffer that will contain the received data + * @param ReadAddr: Address from where data are to be read. + * @param BlockSize: the SD card Data block size. The Block size should be 512. + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_ReadBlock(uint8_t *readbuff, uint64_t ReadAddr, uint16_t BlockSize) +{ + SD_Error errorstatus = SD_OK; +#if defined (SD_POLLING_MODE) + uint32_t count = 0, *tempbuff = (uint32_t *)readbuff; +#endif + + TransferError = SD_OK; + TransferEnd = 0; + StopCondition = 0; + + SDIO->DCTRL = 0x0; + + + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + BlockSize = 512; + ReadAddr /= 512; + } + + /* Set Block Size for Card */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SET_BLOCKLEN); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = BlockSize; + SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + /*!< Send CMD17 READ_SINGLE_BLOCK */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)ReadAddr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_READ_SINGLE_BLOCK; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_READ_SINGLE_BLOCK); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + +#if defined (SD_POLLING_MODE) + /*!< In case of single block transfer, no need of stop transfer at all.*/ + /*!< Polling mode */ + while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) + { + if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) + { + for (count = 0; count < 8; count++) + { + *(tempbuff + count) = SDIO_ReadData(); + } + tempbuff += 8; + } + } + + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_RXOVERR); + errorstatus = SD_RX_OVERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); + } + count = SD_DATATIMEOUT; + while ((SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) && (count > 0)) + { + *tempbuff = SDIO_ReadData(); + tempbuff++; + count--; + } + + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + +#elif defined (SD_DMA_MODE) + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); + SDIO_DMACmd(ENABLE); + SD_LowLevel_DMA_RxConfig((uint32_t *)readbuff, BlockSize); +#endif + + return(errorstatus); +} + +/** + * @brief Allows to read blocks from a specified address in a card. The Data + * transfer can be managed by DMA mode or Polling mode. + * @note This operation should be followed by two functions to check if the + * DMA Controller and SD Card status. + * - SD_ReadWaitOperation(): this function insure that the DMA + * controller has finished all data transfer. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. + * @param readbuff: pointer to the buffer that will contain the received data. + * @param ReadAddr: Address from where data are to be read. + * @param BlockSize: the SD card Data block size. The Block size should be 512. + * @param NumberOfBlocks: number of blocks to be read. + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_ReadMultiBlocks(uint8_t *readbuff, uint64_t ReadAddr, uint16_t BlockSize, uint32_t NumberOfBlocks) +{ + SD_Error errorstatus = SD_OK; + TransferError = SD_OK; + TransferEnd = 0; + StopCondition = 1; + + SDIO->DCTRL = 0x0; + + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + BlockSize = 512; + ReadAddr /= 512; + } + + /*!< Set Block Size for Card */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SET_BLOCKLEN); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize; + SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + /*!< Send CMD18 READ_MULT_BLOCK with argument data address */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)ReadAddr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_READ_MULT_BLOCK; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_READ_MULT_BLOCK); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); + SDIO_DMACmd(ENABLE); + SD_LowLevel_DMA_RxConfig((uint32_t *)readbuff, (NumberOfBlocks * BlockSize)); + + return(errorstatus); +} + +/** + * @brief This function waits until the SDIO DMA data transfer is finished. + * This function should be called after SDIO_ReadMultiBlocks() function + * to insure that all data sent by the card are already transferred by + * the DMA controller. + * @param None. + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_WaitReadOperation(void) +{ + SD_Error errorstatus = SD_OK; + uint32_t timeout; + + timeout = SD_DATATIMEOUT; + + while ((DMAEndOfTransfer == 0x00) && (TransferEnd == 0) && (TransferError == SD_OK) && (timeout > 0)) + { + timeout--; + } + + DMAEndOfTransfer = 0x00; + + timeout = SD_DATATIMEOUT; + + while(((SDIO->STA & SDIO_FLAG_RXACT)) && (timeout > 0)) + { + timeout--; + } + + if (StopCondition == 1) + { + errorstatus = SD_StopTransfer(); + } + + if ((timeout == 0) && (errorstatus == SD_OK)) + { + errorstatus = SD_DATA_TIMEOUT; + } + + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + if (TransferError != SD_OK) + { + return(TransferError); + } + else + { + return(errorstatus); + } +} + +/** + * @brief Allows to write one block starting from a specified address in a card. + * The Data transfer can be managed by DMA mode or Polling mode. + * @note This operation should be followed by two functions to check if the + * DMA Controller and SD Card status. + * - SD_ReadWaitOperation(): this function insure that the DMA + * controller has finished all data transfer. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. + * @param writebuff: pointer to the buffer that contain the data to be transferred. + * @param WriteAddr: Address from where data are to be read. + * @param BlockSize: the SD card Data block size. The Block size should be 512. + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_WriteBlock(uint8_t *writebuff, uint64_t WriteAddr, uint16_t BlockSize) +{ + SD_Error errorstatus = SD_OK; + +#if defined (SD_POLLING_MODE) + uint32_t bytestransferred = 0, count = 0, restwords = 0; + uint32_t *tempbuff = (uint32_t *)writebuff; +#endif + + TransferError = SD_OK; + TransferEnd = 0; + StopCondition = 0; + + SDIO->DCTRL = 0x0; + + + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + BlockSize = 512; + WriteAddr /= 512; + } + + /* Set Block Size for Card */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SET_BLOCKLEN); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + /*!< Send CMD24 WRITE_SINGLE_BLOCK */ + SDIO_CmdInitStructure.SDIO_Argument = WriteAddr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_WRITE_SINGLE_BLOCK; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_WRITE_SINGLE_BLOCK); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = BlockSize; + SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + /*!< In case of single data block transfer no need of stop command at all */ +#if defined (SD_POLLING_MODE) + while (!(SDIO->STA & (SDIO_FLAG_DBCKEND | SDIO_FLAG_TXUNDERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_STBITERR))) + { + if (SDIO_GetFlagStatus(SDIO_FLAG_TXFIFOHE) != RESET) + { + if ((512 - bytestransferred) < 32) + { + restwords = ((512 - bytestransferred) % 4 == 0) ? ((512 - bytestransferred) / 4) : (( 512 - bytestransferred) / 4 + 1); + for (count = 0; count < restwords; count++, tempbuff++, bytestransferred += 4) + { + SDIO_WriteData(*tempbuff); + } + } + else + { + for (count = 0; count < 8; count++) + { + SDIO_WriteData(*(tempbuff + count)); + } + tempbuff += 8; + bytestransferred += 32; + } + } + } + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_TXUNDERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_TXUNDERR); + errorstatus = SD_TX_UNDERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); + } +#elif defined (SD_DMA_MODE) + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); + SD_LowLevel_DMA_TxConfig((uint32_t *)writebuff, BlockSize); + SDIO_DMACmd(ENABLE); +#endif + + return(errorstatus); +} + +/** + * @brief Allows to write blocks starting from a specified address in a card. + * The Data transfer can be managed by DMA mode only. + * @note This operation should be followed by two functions to check if the + * DMA Controller and SD Card status. + * - SD_ReadWaitOperation(): this function insure that the DMA + * controller has finished all data transfer. + * - SD_GetStatus(): to check that the SD Card has finished the + * data transfer and it is ready for data. + * @param WriteAddr: Address from where data are to be read. + * @param writebuff: pointer to the buffer that contain the data to be transferred. + * @param BlockSize: the SD card Data block size. The Block size should be 512. + * @param NumberOfBlocks: number of blocks to be written. + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_WriteMultiBlocks(uint8_t *writebuff, uint64_t WriteAddr, uint16_t BlockSize, uint32_t NumberOfBlocks) +{ + SD_Error errorstatus = SD_OK; + + TransferError = SD_OK; + TransferEnd = 0; + StopCondition = 1; + + SDIO->DCTRL = 0x0; + + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + BlockSize = 512; + WriteAddr /= 512; + } + + /* Set Block Size for Card */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) BlockSize; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SET_BLOCKLEN); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + /*!< To improve performance */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) (RCA << 16); + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + + errorstatus = CmdResp1Error(SD_CMD_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + /*!< To improve performance */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)NumberOfBlocks; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCK_COUNT; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SET_BLOCK_COUNT); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + + /*!< Send CMD25 WRITE_MULT_BLOCK with argument data address */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)WriteAddr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_WRITE_MULT_BLOCK; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_WRITE_MULT_BLOCK); + + if (SD_OK != errorstatus) + { + return(errorstatus); + } + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = NumberOfBlocks * BlockSize; + SDIO_DataInitStructure.SDIO_DataBlockSize = (uint32_t) 9 << 4; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToCard; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | SDIO_IT_RXOVERR | SDIO_IT_STBITERR, ENABLE); + SDIO_DMACmd(ENABLE); + SD_LowLevel_DMA_TxConfig((uint32_t *)writebuff, (NumberOfBlocks * BlockSize)); + + return(errorstatus); +} + +/** + * @brief This function waits until the SDIO DMA data transfer is finished. + * This function should be called after SDIO_WriteBlock() and + * SDIO_WriteMultiBlocks() function to insure that all data sent by the + * card are already transferred by the DMA controller. + * @param None. + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_WaitWriteOperation(void) +{ + SD_Error errorstatus = SD_OK; + uint32_t timeout; + + timeout = SD_DATATIMEOUT; + + while ((DMAEndOfTransfer == 0x00) && (TransferEnd == 0) && (TransferError == SD_OK) && (timeout > 0)) + { + timeout--; + } + + DMAEndOfTransfer = 0x00; + + timeout = SD_DATATIMEOUT; + + while(((SDIO->STA & SDIO_FLAG_TXACT)) && (timeout > 0)) + { + timeout--; + } + + if (StopCondition == 1) + { + errorstatus = SD_StopTransfer(); + } + + if ((timeout == 0) && (errorstatus == SD_OK)) + { + errorstatus = SD_DATA_TIMEOUT; + } + + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + if (TransferError != SD_OK) + { + return(TransferError); + } + else + { + return(errorstatus); + } +} + +/** + * @brief Gets the cuurent data transfer state. + * @param None + * @retval SDTransferState: Data Transfer state. + * This value can be: + * - SD_TRANSFER_OK: No data transfer is acting + * - SD_TRANSFER_BUSY: Data transfer is acting + */ +SDTransferState SD_GetTransferState(void) +{ + if (SDIO->STA & (SDIO_FLAG_TXACT | SDIO_FLAG_RXACT)) + { + return(SD_TRANSFER_BUSY); + } + else + { + return(SD_TRANSFER_OK); + } +} + +/** + * @brief Aborts an ongoing data transfer. + * @param None + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_StopTransfer(void) +{ + SD_Error errorstatus = SD_OK; + + /*!< Send CMD12 STOP_TRANSMISSION */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_STOP_TRANSMISSION; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_STOP_TRANSMISSION); + + return(errorstatus); +} + +/** + * @brief Allows to erase memory area specified for the given card. + * @param startaddr: the start address. + * @param endaddr: the end address. + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr) +{ + SD_Error errorstatus = SD_OK; + uint32_t delay = 0; + __IO uint32_t maxdelay = 0; + uint8_t cardstate = 0; + + /*!< Check if the card coomnd class supports erase command */ + if (((CSD_Tab[1] >> 20) & SD_CCCC_ERASE) == 0) + { + errorstatus = SD_REQUEST_NOT_APPLICABLE; + return(errorstatus); + } + + maxdelay = 120000 / ((SDIO->CLKCR & 0xFF) + 2); + + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) + { + errorstatus = SD_LOCK_UNLOCK_FAILED; + return(errorstatus); + } + + if (CardType == SDIO_HIGH_CAPACITY_SD_CARD) + { + startaddr /= 512; + endaddr /= 512; + } + + /*!< According to sd-card spec 1.0 ERASE_GROUP_START (CMD32) and erase_group_end(CMD33) */ + if ((SDIO_STD_CAPACITY_SD_CARD_V1_1 == CardType) || (SDIO_STD_CAPACITY_SD_CARD_V2_0 == CardType) || (SDIO_HIGH_CAPACITY_SD_CARD == CardType)) + { + /*!< Send CMD32 SD_ERASE_GRP_START with argument as addr */ + SDIO_CmdInitStructure.SDIO_Argument = startaddr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_ERASE_GRP_START; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SD_ERASE_GRP_START); + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /*!< Send CMD33 SD_ERASE_GRP_END with argument as addr */ + SDIO_CmdInitStructure.SDIO_Argument = endaddr; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_ERASE_GRP_END; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SD_ERASE_GRP_END); + if (errorstatus != SD_OK) + { + return(errorstatus); + } + } + + /*!< Send CMD38 ERASE */ + SDIO_CmdInitStructure.SDIO_Argument = 0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_ERASE; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_ERASE); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + for (delay = 0; delay < maxdelay; delay++) + {} + + /*!< Wait till the card is in programming state */ + errorstatus = IsCardProgramming(&cardstate); + delay = SD_DATATIMEOUT; + while ((delay > 0) && (errorstatus == SD_OK) && ((SD_CARD_PROGRAMMING == cardstate) || (SD_CARD_RECEIVING == cardstate))) + { + errorstatus = IsCardProgramming(&cardstate); + delay--; + } + + return(errorstatus); +} + +/** + * @brief Returns the current card's status. + * @param pcardstatus: pointer to the buffer that will contain the SD card + * status (Card Status register). + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_SendStatus(uint32_t *pcardstatus) +{ + SD_Error errorstatus = SD_OK; + + if (pcardstatus == NULL) + { + errorstatus = SD_INVALID_PARAMETER; + return(errorstatus); + } + + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SEND_STATUS; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SEND_STATUS); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + *pcardstatus = SDIO_GetResponse(SDIO_RESP1); + + return(errorstatus); +} + +/** + * @brief Returns the current SD card's status. + * @param psdstatus: pointer to the buffer that will contain the SD card status + * (SD Status register). + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_SendSDStatus(uint32_t *psdstatus) +{ + SD_Error errorstatus = SD_OK; + uint32_t count = 0; + + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) + { + errorstatus = SD_LOCK_UNLOCK_FAILED; + return(errorstatus); + } + + /*!< Set block size for card if it is not equal to current block size for card. */ + SDIO_CmdInitStructure.SDIO_Argument = 64; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SET_BLOCKLEN); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /*!< CMD55 */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + errorstatus = CmdResp1Error(SD_CMD_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = 64; + SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_64b; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + /*!< Send ACMD13 SD_APP_STAUS with argument as card's RCA.*/ + SDIO_CmdInitStructure.SDIO_Argument = 0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_APP_STAUS; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + errorstatus = CmdResp1Error(SD_CMD_SD_APP_STAUS); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + while (!(SDIO->STA &(SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) + { + if (SDIO_GetFlagStatus(SDIO_FLAG_RXFIFOHF) != RESET) + { + for (count = 0; count < 8; count++) + { + *(psdstatus + count) = SDIO_ReadData(); + } + psdstatus += 8; + } + } + + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_RXOVERR); + errorstatus = SD_RX_OVERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); + } + + count = SD_DATATIMEOUT; + while ((SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) && (count > 0)) + { + *psdstatus = SDIO_ReadData(); + psdstatus++; + count--; + } + /*!< Clear all the static status flags*/ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + return(errorstatus); +} + +/** + * @brief Allows to process all the interrupts that are high. + * @param None + * @retval SD_Error: SD Card Error code. + */ +SD_Error SD_ProcessIRQSrc(void) +{ + if (SDIO_GetITStatus(SDIO_IT_DATAEND) != RESET) + { + TransferError = SD_OK; + SDIO_ClearITPendingBit(SDIO_IT_DATAEND); + TransferEnd = 1; + } + else if (SDIO_GetITStatus(SDIO_IT_DCRCFAIL) != RESET) + { + SDIO_ClearITPendingBit(SDIO_IT_DCRCFAIL); + TransferError = SD_DATA_CRC_FAIL; + } + else if (SDIO_GetITStatus(SDIO_IT_DTIMEOUT) != RESET) + { + SDIO_ClearITPendingBit(SDIO_IT_DTIMEOUT); + TransferError = SD_DATA_TIMEOUT; + } + else if (SDIO_GetITStatus(SDIO_IT_RXOVERR) != RESET) + { + SDIO_ClearITPendingBit(SDIO_IT_RXOVERR); + TransferError = SD_RX_OVERRUN; + } + else if (SDIO_GetITStatus(SDIO_IT_TXUNDERR) != RESET) + { + SDIO_ClearITPendingBit(SDIO_IT_TXUNDERR); + TransferError = SD_TX_UNDERRUN; + } + else if (SDIO_GetITStatus(SDIO_IT_STBITERR) != RESET) + { + SDIO_ClearITPendingBit(SDIO_IT_STBITERR); + TransferError = SD_START_BIT_ERR; + } + + SDIO_ITConfig(SDIO_IT_DCRCFAIL | SDIO_IT_DTIMEOUT | SDIO_IT_DATAEND | + SDIO_IT_TXFIFOHE | SDIO_IT_RXFIFOHF | SDIO_IT_TXUNDERR | + SDIO_IT_RXOVERR | SDIO_IT_STBITERR, DISABLE); + return(TransferError); +} + +/** + * @brief This function waits until the SDIO DMA data transfer is finished. + * @param None. + * @retval None. + */ +void SD_ProcessDMAIRQ(void) +{ + if(DMA2->ISR & SD_SDIO_DMA_FLAG_TC) + { + DMAEndOfTransfer = 0x01; + DMA_ClearFlag(SD_SDIO_DMA_FLAG_TC | SD_SDIO_DMA_FLAG_TE | SD_SDIO_DMA_FLAG_HT | SD_SDIO_DMA_FLAG_GL); + } +} + +/** + * @brief Checks for error conditions for CMD0. + * @param None + * @retval SD_Error: SD Card Error code. + */ +static SD_Error CmdError(void) +{ + SD_Error errorstatus = SD_OK; + uint32_t timeout; + + timeout = SDIO_CMD0TIMEOUT; /*!< 10000 */ + + while ((timeout > 0) && (SDIO_GetFlagStatus(SDIO_FLAG_CMDSENT) == RESET)) + { + timeout--; + } + + if (timeout == 0) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + return(errorstatus); + } + + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + return(errorstatus); +} + +/** + * @brief Checks for error conditions for R7 response. + * @param None + * @retval SD_Error: SD Card Error code. + */ +static SD_Error CmdResp7Error(void) +{ + SD_Error errorstatus = SD_OK; + uint32_t status; + uint32_t timeout = SDIO_CMD0TIMEOUT; + + status = SDIO->STA; + + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT)) && (timeout > 0)) + { + timeout--; + status = SDIO->STA; + } + + if ((timeout == 0) || (status & SDIO_FLAG_CTIMEOUT)) + { + /*!< Card is not V2.0 complient or card does not support the set voltage range */ + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + + if (status & SDIO_FLAG_CMDREND) + { + /*!< Card is SD V2.0 compliant */ + errorstatus = SD_OK; + SDIO_ClearFlag(SDIO_FLAG_CMDREND); + return(errorstatus); + } + return(errorstatus); +} + +/** + * @brief Checks for error conditions for R1 response. + * @param cmd: The sent command index. + * @retval SD_Error: SD Card Error code. + */ +static SD_Error CmdResp1Error(uint8_t cmd) +{ + SD_Error errorstatus = SD_OK; + uint32_t status; + uint32_t response_r1; + + status = SDIO->STA; + + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + else if (status & SDIO_FLAG_CCRCFAIL) + { + errorstatus = SD_CMD_CRC_FAIL; + SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); + return(errorstatus); + } + + /*!< Check response received is of desired command */ + if (SDIO_GetCommandResponse() != cmd) + { + errorstatus = SD_ILLEGAL_CMD; + return(errorstatus); + } + + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + /*!< We have received response, retrieve it for analysis */ + response_r1 = SDIO_GetResponse(SDIO_RESP1); + + if ((response_r1 & SD_OCR_ERRORBITS) == SD_ALLZERO) + { + return(errorstatus); + } + + if (response_r1 & SD_OCR_ADDR_OUT_OF_RANGE) + { + return(SD_ADDR_OUT_OF_RANGE); + } + + if (response_r1 & SD_OCR_ADDR_MISALIGNED) + { + return(SD_ADDR_MISALIGNED); + } + + if (response_r1 & SD_OCR_BLOCK_LEN_ERR) + { + return(SD_BLOCK_LEN_ERR); + } + + if (response_r1 & SD_OCR_ERASE_SEQ_ERR) + { + return(SD_ERASE_SEQ_ERR); + } + + if (response_r1 & SD_OCR_BAD_ERASE_PARAM) + { + return(SD_BAD_ERASE_PARAM); + } + + if (response_r1 & SD_OCR_WRITE_PROT_VIOLATION) + { + return(SD_WRITE_PROT_VIOLATION); + } + + if (response_r1 & SD_OCR_LOCK_UNLOCK_FAILED) + { + return(SD_LOCK_UNLOCK_FAILED); + } + + if (response_r1 & SD_OCR_COM_CRC_FAILED) + { + return(SD_COM_CRC_FAILED); + } + + if (response_r1 & SD_OCR_ILLEGAL_CMD) + { + return(SD_ILLEGAL_CMD); + } + + if (response_r1 & SD_OCR_CARD_ECC_FAILED) + { + return(SD_CARD_ECC_FAILED); + } + + if (response_r1 & SD_OCR_CC_ERROR) + { + return(SD_CC_ERROR); + } + + if (response_r1 & SD_OCR_GENERAL_UNKNOWN_ERROR) + { + return(SD_GENERAL_UNKNOWN_ERROR); + } + + if (response_r1 & SD_OCR_STREAM_READ_UNDERRUN) + { + return(SD_STREAM_READ_UNDERRUN); + } + + if (response_r1 & SD_OCR_STREAM_WRITE_OVERRUN) + { + return(SD_STREAM_WRITE_OVERRUN); + } + + if (response_r1 & SD_OCR_CID_CSD_OVERWRIETE) + { + return(SD_CID_CSD_OVERWRITE); + } + + if (response_r1 & SD_OCR_WP_ERASE_SKIP) + { + return(SD_WP_ERASE_SKIP); + } + + if (response_r1 & SD_OCR_CARD_ECC_DISABLED) + { + return(SD_CARD_ECC_DISABLED); + } + + if (response_r1 & SD_OCR_ERASE_RESET) + { + return(SD_ERASE_RESET); + } + + if (response_r1 & SD_OCR_AKE_SEQ_ERROR) + { + return(SD_AKE_SEQ_ERROR); + } + return(errorstatus); +} + +/** + * @brief Checks for error conditions for R3 (OCR) response. + * @param None + * @retval SD_Error: SD Card Error code. + */ +static SD_Error CmdResp3Error(void) +{ + SD_Error errorstatus = SD_OK; + uint32_t status; + + status = SDIO->STA; + + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + return(errorstatus); +} + +/** + * @brief Checks for error conditions for R2 (CID or CSD) response. + * @param None + * @retval SD_Error: SD Card Error code. + */ +static SD_Error CmdResp2Error(void) +{ + SD_Error errorstatus = SD_OK; + uint32_t status; + + status = SDIO->STA; + + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + else if (status & SDIO_FLAG_CCRCFAIL) + { + errorstatus = SD_CMD_CRC_FAIL; + SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); + return(errorstatus); + } + + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + return(errorstatus); +} + +/** + * @brief Checks for error conditions for R6 (RCA) response. + * @param cmd: The sent command index. + * @param prca: pointer to the variable that will contain the SD card relative + * address RCA. + * @retval SD_Error: SD Card Error code. + */ +static SD_Error CmdResp6Error(uint8_t cmd, uint16_t *prca) +{ + SD_Error errorstatus = SD_OK; + uint32_t status; + uint32_t response_r1; + + status = SDIO->STA; + + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CTIMEOUT | SDIO_FLAG_CMDREND))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + else if (status & SDIO_FLAG_CCRCFAIL) + { + errorstatus = SD_CMD_CRC_FAIL; + SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); + return(errorstatus); + } + + /*!< Check response received is of desired command */ + if (SDIO_GetCommandResponse() != cmd) + { + errorstatus = SD_ILLEGAL_CMD; + return(errorstatus); + } + + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + /*!< We have received response, retrieve it. */ + response_r1 = SDIO_GetResponse(SDIO_RESP1); + + if (SD_ALLZERO == (response_r1 & (SD_R6_GENERAL_UNKNOWN_ERROR | SD_R6_ILLEGAL_CMD | SD_R6_COM_CRC_FAILED))) + { + *prca = (uint16_t) (response_r1 >> 16); + return(errorstatus); + } + + if (response_r1 & SD_R6_GENERAL_UNKNOWN_ERROR) + { + return(SD_GENERAL_UNKNOWN_ERROR); + } + + if (response_r1 & SD_R6_ILLEGAL_CMD) + { + return(SD_ILLEGAL_CMD); + } + + if (response_r1 & SD_R6_COM_CRC_FAILED) + { + return(SD_COM_CRC_FAILED); + } + + return(errorstatus); +} + +/** + * @brief Enables or disables the SDIO wide bus mode. + * @param NewState: new state of the SDIO wide bus mode. + * This parameter can be: ENABLE or DISABLE. + * @retval SD_Error: SD Card Error code. + */ +static SD_Error SDEnWideBus(FunctionalState NewState) +{ + SD_Error errorstatus = SD_OK; + + uint32_t scr[2] = {0, 0}; + + if (SDIO_GetResponse(SDIO_RESP1) & SD_CARD_LOCKED) + { + errorstatus = SD_LOCK_UNLOCK_FAILED; + return(errorstatus); + } + + /*!< Get SCR Register */ + errorstatus = FindSCR((uint16_t)RCA, scr); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /*!< If wide bus operation to be enabled */ + if (NewState == ENABLE) + { + /*!< If requested card supports wide bus operation */ + if ((scr[1] & SD_WIDE_BUS_SUPPORT) != SD_ALLZERO) + { + /*!< Send CMD55 APP_CMD with argument as card's RCA.*/ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /*!< Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ + SDIO_CmdInitStructure.SDIO_Argument = 0x2; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_SD_SET_BUSWIDTH; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_APP_SD_SET_BUSWIDTH); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + return(errorstatus); + } + else + { + errorstatus = SD_REQUEST_NOT_APPLICABLE; + return(errorstatus); + } + } /*!< If wide bus operation to be disabled */ + else + { + /*!< If requested card supports 1 bit mode operation */ + if ((scr[1] & SD_SINGLE_BUS_SUPPORT) != SD_ALLZERO) + { + /*!< Send CMD55 APP_CMD with argument as card's RCA.*/ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + + errorstatus = CmdResp1Error(SD_CMD_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /*!< Send ACMD6 APP_CMD with argument as 2 for wide bus mode */ + SDIO_CmdInitStructure.SDIO_Argument = 0x00; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_SD_SET_BUSWIDTH; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_APP_SD_SET_BUSWIDTH); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + return(errorstatus); + } + else + { + errorstatus = SD_REQUEST_NOT_APPLICABLE; + return(errorstatus); + } + } +} + +/** + * @brief Checks if the SD card is in programming state. + * @param pstatus: pointer to the variable that will contain the SD card state. + * @retval SD_Error: SD Card Error code. + */ +static SD_Error IsCardProgramming(uint8_t *pstatus) +{ + SD_Error errorstatus = SD_OK; + __IO uint32_t respR1 = 0, status = 0; + + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SEND_STATUS; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + status = SDIO->STA; + while (!(status & (SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT))) + { + status = SDIO->STA; + } + + if (status & SDIO_FLAG_CTIMEOUT) + { + errorstatus = SD_CMD_RSP_TIMEOUT; + SDIO_ClearFlag(SDIO_FLAG_CTIMEOUT); + return(errorstatus); + } + else if (status & SDIO_FLAG_CCRCFAIL) + { + errorstatus = SD_CMD_CRC_FAIL; + SDIO_ClearFlag(SDIO_FLAG_CCRCFAIL); + return(errorstatus); + } + + status = (uint32_t)SDIO_GetCommandResponse(); + + /*!< Check response received is of desired command */ + if (status != SD_CMD_SEND_STATUS) + { + errorstatus = SD_ILLEGAL_CMD; + return(errorstatus); + } + + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + + /*!< We have received response, retrieve it for analysis */ + respR1 = SDIO_GetResponse(SDIO_RESP1); + + /*!< Find out card status */ + *pstatus = (uint8_t) ((respR1 >> 9) & 0x0000000F); + + if ((respR1 & SD_OCR_ERRORBITS) == SD_ALLZERO) + { + return(errorstatus); + } + + if (respR1 & SD_OCR_ADDR_OUT_OF_RANGE) + { + return(SD_ADDR_OUT_OF_RANGE); + } + + if (respR1 & SD_OCR_ADDR_MISALIGNED) + { + return(SD_ADDR_MISALIGNED); + } + + if (respR1 & SD_OCR_BLOCK_LEN_ERR) + { + return(SD_BLOCK_LEN_ERR); + } + + if (respR1 & SD_OCR_ERASE_SEQ_ERR) + { + return(SD_ERASE_SEQ_ERR); + } + + if (respR1 & SD_OCR_BAD_ERASE_PARAM) + { + return(SD_BAD_ERASE_PARAM); + } + + if (respR1 & SD_OCR_WRITE_PROT_VIOLATION) + { + return(SD_WRITE_PROT_VIOLATION); + } + + if (respR1 & SD_OCR_LOCK_UNLOCK_FAILED) + { + return(SD_LOCK_UNLOCK_FAILED); + } + + if (respR1 & SD_OCR_COM_CRC_FAILED) + { + return(SD_COM_CRC_FAILED); + } + + if (respR1 & SD_OCR_ILLEGAL_CMD) + { + return(SD_ILLEGAL_CMD); + } + + if (respR1 & SD_OCR_CARD_ECC_FAILED) + { + return(SD_CARD_ECC_FAILED); + } + + if (respR1 & SD_OCR_CC_ERROR) + { + return(SD_CC_ERROR); + } + + if (respR1 & SD_OCR_GENERAL_UNKNOWN_ERROR) + { + return(SD_GENERAL_UNKNOWN_ERROR); + } + + if (respR1 & SD_OCR_STREAM_READ_UNDERRUN) + { + return(SD_STREAM_READ_UNDERRUN); + } + + if (respR1 & SD_OCR_STREAM_WRITE_OVERRUN) + { + return(SD_STREAM_WRITE_OVERRUN); + } + + if (respR1 & SD_OCR_CID_CSD_OVERWRIETE) + { + return(SD_CID_CSD_OVERWRITE); + } + + if (respR1 & SD_OCR_WP_ERASE_SKIP) + { + return(SD_WP_ERASE_SKIP); + } + + if (respR1 & SD_OCR_CARD_ECC_DISABLED) + { + return(SD_CARD_ECC_DISABLED); + } + + if (respR1 & SD_OCR_ERASE_RESET) + { + return(SD_ERASE_RESET); + } + + if (respR1 & SD_OCR_AKE_SEQ_ERROR) + { + return(SD_AKE_SEQ_ERROR); + } + + return(errorstatus); +} + +/** + * @brief Find the SD card SCR register value. + * @param rca: selected card address. + * @param pscr: pointer to the buffer that will contain the SCR value. + * @retval SD_Error: SD Card Error code. + */ +static SD_Error FindSCR(uint16_t rca, uint32_t *pscr) +{ + uint32_t index = 0; + SD_Error errorstatus = SD_OK; + uint32_t tempscr[2] = {0, 0}; + + /*!< Set Block Size To 8 Bytes */ + /*!< Send CMD55 APP_CMD with argument as card's RCA */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t)8; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SET_BLOCKLEN; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SET_BLOCKLEN); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + /*!< Send CMD55 APP_CMD with argument as card's RCA */ + SDIO_CmdInitStructure.SDIO_Argument = (uint32_t) RCA << 16; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_APP_CMD; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_APP_CMD); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + SDIO_DataInitStructure.SDIO_DataTimeOut = SD_DATATIMEOUT; + SDIO_DataInitStructure.SDIO_DataLength = 8; + SDIO_DataInitStructure.SDIO_DataBlockSize = SDIO_DataBlockSize_8b; + SDIO_DataInitStructure.SDIO_TransferDir = SDIO_TransferDir_ToSDIO; + SDIO_DataInitStructure.SDIO_TransferMode = SDIO_TransferMode_Block; + SDIO_DataInitStructure.SDIO_DPSM = SDIO_DPSM_Enable; + SDIO_DataConfig(&SDIO_DataInitStructure); + + + /*!< Send ACMD51 SD_APP_SEND_SCR with argument as 0 */ + SDIO_CmdInitStructure.SDIO_Argument = 0x0; + SDIO_CmdInitStructure.SDIO_CmdIndex = SD_CMD_SD_APP_SEND_SCR; + SDIO_CmdInitStructure.SDIO_Response = SDIO_Response_Short; + SDIO_CmdInitStructure.SDIO_Wait = SDIO_Wait_No; + SDIO_CmdInitStructure.SDIO_CPSM = SDIO_CPSM_Enable; + SDIO_SendCommand(&SDIO_CmdInitStructure); + + errorstatus = CmdResp1Error(SD_CMD_SD_APP_SEND_SCR); + + if (errorstatus != SD_OK) + { + return(errorstatus); + } + + while (!(SDIO->STA & (SDIO_FLAG_RXOVERR | SDIO_FLAG_DCRCFAIL | SDIO_FLAG_DTIMEOUT | SDIO_FLAG_DBCKEND | SDIO_FLAG_STBITERR))) + { + if (SDIO_GetFlagStatus(SDIO_FLAG_RXDAVL) != RESET) + { + *(tempscr + index) = SDIO_ReadData(); + index++; + } + } + + if (SDIO_GetFlagStatus(SDIO_FLAG_DTIMEOUT) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DTIMEOUT); + errorstatus = SD_DATA_TIMEOUT; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_DCRCFAIL) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_DCRCFAIL); + errorstatus = SD_DATA_CRC_FAIL; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_RXOVERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_RXOVERR); + errorstatus = SD_RX_OVERRUN; + return(errorstatus); + } + else if (SDIO_GetFlagStatus(SDIO_FLAG_STBITERR) != RESET) + { + SDIO_ClearFlag(SDIO_FLAG_STBITERR); + errorstatus = SD_START_BIT_ERR; + return(errorstatus); + } + + /*!< Clear all the static flags */ + SDIO_ClearFlag(SDIO_STATIC_FLAGS); + + *(pscr + 1) = ((tempscr[0] & SD_0TO7BITS) << 24) | ((tempscr[0] & SD_8TO15BITS) << 8) | ((tempscr[0] & SD_16TO23BITS) >> 8) | ((tempscr[0] & SD_24TO31BITS) >> 24); + + *(pscr) = ((tempscr[1] & SD_0TO7BITS) << 24) | ((tempscr[1] & SD_8TO15BITS) << 8) | ((tempscr[1] & SD_16TO23BITS) >> 8) | ((tempscr[1] & SD_24TO31BITS) >> 24); + + return(errorstatus); +} + +/** + * @brief Converts the number of bytes in power of two and returns the power. + * @param NumberOfBytes: number of bytes. + * @retval None + */ +uint8_t convert_from_bytes_to_power_of_two(uint16_t NumberOfBytes) +{ + uint8_t count = 0; + + while (NumberOfBytes != 1) + { + NumberOfBytes >>= 1; + count++; + } + return(count); +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_sdio_sd.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_sdio_sd.h new file mode 100644 index 0000000..942c72c --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_sdio_sd.h @@ -0,0 +1,406 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_sdio_sd.h + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file contains all the functions prototypes for the SD Card + * stm32l152d_eval_sdio_sd driver firmware library. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L152D_EVAL_SDIO_SD_H +#define __STM32L152D_EVAL_SDIO_SD_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_SDIO_SD + * @{ + */ + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Exported_Types + * @{ + */ +typedef enum +{ +/** + * @brief SDIO specific error defines + */ + SD_CMD_CRC_FAIL = (1), /*!< Command response received (but CRC check failed) */ + SD_DATA_CRC_FAIL = (2), /*!< Data bock sent/received (CRC check Failed) */ + SD_CMD_RSP_TIMEOUT = (3), /*!< Command response timeout */ + SD_DATA_TIMEOUT = (4), /*!< Data time out */ + SD_TX_UNDERRUN = (5), /*!< Transmit FIFO under-run */ + SD_RX_OVERRUN = (6), /*!< Receive FIFO over-run */ + SD_START_BIT_ERR = (7), /*!< Start bit not detected on all data signals in widE bus mode */ + SD_CMD_OUT_OF_RANGE = (8), /*!< CMD's argument was out of range.*/ + SD_ADDR_MISALIGNED = (9), /*!< Misaligned address */ + SD_BLOCK_LEN_ERR = (10), /*!< Transferred block length is not allowed for the card or the number of transferred bytes does not match the block length */ + SD_ERASE_SEQ_ERR = (11), /*!< An error in the sequence of erase command occurs.*/ + SD_BAD_ERASE_PARAM = (12), /*!< An Invalid selection for erase groups */ + SD_WRITE_PROT_VIOLATION = (13), /*!< Attempt to program a write protect block */ + SD_LOCK_UNLOCK_FAILED = (14), /*!< Sequence or password error has been detected in unlock command or if there was an attempt to access a locked card */ + SD_COM_CRC_FAILED = (15), /*!< CRC check of the previous command failed */ + SD_ILLEGAL_CMD = (16), /*!< Command is not legal for the card state */ + SD_CARD_ECC_FAILED = (17), /*!< Card internal ECC was applied but failed to correct the data */ + SD_CC_ERROR = (18), /*!< Internal card controller error */ + SD_GENERAL_UNKNOWN_ERROR = (19), /*!< General or Unknown error */ + SD_STREAM_READ_UNDERRUN = (20), /*!< The card could not sustain data transfer in stream read operation. */ + SD_STREAM_WRITE_OVERRUN = (21), /*!< The card could not sustain data programming in stream mode */ + SD_CID_CSD_OVERWRITE = (22), /*!< CID/CSD overwrite error */ + SD_WP_ERASE_SKIP = (23), /*!< only partial address space was erased */ + SD_CARD_ECC_DISABLED = (24), /*!< Command has been executed without using internal ECC */ + SD_ERASE_RESET = (25), /*!< Erase sequence was cleared before executing because an out of erase sequence command was received */ + SD_AKE_SEQ_ERROR = (26), /*!< Error in sequence of authentication. */ + SD_INVALID_VOLTRANGE = (27), + SD_ADDR_OUT_OF_RANGE = (28), + SD_SWITCH_ERROR = (29), + SD_SDIO_DISABLED = (30), + SD_SDIO_FUNCTION_BUSY = (31), + SD_SDIO_FUNCTION_FAILED = (32), + SD_SDIO_UNKNOWN_FUNCTION = (33), + +/** + * @brief Standard error defines + */ + SD_INTERNAL_ERROR, + SD_NOT_CONFIGURED, + SD_REQUEST_PENDING, + SD_REQUEST_NOT_APPLICABLE, + SD_INVALID_PARAMETER, + SD_UNSUPPORTED_FEATURE, + SD_UNSUPPORTED_HW, + SD_ERROR, + SD_OK = 0 +} SD_Error; + +/** + * @brief SDIO Transfer state + */ +typedef enum +{ + SD_TRANSFER_OK = 0, + SD_TRANSFER_BUSY = 1, + SD_TRANSFER_ERROR +} SDTransferState; + +/** + * @brief SD Card States + */ +typedef enum +{ + SD_CARD_READY = ((uint32_t)0x00000001), + SD_CARD_IDENTIFICATION = ((uint32_t)0x00000002), + SD_CARD_STANDBY = ((uint32_t)0x00000003), + SD_CARD_TRANSFER = ((uint32_t)0x00000004), + SD_CARD_SENDING = ((uint32_t)0x00000005), + SD_CARD_RECEIVING = ((uint32_t)0x00000006), + SD_CARD_PROGRAMMING = ((uint32_t)0x00000007), + SD_CARD_DISCONNECTED = ((uint32_t)0x00000008), + SD_CARD_ERROR = ((uint32_t)0x000000FF) +}SDCardState; + + +/** + * @brief Card Specific Data: CSD Register + */ +typedef struct +{ + __IO uint8_t CSDStruct; /*!< CSD structure */ + __IO uint8_t SysSpecVersion; /*!< System specification version */ + __IO uint8_t Reserved1; /*!< Reserved */ + __IO uint8_t TAAC; /*!< Data read access-time 1 */ + __IO uint8_t NSAC; /*!< Data read access-time 2 in CLK cycles */ + __IO uint8_t MaxBusClkFrec; /*!< Max. bus clock frequency */ + __IO uint16_t CardComdClasses; /*!< Card command classes */ + __IO uint8_t RdBlockLen; /*!< Max. read data block length */ + __IO uint8_t PartBlockRead; /*!< Partial blocks for read allowed */ + __IO uint8_t WrBlockMisalign; /*!< Write block misalignment */ + __IO uint8_t RdBlockMisalign; /*!< Read block misalignment */ + __IO uint8_t DSRImpl; /*!< DSR implemented */ + __IO uint8_t Reserved2; /*!< Reserved */ + __IO uint32_t DeviceSize; /*!< Device Size */ + __IO uint8_t MaxRdCurrentVDDMin; /*!< Max. read current @ VDD min */ + __IO uint8_t MaxRdCurrentVDDMax; /*!< Max. read current @ VDD max */ + __IO uint8_t MaxWrCurrentVDDMin; /*!< Max. write current @ VDD min */ + __IO uint8_t MaxWrCurrentVDDMax; /*!< Max. write current @ VDD max */ + __IO uint8_t DeviceSizeMul; /*!< Device size multiplier */ + __IO uint8_t EraseGrSize; /*!< Erase group size */ + __IO uint8_t EraseGrMul; /*!< Erase group size multiplier */ + __IO uint8_t WrProtectGrSize; /*!< Write protect group size */ + __IO uint8_t WrProtectGrEnable; /*!< Write protect group enable */ + __IO uint8_t ManDeflECC; /*!< Manufacturer default ECC */ + __IO uint8_t WrSpeedFact; /*!< Write speed factor */ + __IO uint8_t MaxWrBlockLen; /*!< Max. write data block length */ + __IO uint8_t WriteBlockPaPartial; /*!< Partial blocks for write allowed */ + __IO uint8_t Reserved3; /*!< Reserded */ + __IO uint8_t ContentProtectAppli; /*!< Content protection application */ + __IO uint8_t FileFormatGrouop; /*!< File format group */ + __IO uint8_t CopyFlag; /*!< Copy flag (OTP) */ + __IO uint8_t PermWrProtect; /*!< Permanent write protection */ + __IO uint8_t TempWrProtect; /*!< Temporary write protection */ + __IO uint8_t FileFormat; /*!< File Format */ + __IO uint8_t ECC; /*!< ECC code */ + __IO uint8_t CSD_CRC; /*!< CSD CRC */ + __IO uint8_t Reserved4; /*!< always 1*/ +} SD_CSD; + +/** + * @brief Card Identification Data: CID Register + */ +typedef struct +{ + __IO uint8_t ManufacturerID; /*!< ManufacturerID */ + __IO uint16_t OEM_AppliID; /*!< OEM/Application ID */ + __IO uint32_t ProdName1; /*!< Product Name part1 */ + __IO uint8_t ProdName2; /*!< Product Name part2*/ + __IO uint8_t ProdRev; /*!< Product Revision */ + __IO uint32_t ProdSN; /*!< Product Serial Number */ + __IO uint8_t Reserved1; /*!< Reserved1 */ + __IO uint16_t ManufactDate; /*!< Manufacturing Date */ + __IO uint8_t CID_CRC; /*!< CID CRC */ + __IO uint8_t Reserved2; /*!< always 1 */ +} SD_CID; + +/** + * @brief SD Card Status + */ +typedef struct +{ + __IO uint8_t DAT_BUS_WIDTH; + __IO uint8_t SECURED_MODE; + __IO uint16_t SD_CARD_TYPE; + __IO uint32_t SIZE_OF_PROTECTED_AREA; + __IO uint8_t SPEED_CLASS; + __IO uint8_t PERFORMANCE_MOVE; + __IO uint8_t AU_SIZE; + __IO uint16_t ERASE_SIZE; + __IO uint8_t ERASE_TIMEOUT; + __IO uint8_t ERASE_OFFSET; +} SD_CardStatus; + + +/** + * @brief SD Card information + */ +typedef struct +{ + SD_CSD SD_csd; + SD_CID SD_cid; + uint64_t CardCapacity; /*!< Card Capacity */ + uint32_t CardBlockSize; /*!< Card Block Size */ + uint16_t RCA; + uint8_t CardType; +} SD_CardInfo; + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Exported_Constants + * @{ + */ + +/** + * @brief SDIO Commands Index + */ +#define SD_CMD_GO_IDLE_STATE ((uint8_t)0) +#define SD_CMD_SEND_OP_COND ((uint8_t)1) +#define SD_CMD_ALL_SEND_CID ((uint8_t)2) +#define SD_CMD_SET_REL_ADDR ((uint8_t)3) /*!< SDIO_SEND_REL_ADDR for SD Card */ +#define SD_CMD_SET_DSR ((uint8_t)4) +#define SD_CMD_SDIO_SEN_OP_COND ((uint8_t)5) +#define SD_CMD_HS_SWITCH ((uint8_t)6) +#define SD_CMD_SEL_DESEL_CARD ((uint8_t)7) +#define SD_CMD_HS_SEND_EXT_CSD ((uint8_t)8) +#define SD_CMD_SEND_CSD ((uint8_t)9) +#define SD_CMD_SEND_CID ((uint8_t)10) +#define SD_CMD_READ_DAT_UNTIL_STOP ((uint8_t)11) /*!< SD Card doesn't support it */ +#define SD_CMD_STOP_TRANSMISSION ((uint8_t)12) +#define SD_CMD_SEND_STATUS ((uint8_t)13) +#define SD_CMD_HS_BUSTEST_READ ((uint8_t)14) +#define SD_CMD_GO_INACTIVE_STATE ((uint8_t)15) +#define SD_CMD_SET_BLOCKLEN ((uint8_t)16) +#define SD_CMD_READ_SINGLE_BLOCK ((uint8_t)17) +#define SD_CMD_READ_MULT_BLOCK ((uint8_t)18) +#define SD_CMD_HS_BUSTEST_WRITE ((uint8_t)19) +#define SD_CMD_WRITE_DAT_UNTIL_STOP ((uint8_t)20) /*!< SD Card doesn't support it */ +#define SD_CMD_SET_BLOCK_COUNT ((uint8_t)23) /*!< SD Card doesn't support it */ +#define SD_CMD_WRITE_SINGLE_BLOCK ((uint8_t)24) +#define SD_CMD_WRITE_MULT_BLOCK ((uint8_t)25) +#define SD_CMD_PROG_CID ((uint8_t)26) /*!< reserved for manufacturers */ +#define SD_CMD_PROG_CSD ((uint8_t)27) +#define SD_CMD_SET_WRITE_PROT ((uint8_t)28) +#define SD_CMD_CLR_WRITE_PROT ((uint8_t)29) +#define SD_CMD_SEND_WRITE_PROT ((uint8_t)30) +#define SD_CMD_SD_ERASE_GRP_START ((uint8_t)32) /*!< To set the address of the first write + block to be erased. (For SD card only) */ +#define SD_CMD_SD_ERASE_GRP_END ((uint8_t)33) /*!< To set the address of the last write block of the + continuous range to be erased. (For SD card only) */ +#define SD_CMD_ERASE_GRP_START ((uint8_t)35) /*!< To set the address of the first write block to be erased. + (For MMC card only spec 3.31) */ + +#define SD_CMD_ERASE_GRP_END ((uint8_t)36) /*!< To set the address of the last write block of the + continuous range to be erased. (For MMC card only spec 3.31) */ + +#define SD_CMD_ERASE ((uint8_t)38) +#define SD_CMD_FAST_IO ((uint8_t)39) /*!< SD Card doesn't support it */ +#define SD_CMD_GO_IRQ_STATE ((uint8_t)40) /*!< SD Card doesn't support it */ +#define SD_CMD_LOCK_UNLOCK ((uint8_t)42) +#define SD_CMD_APP_CMD ((uint8_t)55) +#define SD_CMD_GEN_CMD ((uint8_t)56) +#define SD_CMD_NO_CMD ((uint8_t)64) + +/** + * @brief Following commands are SD Card Specific commands. + * SDIO_APP_CMD should be sent before sending these commands. + */ +#define SD_CMD_APP_SD_SET_BUSWIDTH ((uint8_t)6) /*!< For SD Card only */ +#define SD_CMD_SD_APP_STAUS ((uint8_t)13) /*!< For SD Card only */ +#define SD_CMD_SD_APP_SEND_NUM_WRITE_BLOCKS ((uint8_t)22) /*!< For SD Card only */ +#define SD_CMD_SD_APP_OP_COND ((uint8_t)41) /*!< For SD Card only */ +#define SD_CMD_SD_APP_SET_CLR_CARD_DETECT ((uint8_t)42) /*!< For SD Card only */ +#define SD_CMD_SD_APP_SEND_SCR ((uint8_t)51) /*!< For SD Card only */ +#define SD_CMD_SDIO_RW_DIRECT ((uint8_t)52) /*!< For SD I/O Card only */ +#define SD_CMD_SDIO_RW_EXTENDED ((uint8_t)53) /*!< For SD I/O Card only */ + +/** + * @brief Following commands are SD Card Specific security commands. + * SDIO_APP_CMD should be sent before sending these commands. + */ +#define SD_CMD_SD_APP_GET_MKB ((uint8_t)43) /*!< For SD Card only */ +#define SD_CMD_SD_APP_GET_MID ((uint8_t)44) /*!< For SD Card only */ +#define SD_CMD_SD_APP_SET_CER_RN1 ((uint8_t)45) /*!< For SD Card only */ +#define SD_CMD_SD_APP_GET_CER_RN2 ((uint8_t)46) /*!< For SD Card only */ +#define SD_CMD_SD_APP_SET_CER_RES2 ((uint8_t)47) /*!< For SD Card only */ +#define SD_CMD_SD_APP_GET_CER_RES1 ((uint8_t)48) /*!< For SD Card only */ +#define SD_CMD_SD_APP_SECURE_READ_MULTIPLE_BLOCK ((uint8_t)18) /*!< For SD Card only */ +#define SD_CMD_SD_APP_SECURE_WRITE_MULTIPLE_BLOCK ((uint8_t)25) /*!< For SD Card only */ +#define SD_CMD_SD_APP_SECURE_ERASE ((uint8_t)38) /*!< For SD Card only */ +#define SD_CMD_SD_APP_CHANGE_SECURE_AREA ((uint8_t)49) /*!< For SD Card only */ +#define SD_CMD_SD_APP_SECURE_WRITE_MKB ((uint8_t)48) /*!< For SD Card only */ + +/* Uncomment the following line to select the SDIO Data transfer mode */ +#if !defined (SD_DMA_MODE) && !defined (SD_POLLING_MODE) +#define SD_DMA_MODE ((uint32_t)0x00000000) +/*#define SD_POLLING_MODE ((uint32_t)0x00000002)*/ +#endif + +/** + * @brief SD detection on its memory slot + */ +#define SD_PRESENT ((uint8_t)0x01) +#define SD_NOT_PRESENT ((uint8_t)0x00) + +/** + * @brief Supported SD Memory Cards + */ +#define SDIO_STD_CAPACITY_SD_CARD_V1_1 ((uint32_t)0x00000000) +#define SDIO_STD_CAPACITY_SD_CARD_V2_0 ((uint32_t)0x00000001) +#define SDIO_HIGH_CAPACITY_SD_CARD ((uint32_t)0x00000002) +#define SDIO_MULTIMEDIA_CARD ((uint32_t)0x00000003) +#define SDIO_SECURE_DIGITAL_IO_CARD ((uint32_t)0x00000004) +#define SDIO_HIGH_SPEED_MULTIMEDIA_CARD ((uint32_t)0x00000005) +#define SDIO_SECURE_DIGITAL_IO_COMBO_CARD ((uint32_t)0x00000006) +#define SDIO_HIGH_CAPACITY_MMC_CARD ((uint32_t)0x00000007) + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Exported_Macros + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_SDIO_SD_Exported_Functions + * @{ + */ +void SD_DeInit(void); +SD_Error SD_Init(void); +SDTransferState SD_GetStatus(void); +SDCardState SD_GetState(void); +uint8_t SD_Detect(void); +SD_Error SD_PowerON(void); +SD_Error SD_PowerOFF(void); +SD_Error SD_InitializeCards(void); +SD_Error SD_GetCardInfo(SD_CardInfo *cardinfo); +SD_Error SD_GetCardStatus(SD_CardStatus *cardstatus); +SD_Error SD_EnableWideBusOperation(uint32_t WideMode); +SD_Error SD_SelectDeselect(uint32_t addr); +SD_Error SD_ReadBlock(uint8_t *readbuff, uint64_t ReadAddr, uint16_t BlockSize); +SD_Error SD_ReadMultiBlocks(uint8_t *readbuff, uint64_t ReadAddr, uint16_t BlockSize, uint32_t NumberOfBlocks); +SD_Error SD_WriteBlock(uint8_t *writebuff, uint64_t WriteAddr, uint16_t BlockSize); +SD_Error SD_WriteMultiBlocks(uint8_t *writebuff, uint64_t WriteAddr, uint16_t BlockSize, uint32_t NumberOfBlocks); +SDTransferState SD_GetTransferState(void); +SD_Error SD_StopTransfer(void); +SD_Error SD_Erase(uint32_t startaddr, uint32_t endaddr); +SD_Error SD_SendStatus(uint32_t *pcardstatus); +SD_Error SD_SendSDStatus(uint32_t *psdstatus); +SD_Error SD_ProcessIRQSrc(void); +void SD_ProcessDMAIRQ(void); +SD_Error SD_WaitReadOperation(void); +SD_Error SD_WaitWriteOperation(void); +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L152D_EVAL_SDIO_SD_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_spi_ee.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_spi_ee.c new file mode 100644 index 0000000..9c23813 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_spi_ee.c @@ -0,0 +1,476 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_spi_ee.c + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file provides a set of functions needed to manage the SPI M95xxx + * EEPROM memory mounted on STM32L152D-EVAL board (refer to stm32l152d_eval.h + * to know about the boards supporting this memory). + * It implements a high level communication layer for read and write + * from/to this memory. The needed STM32 hardware resources (SPI and + * GPIO) are defined in stm32l152d_eval.h file, and the initialization is + * performed in SPI_sEE_LowLevel_Init() function declared in stm32l152d_eval.c + * file. + * You can easily tailor this driver to any other development board, + * by just adapting the defines for hardware resources and + * SPI_sEE_LowLevel_Init() function. + * + * +-----------------------------------------------------------+ + * | Pin assignment | + * +-----------------------------+---------------+-------------+ + * | STM32 SPI Pins | sEE | Pin | + * +-----------------------------+---------------+-------------+ + * | sEE_CS_PIN | ChipSelect | 1 (/S) | + * | sEE_MISO_PIN / MISO | DataOut | 2 (Q) | + * | sEE_WP_PIN | WriteProtect | 3 (/W) | + * | | GND | 4 (0 V) | + * | sEE_MOSI_PIN / MOSI | DataIn | 5 (D) | + * | sEE_SCK_PIN / SCLK | Clock | 6 (C) | + * | | Hold | 7 (/HOLD)| + * | | VCC | 8 (3.3 V)| + * +-----------------------------+---------------+-------------+ + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval_spi_ee.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_SPI_EEPROM + * @brief This file includes the M95xxx SPI EEPROM driver of STM32-EVAL boards. + * @{ + */ + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Private_Types + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Private_Defines + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Private_Macros + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Private_Variables + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Private_Function_Prototypes + * @{ + */ +/** + * @} + */ + + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Private_Functions + * @{ + */ + +/** + * @brief DeInitializes the peripherals used by the SPI EEPROM driver. + * @param None + * @retval None + */ +void sEE_DeInit(void) +{ + sEE_SPI_LowLevel_DeInit(); +} + +/** + * @brief Initializes the peripherals used by the SPI EEPROM driver. + * @param None + * @retval None + */ +void sEE_Init(void) +{ + sEE_SPI_LowLevel_Init(); + + /*!< Deselect the EEPROM: Chip Select high */ + sEE_CS_HIGH(); +} + +/** + * @brief Writes more than one byte to the EEPROM with a single WRITE cycle + * (Page WRITE sequence). + * @note The number of byte can't exceed the EEPROM page size. + * @param pBuffer: pointer to the buffer containing the data to be written + * to the EEPROM. + * @param WriteAddr: EEPROM's internal address to write to. + * @param NumByteToWrite: number of bytes to write to the EEPROM, must be equal + * or less than "sEE_PAGESIZE" value. + * @retval None + */ +uint32_t sEE_WritePage(uint8_t* pBuffer, uint16_t WriteAddr, uint16_t* NumByteToWrite) +{ + /*!< Enable the write access to the EEPROM */ + sEE_WriteEnable(); + + /*!< Select the EEPROM: Chip Select low */ + sEE_CS_LOW(); + + /*!< Send "Write to Memory" instruction and MSB of WriteAddr */ + sEE_SendByte(sEE_CMD_WRITE | (uint8_t)((WriteAddr & 0x0100)>>5)); + + /*!< Send WriteAddr address byte to write to */ + sEE_SendByte(WriteAddr & 0xFF); + + /*!< while there is data to be written on the EEPROM */ + while ((*NumByteToWrite)--) + { + /*!< Send the current byte */ + sEE_SendByte(*pBuffer); + /*!< Point on the next byte to be written */ + pBuffer++; + } + + /*!< Deselect the EEPROM: Chip Select high */ + sEE_CS_HIGH(); + + /*!< Wait the end of EEPROM writing */ + sEE_WaitEepromStandbyState(); + + /*!< Disable the write access to the EEROM */ + sEE_WriteDisable(); + + return 0; +} + +/** + * @brief Writes block of data to the EEPROM. In this function, the number of + * WRITE cycles are reduced, using Page WRITE sequence. + * @param pBuffer: pointer to the buffer containing the data to be written + * to the EEPROM. + * @param WriteAddr: EEPROM's internal address to write to. + * @param NumByteToWrite: number of bytes to write to the EEPROM. + * @retval None + */ +void sEE_WriteBuffer(uint8_t* pBuffer, uint16_t WriteAddr, uint16_t NumByteToWrite) +{ + uint16_t NumOfPage = 0, NumOfSingle = 0, Addr = 0, count = 0, temp = 0; + uint16_t sEE_DataNum = 0; + + Addr = WriteAddr % sEE_PAGESIZE; + count = sEE_PAGESIZE - Addr; + NumOfPage = NumByteToWrite / sEE_PAGESIZE; + NumOfSingle = NumByteToWrite % sEE_PAGESIZE; + + if (Addr == 0) /*!< WriteAddr is sEE_PAGESIZE aligned */ + { + if (NumOfPage == 0) /*!< NumByteToWrite < sEE_PAGESIZE */ + { + sEE_DataNum = NumByteToWrite; + sEE_WritePage(pBuffer, WriteAddr, &sEE_DataNum); + } + else /*!< NumByteToWrite > sEE_PAGESIZE */ + { + while (NumOfPage--) + { + sEE_DataNum = sEE_PAGESIZE; + sEE_WritePage(pBuffer, WriteAddr, &sEE_DataNum); + WriteAddr += sEE_PAGESIZE; + pBuffer += sEE_PAGESIZE; + } + + sEE_DataNum = NumOfSingle; + sEE_WritePage(pBuffer, WriteAddr, &sEE_DataNum); + } + } + else /*!< WriteAddr is not sEE_PAGESIZE aligned */ + { + if (NumOfPage == 0) /*!< NumByteToWrite < sEE_PAGESIZE */ + { + if (NumOfSingle > count) /*!< (NumByteToWrite + WriteAddr) > sEE_PAGESIZE */ + { + temp = NumOfSingle - count; + sEE_DataNum = count; + sEE_WritePage(pBuffer, WriteAddr, &sEE_DataNum); + WriteAddr += count; + pBuffer += count; + + sEE_DataNum = temp; + sEE_WritePage(pBuffer, WriteAddr, &sEE_DataNum); + } + else + { + sEE_DataNum = NumByteToWrite; + sEE_WritePage(pBuffer, WriteAddr, &sEE_DataNum); + } + } + else /*!< NumByteToWrite > sEE_PAGESIZE */ + { + NumByteToWrite -= count; + NumOfPage = NumByteToWrite / sEE_PAGESIZE; + NumOfSingle = NumByteToWrite % sEE_PAGESIZE; + + sEE_DataNum = count; + + sEE_WritePage(pBuffer, WriteAddr, &sEE_DataNum); + WriteAddr += count; + pBuffer += count; + + while (NumOfPage--) + { + sEE_DataNum = sEE_PAGESIZE; + + sEE_WritePage(pBuffer, WriteAddr, &sEE_DataNum); + WriteAddr += sEE_PAGESIZE; + pBuffer += sEE_PAGESIZE; + } + + if (NumOfSingle != 0) + { + sEE_DataNum = NumOfSingle; + + sEE_WritePage(pBuffer, WriteAddr, &sEE_DataNum); + } + } + } +} + +/** + * @brief Reads a block of data from the EEPROM. + * @param pBuffer: pointer to the buffer that receives the data read from the EEPROM. + * @param ReadAddr: EEPROM's internal address to read from. + * @param NumByteToRead: number of bytes to read from the EEPROM. + * @retval None + */ +uint32_t sEE_ReadBuffer(uint8_t* pBuffer, uint16_t ReadAddr, uint16_t* NumByteToRead) +{ + /*!< Select the EEPROM: Chip Select low */ + sEE_CS_LOW(); + + /*!< Send "Read from Memory" instruction and MSB of WriteAddr */ + sEE_SendByte(sEE_CMD_READ | (uint8_t)((ReadAddr & 0x100)>>5)); + + /*!< Send WriteAddr address byte to write to */ + sEE_SendByte(ReadAddr & 0xFF); + + while ((*NumByteToRead)--) /*!< while there is data to be read */ + { + /*!< Read a byte from the EEPROM */ + *pBuffer = sEE_SendByte(sEE_DUMMY_BYTE); + /*!< Point to the next location where the byte read will be saved */ + pBuffer++; + } + + /*!< Deselect the EEPROM: Chip Select high */ + sEE_CS_HIGH(); + + return 0; +} + + +/** + * @brief Reads a byte from the SPI EEPROM. + * @note This function must be used only if the Start_Read_Sequence function + * has been previously called. + * @param None + * @retval Byte Read from the SPI EEPROM. + */ +uint8_t sEE_ReadByte(void) +{ + return (sEE_SendByte(sEE_DUMMY_BYTE)); +} + +/** + * @brief Sends a byte through the SPI interface and return the byte received + * from the SPI bus. + * @param byte: byte to send. + * @retval The value of the received byte. + */ +uint8_t sEE_SendByte(uint8_t byte) +{ + /*!< Loop while DR register in not empty */ + while (SPI_I2S_GetFlagStatus(sEE_SPI, SPI_I2S_FLAG_TXE) == RESET); + + /*!< Send byte through the SPI peripheral */ + SPI_SendData(sEE_SPI, byte); + + /*!< Wait to receive a byte */ + while (SPI_I2S_GetFlagStatus(sEE_SPI, SPI_I2S_FLAG_RXNE) == RESET); + + /*!< Return the byte read from the SPI bus */ + return (uint8_t)SPI_ReceiveData(sEE_SPI); +} +/** + * @brief Enables the write access to the EEPROM. + * @param None + * @retval None + */ +void sEE_WriteEnable(void) +{ + /*!< Select the EEPROM: Chip Select low */ + sEE_CS_LOW(); + + /*!< Send "Write Enable" instruction */ + sEE_SendByte(sEE_CMD_WREN); + + /*!< Deselect the EEPROM: Chip Select high */ + sEE_CS_HIGH(); +} + +/** + * @brief Disables the write access to the EEPROM. + * @param None + * @retval None + */ +void sEE_WriteDisable(void) +{ + /*!< Select the EEPROM: Chip Select low */ + sEE_CS_LOW(); + + /*!< Send "Write Disable" instruction */ + sEE_SendByte(sEE_CMD_WRDI); + + /*!< Deselect the EEPROM: Chip Select high */ + sEE_CS_HIGH(); +} + +/** + * @brief Write new value in EEPROM Status Register. + * @param regval : new value of register + * @retval None + */ +void sEE_WriteStatusRegister(uint8_t regval) +{ + /*!< Select the EEPROM: Chip Select low */ + sEE_CS_LOW(); + + /*!< Enable the write access to the EEPROM */ + sEE_WriteEnable(); + + /*!< Send "Write Status Register" instruction */ + sEE_SendByte(sEE_CMD_WRSR); + + /*!< Write regval in status register */ + sEE_SendByte(regval); + + /*!< Deselect the EEPROM: Chip Select high */ + sEE_CS_HIGH(); +} + +/** + * @brief Read EEPROM Status Register. + * @param None + * @retval The value of the Status register. + */ +uint8_t sEE_ReadStatusRegister(void) +{ + uint8_t sEEstatus = 0; + + /*!< Select the EEPROM: Chip Select low */ + sEE_CS_LOW(); + + /*!< Send "Read Status Register" instruction */ + sEE_SendByte(sEE_CMD_RDSR); + + /*!< Send a dummy byte to generate the clock needed by the EEPROM + and put the value of the status register in EEPROM Status variable */ + sEEstatus = sEE_SendByte(sEE_DUMMY_BYTE); + + /*!< Deselect the EEPROM: Chip Select high */ + sEE_CS_HIGH(); + + return sEEstatus; +} + +/** + * @brief Polls the status of the Write In Progress (WIP) flag in the EEPROM's + * status register and loop until write operation has completed. + * @param None + * @retval None + */ +uint32_t sEE_WaitEepromStandbyState(void) +{ + uint8_t sEEstatus = 0; + + /*!< Select the EEPROM: Chip Select low */ + sEE_CS_LOW(); + + /*!< Send "Read Status Register" instruction */ + sEE_SendByte(sEE_CMD_RDSR); + + /*!< Loop as long as the memory is busy with a write cycle */ + do + { + /*!< Send a dummy byte to generate the clock needed by the EEPROM + and put the value of the status register in EEPROM Status variable */ + sEEstatus = sEE_SendByte(sEE_DUMMY_BYTE); + + } + while ((sEEstatus & sEE_WIP_FLAG) == SET); /* Write in progress */ + + /*!< Deselect the EEPROM: Chip Select high */ + sEE_CS_HIGH(); + + return 0; +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_spi_ee.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_spi_ee.h new file mode 100644 index 0000000..f1abfac --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Utilities/STM32_EVAL/STM32L152D_EVAL/stm32l152d_eval_spi_ee.h @@ -0,0 +1,156 @@ +/** + ****************************************************************************** + * @file stm32l152d_eval_spi_ee.h + * @author MCD Application Team + * @version V1.0.1 + * @date 09-March-2012 + * @brief This file contains all the functions prototypes for the stm32l152d_eval_spi_ee + * firmware driver. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2012 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32L152D_EVAL_SPI_EE_H +#define __STM32L152D_EVAL_SPI_EE_H + +#ifdef __cplusplus + extern "C" { +#endif + +/* Includes ------------------------------------------------------------------*/ +#include "stm32l152d_eval.h" + +/** @addtogroup Utilities + * @{ + */ + +/** @addtogroup STM32_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL + * @{ + */ + +/** @addtogroup STM32L152D_EVAL_SPI_EEPROM + * @{ + */ + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Exported_Types + * @{ + */ +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Exported_Constants + * @{ + */ +/** + * @brief M95 SPI EEPROM supported commands + */ +#define sEE_CMD_WREN 0x06 /*!< Write enable instruction */ +#define sEE_CMD_WRDI 0x04 /*!< Write disable instruction */ +#define sEE_CMD_RDSR 0x05 /*!< Read Status Register instruction */ +#define sEE_CMD_WRSR 0x01 /*!< Write Status Register instruction */ +#define sEE_CMD_WRITE 0x02 /*!< Write to Memory instruction */ +#define sEE_CMD_READ 0x03 /*!< Read from Memory instruction */ + +/** + * @brief M95040 SPI EEPROM defines + */ +#define sEE_WIP_FLAG 0x01 /*!< Write In Progress (WIP) flag */ + +#define sEE_DUMMY_BYTE 0xA5 + +#define sEE_PAGESIZE 16 + + + +/** + * @} + */ + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Exported_Macros + * @{ + */ +/** + * @brief Select EEPROM: Chip Select pin low + */ +#define sEE_CS_LOW() GPIO_ResetBits(sEE_SPI_CS_GPIO_PORT, sEE_SPI_CS_PIN) +/** + * @brief Deselect EEPROM: Chip Select pin high + */ +#define sEE_CS_HIGH() GPIO_SetBits(sEE_SPI_CS_GPIO_PORT, sEE_SPI_CS_PIN) +/** + * @} + */ + + + +/** @defgroup STM32L152D_EVAL_SPI_EEPROM_Exported_Functions + * @{ + */ +/** + * @brief High layer functions + */ +void sEE_DeInit(void); +void sEE_Init(void); +uint32_t sEE_ReadBuffer(uint8_t* pBuffer, uint16_t ReadAddr, uint16_t* NumByteToRead); +void sEE_WriteBuffer(uint8_t* pBuffer, uint16_t WriteAddr, uint16_t NumByteToWrite); +uint32_t sEE_WritePage(uint8_t* pBuffer, uint16_t WriteAddr, uint16_t* NumByteToWrite); +uint32_t sEE_WaitEepromStandbyState(void); + +/** + * @brief Low layer functions + */ +uint8_t sEE_ReadByte(void); +uint8_t sEE_SendByte(uint8_t byte); +void sEE_WriteEnable(void); +void sEE_WriteDisable(void); +void sEE_WriteStatusRegister(uint8_t regval); +uint8_t sEE_ReadStatusRegister(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __STM32L152D_EVAL_SPI_EE_H */ +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |