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Diffstat (limited to 'thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS')
6 files changed, 825 insertions, 0 deletions
diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/main.c b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/main.c new file mode 100644 index 0000000..8e34cbd --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/main.c @@ -0,0 +1,336 @@ +/** + ****************************************************************************** + * @file SPI/FullDuplex_SoftNSS/main.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main program body + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" +#include "platform_config.h" + +/** @addtogroup STM32F10x_StdPeriph_Examples + * @{ + */ + +/** @addtogroup SPI_FullDuplex_SoftNSS + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +typedef enum {FAILED = 0, PASSED = !FAILED} TestStatus; + +/* Private define ------------------------------------------------------------*/ +#define BufferSize 32 + +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +SPI_InitTypeDef SPI_InitStructure; +uint8_t SPIy_Buffer_Tx[BufferSize] = {0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, + 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, + 0x0F, 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, + 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, + 0x1D, 0x1E, 0x1F, 0x20}; +uint8_t SPIz_Buffer_Tx[BufferSize] = {0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57, + 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, + 0x5F, 0x60, 0x61, 0x62, 0x63, 0x64, 0x65, + 0x66, 0x67, 0x68, 0x69, 0x6A, 0x6B, 0x6C, + 0x6D, 0x6E, 0x6F, 0x70}; +uint8_t SPIy_Buffer_Rx[BufferSize], SPIz_Buffer_Rx[BufferSize]; +__IO uint8_t TxIdx = 0, RxIdx = 0, k = 0; +volatile TestStatus TransferStatus1 = FAILED, TransferStatus2 = FAILED; +volatile TestStatus TransferStatus3 = FAILED, TransferStatus4 = FAILED; + +/* Private functions ---------------------------------------------------------*/ +void RCC_Configuration(void); +void GPIO_Configuration(uint16_t SPIy_Mode, uint16_t SPIz_Mode); +TestStatus Buffercmp(uint8_t* pBuffer1, uint8_t* pBuffer2, uint16_t BufferLength); + +/** + * @brief Main program + * @param None + * @retval None + */ +int main(void) +{ + /*!< At this stage the microcontroller clock setting is already configured, + this is done through SystemInit() function which is called from startup + file (startup_stm32f10x_xx.s) before to branch to application main. + To reconfigure the default setting of SystemInit() function, refer to + system_stm32f10x.c file + */ + + /* System clocks configuration ---------------------------------------------*/ + RCC_Configuration(); + + /* 1st phase: SPIy Master and SPIz Slave */ + /* GPIO configuration ------------------------------------------------------*/ + GPIO_Configuration(SPI_Mode_Master, SPI_Mode_Slave); + + /* SPIy Config -------------------------------------------------------------*/ + SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; + SPI_InitStructure.SPI_Mode = SPI_Mode_Master; + SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; + SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; + SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; + SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; + SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; + SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_LSB; + SPI_InitStructure.SPI_CRCPolynomial = 7; + SPI_Init(SPIy, &SPI_InitStructure); + + /* SPIz Config -------------------------------------------------------------*/ + SPI_InitStructure.SPI_Mode = SPI_Mode_Slave; + SPI_Init(SPIz, &SPI_InitStructure); + + /* Enable SPIy */ + SPI_Cmd(SPIy, ENABLE); + /* Enable SPIz */ + SPI_Cmd(SPIz, ENABLE); + + /* Transfer procedure */ + while (TxIdx < BufferSize) + { + /* Wait for SPIy Tx buffer empty */ + while (SPI_I2S_GetFlagStatus(SPIy, SPI_I2S_FLAG_TXE) == RESET); + /* Send SPIz data */ + SPI_I2S_SendData(SPIz, SPIz_Buffer_Tx[TxIdx]); + /* Send SPIy data */ + SPI_I2S_SendData(SPIy, SPIy_Buffer_Tx[TxIdx++]); + /* Wait for SPIz data reception */ + while (SPI_I2S_GetFlagStatus(SPIz, SPI_I2S_FLAG_RXNE) == RESET); + /* Read SPIz received data */ + SPIz_Buffer_Rx[RxIdx] = SPI_I2S_ReceiveData(SPIz); + /* Wait for SPIy data reception */ + while (SPI_I2S_GetFlagStatus(SPIy, SPI_I2S_FLAG_RXNE) == RESET); + /* Read SPIy received data */ + SPIy_Buffer_Rx[RxIdx++] = SPI_I2S_ReceiveData(SPIy); + } + + /* Check the correctness of written dada */ + TransferStatus1 = Buffercmp(SPIz_Buffer_Rx, SPIy_Buffer_Tx, BufferSize); + TransferStatus2 = Buffercmp(SPIy_Buffer_Rx, SPIz_Buffer_Tx, BufferSize); + /* TransferStatus1, TransferStatus2 = PASSED, if the transmitted and received data + are equal */ + /* TransferStatus1, TransferStatus2 = FAILED, if the transmitted and received data + are different */ + + /* 2nd phase: SPIy Slave and SPIz Master */ + /* GPIO configuration ------------------------------------------------------*/ + GPIO_Configuration(SPI_Mode_Slave , SPI_Mode_Master); + + /* SPIy Re-configuration ---------------------------------------------------*/ + SPI_InitStructure.SPI_Mode = SPI_Mode_Slave; + SPI_Init(SPIy, &SPI_InitStructure); + + /* SPIz Re-configuration ---------------------------------------------------*/ + SPI_InitStructure.SPI_Mode = SPI_Mode_Master; + SPI_Init(SPIz, &SPI_InitStructure); + + /* Reset TxIdx, RxIdx indexes and receive tables values */ + TxIdx = 0; + RxIdx = 0; + for (k = 0; k < BufferSize; k++) SPIz_Buffer_Rx[k] = 0; + for (k = 0; k < BufferSize; k++) SPIy_Buffer_Rx[k] = 0; + + /* Transfer procedure */ + while (TxIdx < BufferSize) + { + /* Wait for SPIz Tx buffer empty */ + while (SPI_I2S_GetFlagStatus(SPIz, SPI_I2S_FLAG_TXE) == RESET); + /* Send SPIy data */ + SPI_I2S_SendData(SPIy, SPIy_Buffer_Tx[TxIdx]); + /* Send SPIz data */ + SPI_I2S_SendData(SPIz, SPIz_Buffer_Tx[TxIdx++]); + /* Wait for SPIy data reception */ + while (SPI_I2S_GetFlagStatus(SPIy, SPI_I2S_FLAG_RXNE) == RESET); + /* Read SPIy received data */ + SPIy_Buffer_Rx[RxIdx] = SPI_I2S_ReceiveData(SPIy); + /* Wait for SPIz data reception */ + while (SPI_I2S_GetFlagStatus(SPIz, SPI_I2S_FLAG_RXNE) == RESET); + /* Read SPIz received data */ + SPIz_Buffer_Rx[RxIdx++] = SPI_I2S_ReceiveData(SPIz); + } + + /* Check the correctness of written dada */ + TransferStatus3 = Buffercmp(SPIz_Buffer_Rx, SPIy_Buffer_Tx, BufferSize); + TransferStatus4 = Buffercmp(SPIy_Buffer_Rx, SPIz_Buffer_Tx, BufferSize); + /* TransferStatus3, TransferStatus4 = PASSED, if the transmitted and received data + are equal */ + /* TransferStatus3, TransferStatus4 = FAILED, if the transmitted and received data + are different */ + + while (1) + {} +} + +/** + * @brief Configures the different system clocks. + * @param None + * @retval None + */ +void RCC_Configuration(void) +{ + /* PCLK2 = HCLK/2 */ + RCC_PCLK2Config(RCC_HCLK_Div2); + +/* Enable peripheral clocks --------------------------------------------------*/ +#ifdef USE_STM3210C_EVAL + /* Enable GPIO clock for SPIy and SPIz */ + RCC_APB2PeriphClockCmd(SPIy_GPIO_CLK | SPIz_GPIO_CLK | RCC_APB2Periph_AFIO, ENABLE); + + /* Enable SPIy Periph clock */ + RCC_APB1PeriphClockCmd(SPIy_CLK, ENABLE); + +#else + /* Enable SPIy clock and GPIO clock for SPIy and SPIz */ + RCC_APB2PeriphClockCmd(SPIy_GPIO_CLK | SPIz_GPIO_CLK | SPIy_CLK, ENABLE); +#endif + /* Enable SPIz Periph clock */ + RCC_APB1PeriphClockCmd(SPIz_CLK, ENABLE); +} + +/** + * @brief Configures the different SPIy and SPIz GPIO ports. + * @param SPIy_Mode: Specifies the SPIy operating mode. + * This parameter can be: + * - SPIy_Mode_Master + * - SPIy_Mode_Slave + * @param SPIz_Mode: Specifies the SPIz operating mode. + * This parameter can be: + * - SPIz_Mode_Master + * - SPIz_Mode_Slave + * @retval None + */ +void GPIO_Configuration(uint16_t SPIy_Mode, uint16_t SPIz_Mode) +{ + GPIO_InitTypeDef GPIO_InitStructure; + +#ifdef USE_STM3210C_EVAL + /* Enable SPI3 Pins Software Remapping */ + GPIO_PinRemapConfig(GPIO_Remap_SPI3, ENABLE); +#endif + + /* Configure SPIy pins: SCK, MISO and MOSI ---------------------------------*/ + GPIO_InitStructure.GPIO_Pin = SPIy_PIN_SCK | SPIy_PIN_MOSI; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + + if(SPIy_Mode == SPI_Mode_Master) + { + /* Configure SCK and MOSI pins as Alternate Function Push Pull */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + } + else + { + /* Configure SCK and MOSI pins as Input Floating */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + } + GPIO_Init(SPIy_GPIO, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = SPIy_PIN_MISO; + + if(SPIy_Mode == SPI_Mode_Master) + { + /* Configure MISO pin as Input Floating */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + } + else + { + /* Configure MISO pin as Alternate Function Push Pull */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + } + GPIO_Init(SPIy_GPIO, &GPIO_InitStructure); + + /* Configure SPIz pins: SCK, MISO and MOSI ---------------------------------*/ + GPIO_InitStructure.GPIO_Pin = SPIz_PIN_SCK | SPIz_PIN_MOSI; + + if(SPIz_Mode == SPI_Mode_Slave) + { + /* Configure SCK and MOSI pins as Input Floating */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + } + else + { + /* Configure SCK and MOSI pins as Alternate Function Push Pull */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + } + GPIO_Init(SPIz_GPIO, &GPIO_InitStructure); + + GPIO_InitStructure.GPIO_Pin = SPIz_PIN_MISO; + if(SPIz_Mode == SPI_Mode_Slave) + { + /* Configure MISO pin as Alternate Function Push Pull */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; + } + else + { /* Configure MISO pin as Input Floating */ + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; + } + GPIO_Init(SPIz_GPIO, &GPIO_InitStructure); +} +/** + * @brief Compares two buffers. + * @param pBuffer1, pBuffer2: buffers to be compared. + * @param BufferLength: buffer's length + * @retval PASSED: pBuffer1 identical to pBuffer2 + * FAILED: pBuffer1 differs from pBuffer2 + */ +TestStatus Buffercmp(uint8_t* pBuffer1, uint8_t* pBuffer2, uint16_t BufferLength) +{ + while (BufferLength--) + { + if (*pBuffer1 != *pBuffer2) + { + return FAILED; + } + + pBuffer1++; + pBuffer2++; + } + + return PASSED; +} + +#ifdef USE_FULL_ASSERT + +/** + * @brief Reports the name of the source file and the source line number + * where the assert_param error has occurred. + * @param file: pointer to the source file name + * @param line: assert_param error line source number + * @retval None + */ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + /* Infinite loop */ + while (1) + {} +} + +#endif +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/platform_config.h b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/platform_config.h new file mode 100644 index 0000000..1440c52 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/platform_config.h @@ -0,0 +1,82 @@ +/** + ****************************************************************************** + * @file SPI/FullDuplex_SoftNSS/platform_config.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Evaluation board specific configuration file. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __PLATFORM_CONFIG_H +#define __PLATFORM_CONFIG_H + +/* Includes ------------------------------------------------------------------*/ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line corresponding to the STMicroelectronics evaluation board + used to run the example */ +#if !defined (USE_STM32100B_EVAL) && !defined (USE_STM3210B_EVAL) && !defined (USE_STM3210E_EVAL) && !defined (USE_STM3210C_EVAL) && !defined (USE_STM32100E_EVAL) + //#define USE_STM32100B_EVAL + //#define USE_STM3210B_EVAL + //#define USE_STM3210E_EVAL + //#define USE_STM32100E_EVAL + #define USE_STM3210C_EVAL +#endif + +/* Define the STM32F10x hardware depending on the used evaluation board */ +#if defined (USE_STM3210B_EVAL) || defined (USE_STM3210E_EVAL) || defined(USE_STM32100B_EVAL) || defined (USE_STM32100E_EVAL) + #define SPIy SPI1 + #define SPIy_CLK RCC_APB2Periph_SPI1 + #define SPIy_GPIO GPIOA + #define SPIy_GPIO_CLK RCC_APB2Periph_GPIOA + #define SPIy_PIN_SCK GPIO_Pin_5 + #define SPIy_PIN_MISO GPIO_Pin_6 + #define SPIy_PIN_MOSI GPIO_Pin_7 + + #define SPIz SPI2 + #define SPIz_CLK RCC_APB1Periph_SPI2 + #define SPIz_GPIO GPIOB + #define SPIz_GPIO_CLK RCC_APB2Periph_GPIOB + #define SPIz_PIN_SCK GPIO_Pin_13 + #define SPIz_PIN_MISO GPIO_Pin_14 + #define SPIz_PIN_MOSI GPIO_Pin_15 + +#elif defined (USE_STM3210C_EVAL) + #define SPIy SPI3 /* SPI pins are remapped by software */ + #define SPIy_CLK RCC_APB1Periph_SPI3 + #define SPIy_GPIO GPIOC + #define SPIy_GPIO_CLK RCC_APB2Periph_GPIOC + #define SPIy_PIN_SCK GPIO_Pin_10 + #define SPIy_PIN_MISO GPIO_Pin_11 + #define SPIy_PIN_MOSI GPIO_Pin_12 + + #define SPIz SPI2 + #define SPIz_CLK RCC_APB1Periph_SPI2 + #define SPIz_GPIO GPIOB + #define SPIz_GPIO_CLK RCC_APB2Periph_GPIOB + #define SPIz_PIN_SCK GPIO_Pin_13 + #define SPIz_PIN_MISO GPIO_Pin_14 + #define SPIz_PIN_MOSI GPIO_Pin_15 + +#endif + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +#endif /* __PLATFORM_CONFIG_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/readme.txt b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/readme.txt new file mode 100644 index 0000000..5468227 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/readme.txt @@ -0,0 +1,124 @@ +/** + @page SPI_FullDuplex_SoftNSS SPI Full Duplex Software NSS example + + @verbatim + ******************** (C) COPYRIGHT 2011 STMicroelectronics ******************* + * @file SPI/FullDuplex_SoftNSS/readme.txt + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Description of the SPI Full Duplex Software NSS example. + ****************************************************************************** + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + ****************************************************************************** + @endverbatim + +@par Example Description + +This example provides a description of how to set a communication between SPIy and +SPIz in full-duplex mode and performs a transfer from Master to Slave and then +Slave to Master in the same application with software NSS management. +SPIy and SPIz can be SPI1 and SPI2 or SPI3 and SPI2, depending on the STMicroelectronics +EVAL board you are using. + +Both SPIs are configured with 8bit data frame and a 9Mbit/s communication speed. +(for Value line devices the speed is set at 6Mbit/s). +In the first phase, the master SPIy starts the SPIy_Buffer_Tx transfer while the +slave SPIz transmit SPIz_Buffer_Tx. Once the transfer is completed a comparison +is done and TransferStatus1 and TransferStatus2 gives the data transfer status for +each data transfer direction where it is PASSED if transmitted and received data +are the same otherwise it is FAILED. + +As the NSS pin is managed by software, this permit to SPIy to become slave and SPIz +to become master without hardware modification. +In the second step, the slave SPIy starts the SPIy_Buffer_Tx transfer while the +master SPIz transmit SPIz_Buffer_Tx. Once the transfer is completed a comparison +is done and TransferStatus3 and TransferStatus4 gives the data transfer status for +each data transfer direction where it is PASSED if transmitted and received data +are the same otherwise it is FAILED. + + +@par Directory contents + + - SPI/FullDuplex_SoftNSS/platform_config.h Evaluation board specific configuration file + - SPI/FullDuplex_SoftNSS/stm32f10x_conf.h Library Configuration file + - SPI/FullDuplex_SoftNSS/stm32f10x_it.c Interrupt handlers + - SPI/FullDuplex_SoftNSS/stm32f10x_it.h Interrupt handlers header file + - SPI/FullDuplex_SoftNSS/main.c Main program + - SPI/FullDuplex_SoftNSS/system_stm32f10x.c STM32F10x system source file + +@par Hardware and Software environment + + - This example runs on STM32F10x Connectivity line, High-Density, High-Density + Value line, Medium-Density, XL-Density, Medium-Density Value line, Low-Density + and Low-Density Value line Devices. + + - This example has been tested with STMicroelectronics STM32100E-EVAL (High-Density + Value line), STM32100B-EVAL (Medium-Density Value line), STM3210C-EVAL (Connectivity line), + STM3210E-EVAL (High-Density and XL-Density) and STM3210B-EVAL (Medium-Density) + evaluation boards and can be easily tailored to any other supported device + and development board. + To select the STMicroelectronics evaluation board used to run the example, + uncomment the corresponding line in SPI/FullDuplex_SoftNSS/platform_config.h file. + + - STM32100E-EVAL Set-up + - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13) + - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14) + - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15) + + - STM32100B-EVAL Set-up + - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13) + - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14) + - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15) + + - STM3210C-EVAL Set-up + - Connect SPI3 SCK pin (PC.10) to SPI2 SCK pin (PB.13) + - Connect SPI3 MISO pin (PC.11) to SPI2 MISO pin (PB.14) + - Connect SPI3 MOSI pin (PC.12) to SPI2 MOSI pin (PB.15) + @note In this case SPI3 pins are remapped by software. + + - STM3210E-EVAL Set-up + - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13) + - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14) + - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15) + @note The jumper 14 (USB Disconnect) must be set in position 1<->2 in order + to not interfer with SPI2 MISO pin PB14. + + - STM3210B-EVAL Set-up + - Connect SPI1 SCK pin (PA.05) to SPI2 SCK pin (PB.13) + - Connect SPI1 MISO pin (PA.06) to SPI2 MISO pin (PB.14) + - Connect SPI1 MOSI pin (PA.07) to SPI2 MOSI pin (PB.15) + +@par How to use it ? + +In order to make the program work, you must do the following : + - Copy all source files from this example folder to the template folder under + Project\STM32F10x_StdPeriph_Template + - Open your preferred toolchain + - Rebuild all files and load your image into target memory + - Run the example + +@note + - Low-density Value line devices are STM32F100xx microcontrollers where the + Flash memory density ranges between 16 and 32 Kbytes. + - Low-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 16 and 32 Kbytes. + - Medium-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 64 and 128 Kbytes. + - Medium-density devices are STM32F101xx, STM32F102xx and STM32F103xx + microcontrollers where the Flash memory density ranges between 64 and 128 Kbytes. + - High-density Value line devices are STM32F100xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - High-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 256 and 512 Kbytes. + - XL-density devices are STM32F101xx and STM32F103xx microcontrollers where + the Flash memory density ranges between 512 and 1024 Kbytes. + - Connectivity line devices are STM32F105xx and STM32F107xx microcontrollers. + + * <h3><center>© COPYRIGHT 2011 STMicroelectronics</center></h3> + */ diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/stm32f10x_conf.h b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/stm32f10x_conf.h new file mode 100644 index 0000000..45a1e9c --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/stm32f10x_conf.h @@ -0,0 +1,78 @@ +/** + ****************************************************************************** + * @file SPI/FullDuplex_SoftNSS/stm32f10x_conf.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_CONF_H +#define __STM32F10x_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Uncomment/Comment the line below to enable/disable peripheral header file inclusion */ +#include "stm32f10x_adc.h" +#include "stm32f10x_bkp.h" +#include "stm32f10x_can.h" +#include "stm32f10x_cec.h" +#include "stm32f10x_crc.h" +#include "stm32f10x_dac.h" +#include "stm32f10x_dbgmcu.h" +#include "stm32f10x_dma.h" +#include "stm32f10x_exti.h" +#include "stm32f10x_flash.h" +#include "stm32f10x_fsmc.h" +#include "stm32f10x_gpio.h" +#include "stm32f10x_i2c.h" +#include "stm32f10x_iwdg.h" +#include "stm32f10x_pwr.h" +#include "stm32f10x_rcc.h" +#include "stm32f10x_rtc.h" +#include "stm32f10x_sdio.h" +#include "stm32f10x_spi.h" +#include "stm32f10x_tim.h" +#include "stm32f10x_usart.h" +#include "stm32f10x_wwdg.h" +#include "misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F10x_CONF_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/stm32f10x_it.c b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/stm32f10x_it.c new file mode 100644 index 0000000..4649493 --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/stm32f10x_it.c @@ -0,0 +1,159 @@ +/** + ****************************************************************************** + * @file SPI/FullDuplex_SoftNSS/stm32f10x_it.c + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and peripherals + * interrupt service routine. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x_it.h" + +/** @addtogroup STM32F10x_StdPeriph_Examples + * @{ + */ + +/** @addtogroup SPI_FullDuplex_SoftNSS + * @{ + */ + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************/ +/* Cortex-M3 Processor Exceptions Handlers */ +/******************************************************************************/ + +/** + * @brief This function handles NMI exception. + * @param None + * @retval None + */ +void NMI_Handler(void) +{ +} + +/** + * @brief This function handles Hard Fault exception. + * @param None + * @retval None + */ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + {} +} + +/** + * @brief This function handles Memory Manage exception. + * @param None + * @retval None + */ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + {} +} + +/** + * @brief This function handles Bus Fault exception. + * @param None + * @retval None + */ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + {} +} + +/** + * @brief This function handles Usage Fault exception. + * @param None + * @retval None + */ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + {} +} + +/** + * @brief This function handles Debug Monitor exception. + * @param None + * @retval None + */ +void DebugMon_Handler(void) +{} + +/** + * @brief This function handles SVCall exception. + * @param None + * @retval None + */ +void SVC_Handler(void) +{} + +/** + * @brief This function handles PendSV_Handler exception. + * @param None + * @retval None + */ +void PendSV_Handler(void) +{} + +/** + * @brief This function handles SysTick Handler. + * @param None + * @retval None + */ +void SysTick_Handler(void) +{} + +/******************************************************************************/ +/* STM32F10x Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32f10x_xx.s). */ +/******************************************************************************/ + +/** + * @brief This function handles PPP interrupt request. + * @param None + * @retval None + */ +/*void PPP_IRQHandler(void) +{ +}*/ + +/** + * @} + */ + +/** + * @} + */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/stm32f10x_it.h b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/stm32f10x_it.h new file mode 100644 index 0000000..50d395b --- /dev/null +++ b/thirdparty/STM32F10x_StdPeriph_Lib_V3.5.0/Project/STM32F10x_StdPeriph_Examples/SPI/FullDuplex_SoftNSS/stm32f10x_it.h @@ -0,0 +1,46 @@ +/** + ****************************************************************************** + * @file SPI/FullDuplex_SoftNSS/stm32f10x_it.h + * @author MCD Application Team + * @version V3.5.0 + * @date 08-April-2011 + * @brief This file contains the headers of the interrupt handlers. + ****************************************************************************** + * @attention + * + * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS + * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE + * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY + * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING + * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE + * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS. + * + * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2> + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F10x_IT_H +#define __STM32F10x_IT_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +void NMI_Handler(void); +void HardFault_Handler(void); +void MemManage_Handler(void); +void BusFault_Handler(void); +void UsageFault_Handler(void); +void SVC_Handler(void); +void DebugMon_Handler(void); +void PendSV_Handler(void); +void SysTick_Handler(void); + +#endif /* __STM32F10x_IT_H */ + +/******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/ |