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+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml">
+<head>
+<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
+<title>Introduction</title>
+<link href="tabs.css" rel="stylesheet" type="text/css"/>
+<link href="cmsis.css" rel="stylesheet" type="text/css" />
+<link href="navtree.css" rel="stylesheet" type="text/css"/>
+<script type="text/javascript" src="jquery.js"></script>
+<script type="text/javascript" src="resize.js"></script>
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+</script>
+
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+</head>
+<body>
+<div id="top"><!-- do not remove this div! -->
+
+<div id="titlearea">
+<table cellspacing="0" cellpadding="0">
+ <tbody>
+ <tr style="height: 46px;">
+ <td id="proglogo"><img alt="CMSIS Logo" src="CMSIS_Logo_Final.png"></td>
+
+ <td style="padding-left: 0.5em;">
+ <div id="projectname">CMSIS
+ &#160;<span id="projectnumber">Version 3.01</span>
+ </div>
+ <div id="projectbrief">Cortex Microcontroller Software Interface Standard</div>
+ </td>
+
+
+
+ </tr>
+ </tbody>
+</table>
+</div>
+
+<div id="CMSISnav" class="tabs1">
+ <ul class="tablist">
+ <li class="current"><a href="../../General/html/index.html"><span>CMSIS</span></a></li>
+ <li><a href="../../Core/html/index.html"><span>CORE</span></a></li>
+ <li><a href="../../DSP/html/index.html"><span>DSP</span></a></li>
+ <li><a href="../../RTOS/html/index.html"><span>RTOS API</span></a></li>
+ <li><a href="../../SVD/html/index.html"><span>SVD</span></a></li>
+ </ul>
+</div>
+<!-- Generated by Doxygen 1.7.5.1 -->
+ <div id="navrow1" class="tabs">
+ <ul class="tablist">
+ <li class="current"><a href="index.html"><span>Main&#160;Page</span></a></li>
+ </ul>
+ </div>
+</div>
+<div id="side-nav" class="ui-resizable side-nav-resizable">
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+ initNavTree('index.html','');
+</script>
+<div id="doc-content">
+<div class="header">
+ <div class="headertitle">
+<div class="title">Introduction </div> </div>
+</div>
+<div class="contents">
+<div class="textblock"><p>The <b>Cortex Microcontroller Software Interface Standard</b> (CMSIS) is a vendor-independent hardware abstraction layer for the Cortex-M processor series. The CMSIS enables consistent and simple software interfaces to the processor and the peripherals, simplifying software re-use, reducing the learning curve for microcontroller developers, and reducing the time to market for new devices.</p>
+<p>The CMSIS is defined in close cooperation with various silicon and software vendors and provides a common approach to interface to peripherals, real-time operating systems, and middleware components. The CMSIS is intended to enable the combination of software components from multiple middleware vendors.</p>
+<p>The CMSIS components are:</p>
+<ul>
+<li><a href="../../Core/html/index.html"><b>CMSIS-CORE</b></a>: API for the Cortex-M processor core and peripherals. It provides at standardized interface for Cortex-M0, Cortex-M3, Cortex-M4, SC000, and SC300. Included are also SIMD intrinsic functions for Cortex-M4 SIMD instructions.</li>
+</ul>
+<ul>
+<li><a href="../../DSP/html/index.html"><b>CMSIS-DSP</b></a>: DSP Library Collection with over 60 Functions for various data types: fix-point (fractional q7, q15, q31) and single precision floating-point (32-bit). The library is available for Cortex-M0, Cortex-M3, and Cortex-M4. The Cortex-M4 implementation is optimized for the SIMD instruction set.</li>
+</ul>
+<ul>
+<li><a href="../../RTOS/html/index.html"><b>CMSIS-RTOS API</b></a>: Common API for Real-Time operating systems. It provides a standardized programming interface that is portable to many RTOS and enables therefore software templates, middleware, libraries, and other components that can work acrosss supported the RTOS systems.</li>
+</ul>
+<ul>
+<li><a href="../../SVD/html/index.html"><b>CMSIS-SVD</b></a>: System View Description for Peripherals. Describes the peripherals of a device in an XML file and can be used to create peripheral awareness in debuggers or header files with peripheral register and interrupt definitions.</li>
+</ul>
+<div class="image">
+<img src="CMSIS_V3_small.png" alt="CMSIS_V3_small.png"/>
+<div class="caption">
+CMSIS Structure</div></div>
+ <h2><a class="anchor" id="Motivation"></a>
+Motivation</h2>
+<p>CMSIS has been created to help the industry in standardization. It is not a huge software layer that introduces overhead and does not define standard peripherals. The silicon industry can therefore support the wide variations of Cortex-M processor-based devices with this common standard. In detail the benefits of the CMSIS are:</p>
+<ul>
+<li>Consistent software interfaces improve the software portability and re-usability. Generic software libraries can interface with device libraries from various silicon vendors.</li>
+<li>Reduces the learning curve, development costs, and time-to-market. Developers can write software quicker through an easy to use and standardized software interface.</li>
+<li>Provides a compiler independent layer that allows using different compilers. CMSIS is supported by all mainstream compilers (ARMCC, IAR, and GNU).</li>
+<li>Enhances program debugging with peripheral information for debuggers and ITM channels for printf-style output and RTOS kernel awareness.</li>
+</ul>
+<h2><a class="anchor" id="CodingRules"></a>
+Coding Rules</h2>
+<p>The CMSIS uses the following essential coding rules and conventions:</p>
+<ul>
+<li>Compliant with ANSI C and C++.</li>
+<li>Uses ANSI C standard data types defined in <b>&lt;stdint.h&gt;</b>.</li>
+<li>Variables and parameters have a complete data type.</li>
+<li>Expressions for <em>#define</em> constants are enclosed in parenthesis.</li>
+<li>Conforms to MISRA 2004. MIRSA rule violations are documented.</li>
+</ul>
+<p>In addition, the CMSIS recommends the following conventions for identifiers:</p>
+<ul>
+<li><b>CAPITAL</b> names to identify Core Registers, Peripheral Registers, and CPU Instructions.</li>
+<li><b>CamelCase</b> names to identify function names and interrupt functions.</li>
+<li><b>Namespace_</b> prefixes avoid clashes with user identifiers and provide functional groups (i.e. for peripherals, RTOS, or DSP Library).</li>
+</ul>
+<p>The CMSIS is documented within the source files with: </p>
+<ul>
+<li>Comments that use the C or C++ style. </li>
+<li>Doxygen compliant <b>function comments</b> that provide:<ul>
+<li>brief function overview.</li>
+<li>detailed description of the function.</li>
+<li>detailed parameter explanation.</li>
+<li>detailed information about return values.</li>
+</ul>
+</li>
+</ul>
+<p>Doxygen comment example: </p>
+<div class="fragment"><pre class="fragment">
+/**
+ * @brief Enable Interrupt in NVIC Interrupt Controller
+ * @param IRQn interrupt number that specifies the interrupt
+ * @return none.
+ * Enable the specified interrupt in the NVIC Interrupt Controller.
+ * Other settings of the interrupt such as priority are not affected.
+ */
+</pre></div><h2><a class="anchor" id="License"></a>
+Licence</h2>
+<p>The CMSIS is provided free of charge by ARM and can be used for all Cortex-M based devices. View the <a href="..\..\..\CMSIS END USER LICENCE AGREEMENT.pdf">LICENCE AGREEMENT for CMSIS</a> in detail. </p>
+</div></div>
+</div>
+ <div id="nav-path" class="navpath">
+ <ul>
+
+ <li class="footer">Generated on Wed Mar 28 2012 15:38:10 for CMSIS by ARM Ltd. All rights reserved.
+ <!--
+ <a href="http://www.doxygen.org/index.html">
+ <img class="footer" src="doxygen.png" alt="doxygen"/></a> 1.7.5.1 </li>
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+</html>