diff options
Diffstat (limited to 'thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade')
56 files changed, 26119 insertions, 0 deletions
diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/MDK-ARM/DFU.uvproj b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/MDK-ARM/DFU.uvproj new file mode 100644 index 0000000..ea3a183 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/MDK-ARM/DFU.uvproj @@ -0,0 +1,13582 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_proj.xsd"> + + <SchemaVersion>1.1</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Targets> + <Target> + <TargetName>STM3210B-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <TargetCommonOption> + <Device>STM32F103VB</Device> + <Vendor>STMicroelectronics</Vendor> + <Cpu>IRAM(0x20000000-0x20004FFF) IROM(0x8000000-0x801FFFF) CLOCK(8000000) CPUTYPE("Cortex-M3")</Cpu> + <FlashUtilSpec></FlashUtilSpec> + <StartupFile>"STARTUP\ST\STM32F10x.s" ("STM32 Startup Code")</StartupFile> + <FlashDriverDll>UL2CM3(-O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_128 -FS08000000 -FL020000)</FlashDriverDll> + <DeviceId>4223</DeviceId> + <RegisterFile>stm32f10x_lib.h</RegisterFile> + <MemoryEnv></MemoryEnv> + <Cmp></Cmp> + <Asm></Asm> + <Linker></Linker> + <OHString></OHString> + <InfinionOptionDll></InfinionOptionDll> + <SLE66CMisc></SLE66CMisc> + <SLE66AMisc></SLE66AMisc> + <SLE66LinkerMisc></SLE66LinkerMisc> + <SFDFile></SFDFile> + <UseEnv>0</UseEnv> + <BinPath></BinPath> + <IncludePath></IncludePath> + <LibPath></LibPath> + <RegisterFilePath>ST\STM32F10x\</RegisterFilePath> + <DBRegisterFilePath>ST\STM32F10x\</DBRegisterFilePath> + <TargetStatus> + <Error>0</Error> + <ExitCodeStop>0</ExitCodeStop> + <ButtonStop>0</ButtonStop> + <NotGenerated>0</NotGenerated> + <InvalidFlash>1</InvalidFlash> + </TargetStatus> + <OutputDirectory>.\STM3210B-EVAL\</OutputDirectory> + <OutputName>STM3210B-EVAL</OutputName> + <CreateExecutable>1</CreateExecutable> + <CreateLib>0</CreateLib> + <CreateHexFile>0</CreateHexFile> + <DebugInformation>1</DebugInformation> + <BrowseInformation>0</BrowseInformation> + <ListingPath>.\STM3210B-EVAL\</ListingPath> + <HexFormatSelection>1</HexFormatSelection> + <Merge32K>0</Merge32K> + <CreateBatchFile>0</CreateBatchFile> + <BeforeCompile> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + <nStopU1X>0</nStopU1X> + <nStopU2X>0</nStopU2X> + </BeforeCompile> + <BeforeMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </BeforeMake> + <AfterMake> + <RunUserProg1>0</RunUserProg1> + <RunUserProg2>0</RunUserProg2> + <UserProg1Name></UserProg1Name> + <UserProg2Name></UserProg2Name> + <UserProg1Dos16Mode>0</UserProg1Dos16Mode> + <UserProg2Dos16Mode>0</UserProg2Dos16Mode> + </AfterMake> + <SelectedForBatchBuild>0</SelectedForBatchBuild> + <SVCSIdString></SVCSIdString> + </TargetCommonOption> + <CommonProperty> + <UseCPPCompiler>0</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>1</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>0</GenerateAssemblyFile> + <AssembleAssemblyFile>0</AssembleAssemblyFile> + <PublicsOnly>0</PublicsOnly> + <StopOnExitCode>3</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <DllOption> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDll>DARMSTM.DLL</SimDlgDll> + <SimDlgDllArguments>-pSTM32F103VB</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDll>TARMSTM.DLL</TargetDlgDll> + <TargetDlgDllArguments>-pSTM32F103VB</TargetDlgDllArguments> + </DllOption> + <DebugOption> + <OPTHX> + <HexSelection>1</HexSelection> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + <Oh166RecLen>16</Oh166RecLen> + </OPTHX> + <Simulator> + <UseSimulator>0</UseSimulator> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>1</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + <LimitSpeedToRealTime>0</LimitSpeedToRealTime> + </Simulator> + <Target> + <UseTarget>1</UseTarget> + <LoadApplicationAtStartup>1</LoadApplicationAtStartup> + <RunToMain>1</RunToMain> + <RestoreBreakpoints>1</RestoreBreakpoints> + <RestoreWatchpoints>1</RestoreWatchpoints> + <RestoreMemoryDisplay>1</RestoreMemoryDisplay> + <RestoreFunctions>0</RestoreFunctions> + <RestoreToolbox>1</RestoreToolbox> + </Target> + <RunDebugAfterBuild>0</RunDebugAfterBuild> + <TargetSelection>1</TargetSelection> + <SimDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + </SimDlls> + <TargetDlls> + <CpuDll></CpuDll> + <CpuDllArguments></CpuDllArguments> + <PeripheralDll></PeripheralDll> + <PeripheralDllArguments></PeripheralDllArguments> + <InitializationFile></InitializationFile> + <Driver>BIN\UL2CM3.DLL</Driver> + </TargetDlls> + </DebugOption> + <Utilities> + <Flash1> + <UseTargetDll>1</UseTargetDll> + <UseExternalTool>0</UseExternalTool> + <RunIndependent>0</RunIndependent> + <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging> + <Capability>1</Capability> + <DriverSelection>4096</DriverSelection> + </Flash1> + <Flash2>BIN\UL2CM3.DLL</Flash2> + <Flash3>"" ()</Flash3> + <Flash4></Flash4> + </Utilities> + <TargetArmAds> + <ArmAdsMisc> + <GenerateListings>0</GenerateListings> + <asHll>1</asHll> + <asAsm>1</asAsm> + <asMacX>1</asMacX> + <asSyms>1</asSyms> + <asFals>1</asFals> + <asDbgD>1</asDbgD> + <asForm>1</asForm> + <ldLst>0</ldLst> + <ldmm>1</ldmm> + <ldXref>1</ldXref> + <BigEnd>0</BigEnd> + <AdsALst>1</AdsALst> + <AdsACrf>1</AdsACrf> + <AdsANop>0</AdsANop> + <AdsANot>0</AdsANot> + <AdsLLst>1</AdsLLst> + <AdsLmap>1</AdsLmap> + <AdsLcgr>1</AdsLcgr> + <AdsLsym>1</AdsLsym> + <AdsLszi>1</AdsLszi> + <AdsLtoi>1</AdsLtoi> + <AdsLsun>1</AdsLsun> + <AdsLven>1</AdsLven> + <AdsLsxf>1</AdsLsxf> + <RvctClst>1</RvctClst> + <GenPPlst>0</GenPPlst> + <AdsCpuType>"Cortex-M3"</AdsCpuType> + <RvctDeviceName></RvctDeviceName> + <mOS>0</mOS> + <uocRom>0</uocRom> + <uocRam>0</uocRam> + <hadIROM>1</hadIROM> + <hadIRAM>1</hadIRAM> + <hadXRAM>0</hadXRAM> + <uocXRam>0</uocXRam> + <RvdsVP>0</RvdsVP> + <hadIRAM2>0</hadIRAM2> + <hadIROM2>0</hadIROM2> + <StupSel>8</StupSel> + <useUlib>1</useUlib> + <EndSel>0</EndSel> + <uLtcg>0</uLtcg> + <RoSelD>3</RoSelD> + <RwSelD>5</RwSelD> + <CodeSel>0</CodeSel> + <OptFeed>0</OptFeed> + <NoZi1>0</NoZi1> + <NoZi2>0</NoZi2> + <NoZi3>0</NoZi3> + <NoZi4>0</NoZi4> + <NoZi5>0</NoZi5> + <Ro1Chk>0</Ro1Chk> + <Ro2Chk>0</Ro2Chk> + <Ro3Chk>0</Ro3Chk> + <Ir1Chk>1</Ir1Chk> + <Ir2Chk>0</Ir2Chk> + <Ra1Chk>0</Ra1Chk> + <Ra2Chk>0</Ra2Chk> + <Ra3Chk>0</Ra3Chk> + <Im1Chk>1</Im1Chk> + <Im2Chk>0</Im2Chk> + <OnChipMemories> + <Ocm1> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm1> + <Ocm2> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm2> + <Ocm3> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm3> + <Ocm4> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm4> + <Ocm5> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm5> + <Ocm6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </Ocm6> + <IRAM> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </IRAM> + <IROM> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x20000</Size> + </IROM> + <XRAM> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </XRAM> + <OCR_RVCT1> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT1> + <OCR_RVCT2> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT2> + <OCR_RVCT3> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT3> + <OCR_RVCT4> + <Type>1</Type> + <StartAddress>0x8000000</StartAddress> + <Size>0x20000</Size> + </OCR_RVCT4> + <OCR_RVCT5> + <Type>1</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT5> + <OCR_RVCT6> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT6> + <OCR_RVCT7> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT7> + <OCR_RVCT8> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT8> + <OCR_RVCT9> + <Type>0</Type> + <StartAddress>0x20000000</StartAddress> + <Size>0x5000</Size> + </OCR_RVCT9> + <OCR_RVCT10> + <Type>0</Type> + <StartAddress>0x0</StartAddress> + <Size>0x0</Size> + </OCR_RVCT10> + </OnChipMemories> + <RvctStartVector></RvctStartVector> + </ArmAdsMisc> + <Cads> + <interw>1</interw> + <Optim>4</Optim> + <oTime>0</oTime> + <SplitLS>0</SplitLS> + <OneElfS>1</OneElfS> + <Strict>0</Strict> + <EnumInt>0</EnumInt> + <PlainCh>0</PlainCh> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <wLevel>2</wLevel> + <uThumb>0</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define>USE_STDPERIPH_DRIVER, STM32F10X_MD, USE_STM3210B_EVAL</Define> + <Undefine></Undefine> + <IncludePath>..\inc;..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Include;..\..\..\Libraries\STM32_USB-FS-Device_Driver\inc;..\..\..\Libraries\STM32F10x_StdPeriph_Driver\inc;..\..\..\Utilities\STM32_EVAL;..\..\..\Utilities\STM32_EVAL\Common;..\..\..\Utilities\STM32_EVAL\STM3210B_EVAL</IncludePath> + </VariousControls> + </Cads> + <Aads> + <interw>1</interw> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <thumb>0</thumb> + <SplitLS>0</SplitLS> + <SwStkChk>0</SwStkChk> + <NoWarn>0</NoWarn> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Aads> + <LDads> + <umfTarg>1</umfTarg> + <Ropi>0</Ropi> + <Rwpi>0</Rwpi> + <noStLib>0</noStLib> + <RepFail>1</RepFail> + <useFile>0</useFile> + <TextAddressRange>0x8000000</TextAddressRange> + <DataAddressRange>0x20000000</DataAddressRange> + <ScatterFile></ScatterFile> + <IncludeLibs></IncludeLibs> + <IncludeLibsPath></IncludeLibsPath> + <Misc></Misc> + <LinkerInputFile></LinkerInputFile> + <DisabledWarnings></DisabledWarnings> + </LDads> + </TargetArmAds> + </TargetOption> + <Groups> + <Group> + <GroupName>User</GroupName> + <Files> + <File> + <FileName>misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Libraries\STM32F10x_StdPeriph_Driver\src\misc.c</FilePath> + </File> + <File> + <FileName>stm32f37x_misc.c</FileName> + <FileType>1</FileType> + <FilePath>..\..\..\Libraries\STM32F37x_StdPeriph_Driver\src\stm32f37x_misc.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>dfu_mal.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\dfu_mal.c</FilePath> + </File> + <File> + <FileName>flash_if.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\flash_if.c</FilePath> + </File> + <File> + <FileName>fsmc_nor.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\fsmc_nor.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>2</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>hw_config.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\hw_config.c</FilePath> + </File> + <File> + <FileName>main.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\main.c</FilePath> + </File> + <File> + <FileName>nor_if.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\nor_if.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>2</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>spi_if.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\spi_if.c</FilePath> + </File> + <File> + <FileName>usb_desc.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_desc.c</FilePath> + </File> + <File> + <FileName>usb_istr.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_istr.c</FilePath> + </File> + <File> + <FileName>usb_prop.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_prop.c</FilePath> + </File> + <File> + <FileName>usb_pwr.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\usb_pwr.c</FilePath> + </File> + <File> + <FileName>stm32_it.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\stm32_it.c</FilePath> + </File> + </Files> + </Group> + <Group> + <GroupName>CMSIS</GroupName> + <Files> + <File> + <FileName>system_stm32f10x.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32f10x.c</FilePath> + </File> + <File> + <FileName>system_stm32l1xx.c</FileName> + <FileType>1</FileType> + <FilePath>..\src\system_stm32l1xx.c</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + <StopOnExitCode>11</StopOnExitCode> + <CustomArgument></CustomArgument> + <IncludeLibraryModules></IncludeLibraryModules> + </CommonProperty> + <FileArmAds> + <Cads> + <interw>2</interw> + <Optim>0</Optim> + <oTime>2</oTime> + <SplitLS>2</SplitLS> + <OneElfS>2</OneElfS> + <Strict>2</Strict> + <EnumInt>2</EnumInt> + <PlainCh>2</PlainCh> + <Ropi>2</Ropi> + <Rwpi>2</Rwpi> + <wLevel>0</wLevel> + <uThumb>2</uThumb> + <VariousControls> + <MiscControls></MiscControls> + <Define></Define> + <Undefine></Undefine> + <IncludePath></IncludePath> + </VariousControls> + </Cads> + </FileArmAds> + </FileOption> + </File> + <File> + <FileName>startup_stm32f10x_hd.s</FileName> + <FileType>2</FileType> + <FilePath>..\..\..\Libraries\CMSIS\Device\ST\STM32F10x\Source\Templates\arm\startup_stm32f10x_hd.s</FilePath> + <FileOption> + <CommonProperty> + <UseCPPCompiler>2</UseCPPCompiler> + <RVCTCodeConst>0</RVCTCodeConst> + <RVCTZI>0</RVCTZI> + <RVCTOtherData>0</RVCTOtherData> + <ModuleSelection>0</ModuleSelection> + <IncludeInBuild>0</IncludeInBuild> + <AlwaysBuild>0</AlwaysBuild> + <GenerateAssemblyFile>2</GenerateAssemblyFile> + <AssembleAssemblyFile>2</AssembleAssemblyFile> + <PublicsOnly>2</PublicsOnly> + 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+ <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/nor_if.c</locationURI> + </link> + <link> + <name>User/spi_if.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/spi_if.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/usb_pwr.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL/TASKING/STM32F10x_hd.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL/TASKING/STM32F10x_hd.lsl new file mode 100644 index 0000000..629bfcb --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM3210E-EVAL/TASKING/STM32F10x_hd.lsl @@ -0,0 +1,165 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 512k; + map ( size = 512k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 64k; + map ( size = 64k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); /* Reset Handler */ + vector( id = 2, optional, fill = "NMI_Handler" ); /* 2 Non Maskable Interrupt */ + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN_RX1_IRQHandler" ); // CAN RX1 + vector ( id = 38, optional, fill = "CAN_SCE_IRQHandler" ); // CAN SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/.cproject b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/.cproject new file mode 100644 index 0000000..9067ff3 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/.cproject @@ -0,0 +1,113 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<?fileVersion 4.0.0?> + +<cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage"> + <storageModule moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration 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Application" projectType="com.tasking.arm.target.abs"/> + </storageModule> + <storageModule moduleId="scannerConfiguration"> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/> + <scannerConfigBuildInfo instanceId="com.tasking.config.arm.abs.release.1258418627;com.tasking.config.arm.abs.release.1258418627."> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.tasking.arm.TskARMScannerInfo"/> + </scannerConfigBuildInfo> + <scannerConfigBuildInfo instanceId="com.tasking.config.arm.abs.debug.2044455393;com.tasking.config.arm.abs.debug.2044455393."> + <autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.tasking.arm.TskARMScannerInfo"/> + </scannerConfigBuildInfo> + </storageModule> + <storageModule moduleId="org.eclipse.cdt.core.language.mapping"> + <project-mappings> + <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cHeader" language="com.tasking.arm.clanguage"/> + <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cSource" language="com.tasking.arm.clanguage"/> + <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxHeader" language="com.tasking.arm.cpplanguage"/> + <content-type-mapping configuration="" content-type="org.eclipse.cdt.core.cxxSource" language="com.tasking.arm.cpplanguage"/> + </project-mappings> + </storageModule> + <storageModule moduleId="refreshScope" versionNumber="1"> + <resource resourceType="PROJECT" workspacePath="/STM3210B-EVAL"/> + </storageModule> +</cproject> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/STM32303C_EVAL.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/STM32303C_EVAL.launch new file mode 100644 index 0000000..80853f0 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/STM32303C_EVAL.launch @@ -0,0 +1,41 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> +<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="ST-LINK over USB (SWD)"/> +<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> +<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/> +<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM32303C-Eval board"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32f10x.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="SWD"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> +<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM32303C_EVAL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32303C_EVAL"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32303C_EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/TASKING/stm32f30x.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/TASKING/stm32f30x.lsl new file mode 100644 index 0000000..3ccf590 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32303C_EVAL/TASKING/stm32f30x.lsl @@ -0,0 +1,211 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f30x.lsl +// +// Version : @(#)stm32f30x.lsl 1.1 12/07/27 +// +// Description : LSL file for the STMicroelectronics STM32F30x +// +// Copyright 2012 Altium BV +// +// Macros specific to control this LSL file +// +// __MEMORY Define this macro to suppress definition of on-chip +// memory. Must be defined when you want to define on-chip +// in your project's LSL file. +// __FLASH_SIZE Specifies the size of flash memory to be allocated +// __SRAM_SIZE Specifies the size of the SRAM memory to be allocated +// __NO_DEFAULT_AUTO_VECTORS +// When enabled the interrupt vector table will not be +// generated +// __VECTOR_TABLE_RAM_COPY +// Define this macro to enable copying the vector table +// at startup from ROM to RAM. +// __VECTOR_TABLE_ROM_ADDR +// Specify the vector table address in ROM +// __VECTOR_TABLE_RAM_ADDR +// Specify the vector table address in RAM when the the +// it is copied from ROM to RAM (__VECTOR_TABLE_RAM_COPY) +// +// See arm_arch.lsl for more available macros. +// +// Notes: +// In the STM32F30x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +//////////////////////////////////////////////////////////////////////////// + +#ifndef __NO_DEFAULT_AUTO_VECTORS +// Suppress the vectors as defined arm_arch.lsl, because we define our +// own vectors for CMSIS +#define __CMSIS_VECTORS 1 +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 98 +#endif + +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif + +#ifndef __VECTOR_TABLE_RAM_ADDR +# define __VECTOR_TABLE_RAM_ADDR 0x20000000 +#endif + + +#ifndef __STACK +# define __STACK 6k +#endif + +#ifndef __HEAP +# define __HEAP 2k +#endif + +#include <arm_arch.lsl> + +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +// Specify default size for Flash and SRAM +#ifndef __FLASH_SIZE +# define __FLASH_SIZE 256k +#endif +#ifndef __SRAM_SIZE +# define __SRAM_SIZE 48k +#endif + +memory STM32F30x_Flash +{ + mau = 8; + type = rom; + size = __FLASH_SIZE; + map ( size = __FLASH_SIZE, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory STM32F30x_SRAM +{ + mau = 8; + type = ram; + size = __SRAM_SIZE; + priority = 2; + map ( size = __SRAM_SIZE - 8k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +memory STM32F30x_SRAM8k +{ + mau = 8; + type = ram; + size = 8k; + priority = 1; + map ( size = 8k, dest_offset=0x10000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Define the vector table for CMSIS +// +#ifdef __CMSIS_VECTORS +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_RUN_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + __VECTOR_TABLE_COPY_ATTRIBUTE + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); // Reset Handler + vector ( id = 2, optional, fill = "NMI_Handler" ); // NMI Handler + vector ( id = 3, optional, fill = "HardFault_Handler" ); // Hard Fault Handler + vector ( id = 4, optional, fill = "MemManage_Handler" ); // MPU Fault Handler + vector ( id = 5, optional, fill = "BusFault_Handler" ); // Bus Fault Handler + vector ( id = 6, optional, fill = "UsageFault_Handler" ); // Usage Fault Handler + vector ( id = 11, optional, fill = "SVC_Handler" ); // SVCall Handler + vector ( id = 12, optional, fill = "DebugMon_Handler" ); // Debug Monitor Handler + vector ( id = 14, optional, fill = "PendSV_Handler" ); // PendSV Handler + vector ( id = 15, optional, fill = "SysTick_Handler" ); // SysTick Handler + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandler" ); // Tamper amd TimeStanp through EXTI + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC Wakeup through the EXTI line + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash global interrupt + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC global interrupt + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 interrupt + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 interrupt + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 interrupt + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 interrupt + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 interrupt + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA1 Channel 1 global interrupt + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA1 Channel 2 global interrupt + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA1 Channel 3 global interrupt + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA1 Channel 4 global interrupt + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA1 Channel 5 global interrupt + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA1 Channel 6 global interrupt + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA1 Channel 7 global interrupt + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 global interrupts + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB Device High Priority or CAN1 TX interrupts + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB Device Low Priority or CAN1 RX0 interrupts + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 interrupt + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE interrupt + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 interrupts + vector ( id = 40, optional, fill = "TIM1_BRK_TIM15_IRQHandler" ); // TIM1 Break irq and TIM15 global interrupt + vector ( id = 41, optional, fill = "TIM1_UP_TIM16_IRQHandler" ); // TIM1 Update irq and TIM16 global interrupt + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM17_IRQHandler" ); // TIM1 Trigger and Commutation irqs and TIM17 global irq + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 global interrupt + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 global interrupt + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 global interrupt + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 global interrupt + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 global interrupt + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 global interrupt + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 global interrupt + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 global interrupt + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 interrupts + vector ( id = 57, optional, fill = "RTC_Alarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup interrupt + vector ( id = 59, optional, fill = "TIM8_BRK_IRQHandler" ); // TIM8 Break interrupt + vector ( id = 60, optional, fill = "TIM8_UP_IRQHandler" ); // TIM8 Update interrupt + vector ( id = 61, optional, fill = "TIM8_TRG_COM_IRQHandler" ); // TIM8 trigger and Comm. interrupt + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare interrupt + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 global interrupt + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 global interrupt + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 global interrupt + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 global interrupt + vector ( id = 70, optional, fill = "TIM6_DAC_IRQHandler" ); // TIM6 glbl irq, DAC1 and DAC2 underrun err irqs + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 global interrupt + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel 1 global interrupt + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel 2 global interrupt + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel 3 global interrupt + vector ( id = 75, optional, fill = "DMA2_Channel4_IRQHandler" ); // DMA2 Channel 4 global interrupt + vector ( id = 76, optional, fill = "DMA2_Channel5_IRQHandler" ); // DMA2 Channel 5 global interrupt + vector ( id = 77, optional, fill = "ADC4_IRQHandler" ); // ADC4 global interrupt + vector ( id = 80, optional, fill = "COMP1_2_3_IRQHandler" ); // COMP1, COMP2 and COMP3 global interrupt + vector ( id = 81, optional, fill = "COMP4_5_6_IRQHandler" ); // COMP5, COMP6 and COMP4 global interrupt + vector ( id = 82, optional, fill = "COMP7_IRQHandler" ); // COMP7 global interrupt + vector ( id = 90, optional, fill = "USB_HP_IRQHandler" ); // USB High Priority global Interrupt remap + vector ( id = 91, optional, fill = "USB_LP_IRQHandler" ); // USB Low Priority global Interrupt remap + vector ( id = 92, optional, fill = "USBWakeUp_RMP_IRQHandler" ); // USB Wakeup Interrupt remap + vector ( id = 97, optional, fill = "FPU_IRQHandler" ); // Floating point Interrupt + } +} +#endif /* __CMSIS_VECTORS */ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152-EVAL/STM32L152-EVAL.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152-EVAL/STM32L152-EVAL.launch new file mode 100644 index 0000000..d494039 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152-EVAL/STM32L152-EVAL.launch @@ -0,0 +1,44 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> +<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="J-Link over USB (JTAG)"/> +<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> +<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/> +<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.HISTORY_BUFFER_ENABLED" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.PSM_ENABLED" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM32L152-EVAL"/> +<booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="dijlinkarm"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_mirror_address" value="0x0"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32l1xx.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_sector_buffer_size" value="4096"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="JTAG"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> +<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM32L152-EVAL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32L152-EVAL"/> +<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32L152-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152-EVAL/TASKING/stm32l1xx_md.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152-EVAL/TASKING/stm32l1xx_md.lsl new file mode 100644 index 0000000..909c5b0 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152-EVAL/TASKING/stm32l1xx_md.lsl @@ -0,0 +1,151 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32l1xx_cmsis.lsl +// +// Version : @(#)stm32l1xx_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32l1xx.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 84 + + +#ifndef __STACK +# define __STACK 2k +#endif +#ifndef __HEAP +# define __HEAP 1k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08000000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32L1xx, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32l1xflash +{ + mau = 8; + type = rom; + size = 128k; + map ( size = 128k, dest_offset=0x08000000, dest=bus:ARM:local_bus); +} + +memory stm32l1xram +{ + mau = 8; + type = ram; + size = 16k; + map ( size = 16k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_STAMP_IRQHandle" ); // Tamper + vector ( id = 19, optional, fill = "RTC_WKUP_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_IRQHandler" ); // ADC1_IRQHandler + vector ( id = 35, optional, fill = "USB_HP_IRQHandler" ); // USB_HP_IRQHandler + vector ( id = 36, optional, fill = "USB_LP_IRQHandler" ); // USB_LP_IRQHandler + vector ( id = 37, optional, fill = "DAC_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "COMP_IRQHandler" ); // COMP_IRQHandler + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "LCD_IRQHandler" ); // LCD_IRQHandler + vector ( id = 41, optional, fill = "TIM9_IRQHandler" ); // TIM9_IRQHandler + vector ( id = 42, optional, fill = "TIM10_IRQHandler" ); // TIM10_IRQHandler + vector ( id = 43, optional, fill = "TIM11_IRQHandler" ); // TIM11_IRQHandler + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USB_FS_WKUP_IRQHandler" ); // USB_FS_WKUP_IRQHandler + vector ( id = 59, optional, fill = "TIM6_IRQHandler" ); // TIM6_IRQHandler + vector ( id = 60, optional, fill = "TIM7_IRQHandler" ); // TIM7_IRQHandler + + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152D-EVAL/STM32L152D-EVAL.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152D-EVAL/STM32L152D-EVAL.launch new file mode 100644 index 0000000..26462e6 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TASKING/STM32L152D-EVAL/STM32L152D-EVAL.launch @@ -0,0 +1,48 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> +<booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="ST-LINK over USB (SWD)"/> +<stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> +<stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/> +<stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.HISTORY_BUFFER_ENABLED" value="false"/> +<stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> +<booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.PSM_ENABLED" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> +<stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM32L152D-EVAL"/> +<booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> +<booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> +<booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> +<stringAttribute key="debugger_configuration.debug_instrument_module" value="distlink"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_mirror_address" value="0x0"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32l1xx.sre"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_sector_buffer_size" value="4096"/> +<stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> +<stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="SWD"/> +<stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> +<stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> +<booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> +<booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM32L152D-EVAL.abs"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32L152D-EVAL"/> +<booleanAttribute key="org.eclipse.cdt.launch.use_terminal" value="true"/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32L152D-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/.project new file mode 100644 index 0000000..fe42185 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/.project @@ -0,0 +1,251 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM3210B-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210B-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM3210B_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f10x.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/readme.txt</locationURI> + </link> + <link> + <name>STM3210B_EVAL/stm3210b_eval.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM3210B_EVAL/stm3210b_eval.c</locationURI> + </link> + <link> + <name>STM3210B_EVAL/stm3210b_eval_spi_flash.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM3210B_EVAL/stm3210b_eval_spi_flash.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_exti.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_flash.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_fsmc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_spi.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_usart.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f10x_md.s</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F10x/Source/Templates/TrueSTUDIO/startup_stm32f10x_md.s</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_core.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_core.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_init.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_init.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_int.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_mem.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_regs.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/dfu_mal.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/dfu_mal.c</locationURI> + </link> + <link> + <name>User/flash_if.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/flash_if.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/main.c</locationURI> + </link> + <link> + <name>User/spi_if.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/spi_if.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_pwr.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/STM3210B-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/STM3210B-EVAL.elf.launch new file mode 100644 index 0000000..5de1fe7 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210B-EVAL/STM3210B-EVAL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next 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key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="C:\VSS\BARRACUDA\INTRODUCTION PACKAGE\FIRMWARE\STM32_USB-FS-Device_Lib\Project\Device_Firmware_Upgrade\TrueSTUDIO\STM3210B-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM3210B-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210B-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210B-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL/STM3210E-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL/STM3210E-EVAL.elf.launch new file mode 100644 index 0000000..3941758 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL/STM3210E-EVAL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Reset to known state monitor reset # Start the executable. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="8"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="8000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="C:\VSS\BARRACUDA\INTRODUCTION PACKAGE\FIRMWARE\STM32_USB-FS-Device_Lib\Project\Device_Firmware_Upgrade\TrueSTUDIO\STM3210E-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM3210E-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM3210E-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM3210E-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/stm32_flash.ld new file mode 100644 index 0000000..b1c6965 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM3210E-EVAL_XL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F103ZG Device with +** 1MByte FLASH, 96KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20018000; /* end of 96K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x800; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1M + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes 0 : { *(.ARM.attributes) } + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32303C-EVAL/.project b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32303C-EVAL/.project new file mode 100644 index 0000000..39521cb --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32303C-EVAL/.project @@ -0,0 +1,315 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32303C-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?children?</key> + <value>?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\||</value> + </dictionary> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210E-EVAL/Debug}</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.contents</key> + <value>org.eclipse.cdt.make.core.activeConfigSettings</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableAutoBuild</key> + <value>false</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableCleanBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.enableFullBuild</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.stopOnError</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key> + <value>true</value> + </dictionary> + </arguments> + </buildCommand> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name> + <arguments> + </arguments> + </buildCommand> + </buildSpec> + <natures> + <nature>org.eclipse.cdt.core.cnature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature> + <nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature> + </natures> + <linkedResources> + <link> + <name>CMSIS</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>Doc</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32303C_EVAL</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>TrueSTUDIO</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f30x.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/system_stm32f30x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Custom_HID/readme.txt</locationURI> + </link> + <link> + <name>STM32303C_EVAL/stm32303c_eval.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Utilities/STM32_EVAL/STM32303C_EVAL/stm32303c_eval.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_adc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_adc.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_can.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_can.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_comp.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_comp.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_crc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_crc.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_dac.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_dac.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_dbgmcu.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_dbgmcu.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_dma.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_dma.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_exti.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_exti.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_flash.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_flash.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_gpio.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_i2c.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32F30x_StdPeriph_Driver/src/stm32f30x_i2c.c</locationURI> + </link> + <link> + <name>STM32F37x_StdPeriph_Driver/stm32f30x_iwdg.c</name> + <type>1</type> + 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b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152D-EVAL/.project @@ -0,0 +1,246 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM32L152D-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildArguments</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildCommand</key> + <value>make</value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.buildLocation</key> + <value>${workspace_loc:/STM3210B-EVAL/Debug}</value> + </dictionary> + <dictionary> + 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<locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_int.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_mem.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_mem.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_regs.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_regs.c</locationURI> + </link> + <link> + <name>USB-FS-Device_Driver/usb_sil.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Libraries/STM32_USB-FS-Device_Driver/src/usb_sil.c</locationURI> + </link> + <link> + <name>User/dfu_mal.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/dfu_mal.c</locationURI> + </link> + <link> + <name>User/flash_if.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/flash_if.c</locationURI> + </link> + <link> + <name>User/hw_config.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/hw_config.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/stm32_it.c</locationURI> + </link> + <link> + <name>User/usb_desc.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_desc.c</locationURI> + </link> + <link> + <name>User/usb_istr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_istr.c</locationURI> + </link> + <link> + <name>User/usb_prop.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_prop.c</locationURI> + </link> + <link> + <name>User/usb_pwr.c</name> + <type>1</type> + <locationURI>PARENT-4-PROJECT_LOC/Projects/Device_Firmware_Upgrade/src/usb_pwr.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152D-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152D-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs new file mode 100644 index 0000000..fa650d6 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/TrueSTUDIO/STM32L152D-EVAL/.settings/com.atollic.truestudio.debug.hardware_device.prefs @@ -0,0 +1,12 @@ +#Mon Mar 19 11:48:58 GMT+01:00 2012 +BOARD=STM32L152D-EVAL +CODE_LOCATION=FLASH +ENDIAN=Little-endian +MCU=STM32L152ZD +MCU_VENDOR=STMicroelectronics +MODEL=Lite +PROBE=ST-LINK +PROJECT_FORMAT_VERSION=2 +TARGET=STMicroelectronics\u00AE STM32\u2122 +VERSION=2.3.0 +eclipse.preferences.version=1 diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32f37x_flash_offset.icf b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32f37x_flash_offset.icf new file mode 100644 index 0000000..5403956 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/EWARM/stm32f37x_flash_offset.icf @@ -0,0 +1,33 @@ +/*###ICF### Section handled by ICF editor, don't touch! ****/ +/*-Editor annotation file-*/ +/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ +/*-Specials-*/ +define symbol __ICFEDIT_intvec_start__ = 0x08003000; +/*-Memory Regions-*/ +define symbol __ICFEDIT_region_ROM_start__ = 0x08003000; +define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF; +define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; +define symbol __ICFEDIT_region_RAM_end__ = 0x20007FFF; +/*-Sizes-*/ +define symbol __ICFEDIT_size_cstack__ = 0x1800; +define symbol __ICFEDIT_size_heap__ = 0x800; +/**** End of ICF editor section. ###ICF###*/ + + +define memory mem with size = 4G; +define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; +define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; +export symbol __ICFEDIT_region_RAM_start__; +export symbol __ICFEDIT_region_RAM_end__; + +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; + +place in ROM_region { readonly }; +place in RAM_region { readwrite, + block CSTACK, block HEAP };
\ No newline at end of file diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/MDK-ARM/SysTick.uvopt b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/MDK-ARM/SysTick.uvopt new file mode 100644 index 0000000..c128f99 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/MDK-ARM/SysTick.uvopt @@ -0,0 +1,2356 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd"> + + <SchemaVersion>1.0</SchemaVersion> + + <Header>### uVision Project, (C) Keil Software</Header> + + <Extensions> + <cExt>*.c</cExt> + <aExt>*.s*; *.src; *.a*</aExt> + <oExt>*.obj</oExt> + <lExt>*.lib</lExt> + <tExt>*.txt; *.h; *.inc</tExt> + <pExt>*.plm</pExt> + <CppX>*.cpp</CppX> + </Extensions> + + <DaveTm> + <dwLowDateTime>0</dwLowDateTime> + <dwHighDateTime>0</dwHighDateTime> + </DaveTm> + + <Target> + <TargetName>STM3210B-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>0</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM3210B-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>1</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103VB</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103VB</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + 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<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UM0015BJE -O2190 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -N01("Unknown JTAG device") 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<LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM3210E-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>0</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM3210E-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103ZE</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103ZE</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + 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<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UM0015BJE -O2190 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -N01("Unknown JTAG device") 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<HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM3210E-EVAL_XL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Reference Manual</Title> + <Path>DATASHTS\ST\STM32F10xxx.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pSTM32F103ZG</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pSTM32F103ZG</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + 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<Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UM0015BJE -O142 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06416041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F10x_1024 -FS08000000 -FL0100000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint> + <Bp> + <Number>0</Number> + <Type>0</Type> + <LineNumber>144</LineNumber> + <EnabledFlag>1</EnabledFlag> + <Address>134218958</Address> + <ByteObject>0</ByteObject> + <HtxType>0</HtxType> + <ManyObjects>0</ManyObjects> + <SizeOfObject>0</SizeOfObject> + <BreakByAccess>0</BreakByAccess> + <BreakIfRCount>1</BreakIfRCount> + <Filename>stm32f10x_it.c</Filename> + <ExecCommand></ExecCommand> + <Expression></Expression> + </Bp> + </Breakpoint> + <MemoryWindow1> + <Mm> + <WinNumber>1</WinNumber> + <SubType>2</SubType> + <ItemText>0x20000000</ItemText> + </Mm> + </MemoryWindow1> + <MemoryWindow2> + <Mm> + <WinNumber>2</WinNumber> + <SubType>2</SubType> + <ItemText>0x8000000</ItemText> + </Mm> + </MemoryWindow2> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>1</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32L152-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>0</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32L152-EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Datasheet</Title> + <Path>DATASHTS\ST\STM32L151xx_152xx_DS.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DCM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TCM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(111=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(180=-1,-1,-1,-1,0)(120=-1,-1,-1,-1,0)(121=-1,-1,-1,-1,0)(122=-1,-1,-1,-1,0)(123=-1,-1,-1,-1,0)(124=-1,-1,-1,-1,0)(140=-1,-1,-1,-1,0)(240=-1,-1,-1,-1,0)(190=-1,-1,-1,-1,0)(200=-1,-1,-1,-1,0)(170=-1,-1,-1,-1,0)(130=-1,-1,-1,-1,0)(131=-1,-1,-1,-1,0)(132=-1,-1,-1,-1,0)(133=-1,-1,-1,-1,0)(160=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(210=-1,-1,-1,-1,0)(211=-1,-1,-1,-1,0)(220=-1,-1,-1,-1,0)(221=-1,-1,-1,-1,0)(230=-1,-1,-1,-1,0)(231=-1,-1,-1,-1,0)(232=-1,-1,-1,-1,0)(233=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UM0015BJE -O142 -S0 -C0 -N00("ARM CoreSight JTAG-DP") -D00(4BA00477) -L00(4) -N01("Unknown JTAG device") -D01(06416041) -L01(5) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint> + <Bp> + <Number>0</Number> + <Type>0</Type> + <LineNumber>144</LineNumber> + <EnabledFlag>1</EnabledFlag> + <Address>134218958</Address> + <ByteObject>0</ByteObject> + <HtxType>0</HtxType> + <ManyObjects>0</ManyObjects> + <SizeOfObject>0</SizeOfObject> + <BreakByAccess>0</BreakByAccess> + <BreakIfRCount>1</BreakIfRCount> + <Filename>stm32f10x_it.c</Filename> + <ExecCommand></ExecCommand> + <Expression></Expression> + </Bp> + </Breakpoint> + <MemoryWindow1> + <Mm> + <WinNumber>1</WinNumber> + <SubType>2</SubType> + <ItemText>0x20000000</ItemText> + </Mm> + </MemoryWindow1> + <MemoryWindow2> + <Mm> + <WinNumber>2</WinNumber> + <SubType>2</SubType> + <ItemText>0x8000000</ItemText> + </Mm> + </MemoryWindow2> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>1</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32L152D-EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>0</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32L152D_EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>255</CpuCode> + <Books> + <Book> + <Number>0</Number> + <Title>Datasheet</Title> + <Path>DATASHTS\ST\STM32L162xx_DS.PDF</Path> + </Book> + </Books> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments>-MPU</SimDllArguments> + <SimDlgDllName>DCM.DLL</SimDlgDllName> + <SimDlgDllArguments>-pCM3</SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments>-MPU</TargetDllArguments> + <TargetDlgDllName>TCM.DLL</TargetDlgDllName> + <TargetDlgDllArguments>-pCM3</TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-UV0579U9E -O2254 -S0 -C0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FC800 -FN1 -FF0STM32L15x_128 -FS08000000 -FL020000</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <MemoryWindow1> + <Mm> + <WinNumber>1</WinNumber> + <SubType>2</SubType> + <ItemText>0x20000000</ItemText> + </Mm> + </MemoryWindow1> + <MemoryWindow2> + <Mm> + <WinNumber>2</WinNumber> + <SubType>2</SubType> + <ItemText>0x8000000</ItemText> + </Mm> + </MemoryWindow2> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>1</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32373C_EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + <CLKADS>8000000</CLKADS> + <OPTTT> + <gFlags>1</gFlags> + <BeepAtEnd>0</BeepAtEnd> + <RunSim>1</RunSim> + <RunTarget>0</RunTarget> + </OPTTT> + <OPTHX> + <HexSelection>1</HexSelection> + <FlashByte>65535</FlashByte> + <HexRangeLowAddress>0</HexRangeLowAddress> + <HexRangeHighAddress>0</HexRangeHighAddress> + <HexOffset>0</HexOffset> + </OPTHX> + <OPTLEX> + <PageWidth>79</PageWidth> + <PageLength>66</PageLength> + <TabStop>8</TabStop> + <ListingPath>.\STM32373C_EVAL\</ListingPath> + </OPTLEX> + <ListingPage> + <CreateCListing>1</CreateCListing> + <CreateAListing>1</CreateAListing> + <CreateLListing>1</CreateLListing> + <CreateIListing>0</CreateIListing> + <AsmCond>1</AsmCond> + <AsmSymb>1</AsmSymb> + <AsmXref>0</AsmXref> + <CCond>1</CCond> + <CCode>0</CCode> + <CListInc>0</CListInc> + <CSymb>0</CSymb> + <LinkerCodeListing>0</LinkerCodeListing> + </ListingPage> + <OPTXL> + <LMap>1</LMap> + <LComments>1</LComments> + <LGenerateSymbols>1</LGenerateSymbols> + <LLibSym>1</LLibSym> + <LLines>1</LLines> + <LLocSym>1</LLocSym> + <LPubSym>1</LPubSym> + <LXref>0</LXref> + <LExpSel>0</LExpSel> + </OPTXL> + <OPTFL> + <tvExp>1</tvExp> + <tvExpOptDlg>0</tvExpOptDlg> + <IsCurrentTarget>0</IsCurrentTarget> + </OPTFL> + <CpuCode>0</CpuCode> + <DllOpt> + <SimDllName>SARMCM3.DLL</SimDllName> + <SimDllArguments></SimDllArguments> + <SimDlgDllName>DARMSTM.DLL</SimDlgDllName> + <SimDlgDllArguments></SimDlgDllArguments> + <TargetDllName>SARMCM3.DLL</TargetDllName> + <TargetDllArguments></TargetDllArguments> + <TargetDlgDllName>TARMSTM.DLL</TargetDlgDllName> + <TargetDlgDllArguments></TargetDlgDllArguments> + </DllOpt> + <DebugOpt> + <uSim>0</uSim> + <uTrg>1</uTrg> + <sLdApp>1</sLdApp> + <sGomain>1</sGomain> + <sRbreak>1</sRbreak> + <sRwatch>1</sRwatch> + <sRmem>1</sRmem> + <sRfunc>1</sRfunc> + <sRbox>1</sRbox> + <tLdApp>1</tLdApp> + <tGomain>1</tGomain> + <tRbreak>1</tRbreak> + <tRwatch>1</tRwatch> + <tRmem>1</tRmem> + <tRfunc>0</tRfunc> + <tRbox>1</tRbox> + <sRunDeb>0</sRunDeb> + <sLrtime>0</sLrtime> + <nTsel>1</nTsel> + <sDll></sDll> + <sDllPa></sDllPa> + <sDlgDll></sDlgDll> + <sDlgPa></sDlgPa> + <sIfile></sIfile> + <tDll></tDll> + <tDllPa></tDllPa> + <tDlgDll></tDlgDll> + <tDlgPa></tDlgPa> + <tIfile></tIfile> + <pMon>BIN\UL2CM3.DLL</pMon> + </DebugOpt> + <TargetDriverDllRegistry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGUARM</Key> + <Name>(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>DLGTARM</Key> + <Name>(1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)</Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>ARMDBGFLAGS</Key> + <Name></Name> + </SetRegEntry> + <SetRegEntry> + <Number>0</Number> + <Key>UL2CM3</Key> + <Name>-O14 -S0 -C0 -N00("ARM Cortex-M4") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0STM32F3xx_256 -FS08000000 -FL040000)</Name> + </SetRegEntry> + </TargetDriverDllRegistry> + <Breakpoint/> + <MemoryWindow1> + <Mm> + <WinNumber>1</WinNumber> + <SubType>2</SubType> + <ItemText>0x20000000</ItemText> + </Mm> + </MemoryWindow1> + <MemoryWindow2> + <Mm> + <WinNumber>2</WinNumber> + <SubType>2</SubType> + <ItemText>0x8000000</ItemText> + </Mm> + </MemoryWindow2> + <DebugFlag> + <trace>0</trace> + <periodic>0</periodic> + <aLwin>1</aLwin> + <aCover>0</aCover> + <aSer1>0</aSer1> + <aSer2>0</aSer2> + <aPa>0</aPa> + <viewmode>1</viewmode> + <vrSel>0</vrSel> + <aSym>0</aSym> + <aTbox>0</aTbox> + <AscS1>0</AscS1> + <AscS2>0</AscS2> + <AscS3>0</AscS3> + <aSer3>0</aSer3> + <eProf>0</eProf> + <aLa>0</aLa> + <aPa1>0</aPa1> + <AscS4>0</AscS4> + <aSer4>0</aSer4> + <StkLoc>0</StkLoc> + <TrcWin>0</TrcWin> + <newCpu>0</newCpu> + <uProt>0</uProt> + </DebugFlag> + <LintExecutable></LintExecutable> + <LintConfigFile></LintConfigFile> + </TargetOption> + </Target> + + <Target> + <TargetName>STM32303C_EVAL</TargetName> + <ToolsetNumber>0x4</ToolsetNumber> + <ToolsetName>ARM-ADS</ToolsetName> + <TargetOption> + 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Value="$(ApplicationDir)\stm32l1xx_md_flash_offset.ld" Removable="1" /> + + </Section> + + </Set> + </Config> + <Config Header="STM32L152D-EVAL" > + <Set Header="Target" > + <Section Header="ToolSetARM" > + <Property Header="BuildToolSetARM" Value="ARM\GNU.config" /> + + </Section> + <Section Header="ProcessorARM" > + <Property Header="Processor" Value="STM32L152ZD" /> + + </Section> + + </Set> + <Set Header="ApplicationBuild" > + <Section Header="Directories" > + <Property Header="IncDir" Value="..\inc;..\..\..\..\Libraries\CMSIS\Include;..\..\..\..\Libraries\CMSIS\Device\ST\STM32L1xx\Include;..\..\..\..\Libraries\STM32L1xx_StdPeriph_Driver\inc;..\..\..\..\Utilities\STM32_EVAL\STM32L152D_EVAL;..\..\..\..\Utilities\STM32_EVAL\Common" Removable="1" /> + <Property Header="OutDir" Value="$(ApplicationDir)\STM32L152D_EVAL" Removable="1" /> + <Property Header="ListDir" Value="$(ApplicationDir)\STM32L152D_EVAL" Removable="1" /> + + </Section> + + </Set> + <Set Header="GCC" > + <Section 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</Set> + <Set Header="ApplicationBuild" > + <Section Header="Directories" > + <Property Header="IncDir" Value="..\inc;..\..\..\..\Libraries\CMSIS\Include;..\..\..\..\Libraries\STM32F37x_StdPeriph_Driver\inc;..\..\..\..\Utilities\STM32_EVAL;..\..\..\..\Utilities\STM32_EVAL\STM32373C_EVAL;..\..\..\..\Libraries\CMSIS\Device\ST\STM32F37x\Include;..\..\..\..\Utilities\STM32_EVAL\Common" Removable="1" /> + <Property Header="OutDir" Value="$(ApplicationDir)\STM32F373C_EVAL" Removable="1" /> + <Property Header="ListDir" Value="$(ApplicationDir)\STM32F373C_EVAL" Removable="1" /> + + </Section> + + </Set> + <Set Header="GCC" > + <Section Header="Defines" > + <Property Header="Defines" Value="USE_STDPERIPH_DRIVER;STM32F37X;USE_STM32373C_EVAL" Removable="1" /> + + </Section> + <Section Header="OPTIMIZE" > + <Property Header="Optimize" Value="-Os" Removable="1" /> + + </Section> + + </Set> + <Set Header="LD" > + <Section Header="Startup" > + <Property Header="DEFAULTSTARTUP" Value="No" Removable="1" /> + <Property Header="File" Value="" Removable="1" /> + + </Section> + <Section Header="Scripts" > + <Property Header="StarterKitLimit" Value="No" Removable="1" /> + <Property Header="SCRIPTFILES" Value="No" Removable="1" /> + <Property Header="File" Value="stm32f37x_flash_offset.ld" Removable="1" /> + + </Section> + + </Set> + + </Config> + <Config Header="STM32F37C_EVAL" > + <Set Header="Target" > + <Section Header="ToolSetARM" > + <Property Header="BuildToolSetARM" Value="ARM\GNU.config" /> + + </Section> + + </Set> + <Set Header="LD" > + <Section Header="Scripts" > + <Property Header="StarterKitLimit" Value="No" Removable="1" /> + + </Section> + + </Set> + + </Config> + <Config Header="STM32F303C_EVAL" > + <Set Header="Target" > + <Section Header="ToolSetARM" > + <Property Header="BuildToolSetARM" Value="ARM\GNU.config" /> + + </Section> + <Section Header="ProcessorARM" > + <Property Header="Processor" Value="STM32F303xC" /> + + </Section> + + </Set> + <Set Header="ApplicationBuild" > + <Section Header="Directories" > + <Property Header="IncDir" Value="..\inc;..\..\..\..\Libraries\CMSIS\Device\ST\STM32F30x\Include;..\..\..\..\Libraries\STM32F30x_StdPeriph_Driver\inc;..\..\..\..\Utilities\STM32_EVAL;..\..\..\..\Utilities\STM32_EVAL\Common;..\..\..\..\Libraries\CMSIS\Include;..\..\..\..\Utilities\STM32_EVAL\STM32303C_EVAL" Removable="1" /> + <Property Header="OutDir" Value="$(ApplicationDir)\STM32F303C_EVAL" Removable="1" /> + <Property Header="ListDir" Value="$(ApplicationDir)\STM32F303_EVAL" Removable="1" /> + + </Section> + + </Set> + <Set Header="GCC" > + <Section Header="Defines" > + <Property Header="Defines" Value="USE_STDPERIPH_DRIVER;STM32F30X;USE_STM32303C_EVAL" Removable="1" /> + + </Section> + <Section Header="OPTIMIZE" > + <Property Header="Optimize" Value="-Os" Removable="1" /> + + </Section> + + </Set> + <Set Header="LD" > + <Section Header="Startup" > + <Property Header="DEFAULTSTARTUP" Value="No" Removable="1" /> + <Property Header="File" Value="" Removable="1" /> + + </Section> + <Section Header="Scripts" > + <Property Header="StarterKitLimit" Value="No" Removable="1" /> + <Property Header="SCRIPTFILES" Value="No" Removable="1" /> + <Property Header="File" Value="stm32f30x_flash_offset.ld" Removable="1" /> + + </Section> + + </Set> + + </Config> + </Options> +</ApplicationBuild>
\ No newline at end of file diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f10x_hd_flash_offset.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f10x_hd_flash_offset.ld new file mode 100644 index 0000000..6d98d85 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f10x_hd_flash_offset.ld @@ -0,0 +1,242 @@ +/* +Default linker script for STM32F10x_512K_64K +Copyright RAISONANCE S.A.S. 2008 +*/ + +/* include the common STM32F10x sub-script */ + +/* Common part of the linker scripts for STM32 devices*/ + + +/* default stack sizes. + +These are used by the startup in order to allocate stacks for the different modes. +*/ + +__Stack_Size = 1024 ; + +PROVIDE ( _Stack_Size = __Stack_Size ) ; + +__Stack_Init = _estack - __Stack_Size ; + +/*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/ +PROVIDE ( _Stack_Init = __Stack_Init ) ; + +/* +There will be a link error if there is not this amount of RAM free at the end. +*/ +_Minimum_Stack_Size = 0x100 ; + + +/* include the memory spaces definitions sub-script */ +/* +Linker subscript for STM32F10x definitions with 512K Flash and 64K RAM */ + +/* Memory Spaces Definitions */ + +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 64K + FLASH (rx) : ORIGIN = 0x8003000, LENGTH = 512K-0x3000 + FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0 +} + +/* higher address of the user mode stack */ +_estack = 0x20010000; + + + +/* include the sections management sub-script for FLASH mode */ + +/* Sections Definitions */ + +SECTIONS +{ + /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + .flashtext : + { + . = ALIGN(4); + *(.flashtext) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + /* the program code is stored in the .text section, which goes to Flash */ + .text : + { + . = ALIGN(4); + + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + + . = ALIGN(4); + _etext = .; + /* This is used by the startup in order to initialize the .data secion */ + _sidata = _etext; + } >FLASH + + + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + + + /* This is the uninitialized data section */ + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* This is the user stack section + This is just to check that there is enough RAM left for the User mode stack + It should generate an error if it's full. + */ + ._usrstack : + { + . = ALIGN(4); + _susrstack = . ; + + . = . + _Minimum_Stack_Size ; + + . = ALIGN(4); + _eusrstack = . ; + } >RAM + + + + /* this is the FLASH Bank1 */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + .b1text : + { + *(.b1text) /* remaining code */ + *(.b1rodata) /* read-only data (constants) */ + *(.b1rodata*) + } >FLASHB1 + + /* this is the EXTMEM */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + + /* EXTMEM Bank0 */ + .eb0text : + { + *(.eb0text) /* remaining code */ + *(.eb0rodata) /* read-only data (constants) */ + *(.eb0rodata*) + } >EXTMEMB0 + + /* EXTMEM Bank1 */ + .eb1text : + { + *(.eb1text) /* remaining code */ + *(.eb1rodata) /* read-only data (constants) */ + *(.eb1rodata*) + } >EXTMEMB1 + + /* EXTMEM Bank2 */ + .eb2text : + { + *(.eb2text) /* remaining code */ + *(.eb2rodata) /* read-only data (constants) */ + *(.eb2rodata*) + } >EXTMEMB2 + + /* EXTMEM Bank0 */ + .eb3text : + { + *(.eb3text) /* remaining code */ + *(.eb3rodata) /* read-only data (constants) */ + *(.eb3rodata*) + } >EXTMEMB3 + + + + /* after that it's only debugging information. */ + + /* remove the debugging information from the standard libraries */ + DISCARD : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f30x_flash_offset.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f30x_flash_offset.ld new file mode 100644 index 0000000..5bfdec7 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32f30x_flash_offset.ld @@ -0,0 +1,242 @@ +/* +Default linker script for STM32F37x_256K_32K +Copyright RAISONANCE S.A.S. 2008 +*/ + +/* include the common STM32F30x sub-script */ + +/* Common part of the linker scripts for STM32 devices*/ + + +/* default stack sizes. + +These are used by the startup in order to allocate stacks for the different modes. +*/ + +__Stack_Size = 1024 ; + +PROVIDE ( _Stack_Size = __Stack_Size ) ; + +__Stack_Init = _estack - __Stack_Size ; + +/*"PROVIDE" allows to easily override these values from an object file or the commmand line.*/ +PROVIDE ( _Stack_Init = __Stack_Init ) ; + +/* +There will be a link error if there is not this amount of RAM free at the end. +*/ +_Minimum_Stack_Size = 0x100 ; + + +/* include the memory spaces definitions sub-script */ +/* +Linker subscript for STM32F30x definitions with 256K Flash and 32K RAM */ + +/* Memory Spaces Definitions */ + +MEMORY +{ + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K + FLASH (rx) : ORIGIN = 0x8003000, LENGTH = 256K-0x3000 + FLASHB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB0 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB1 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB2 (rx) : ORIGIN = 0x00000000, LENGTH = 0 + EXTMEMB3 (rx) : ORIGIN = 0x00000000, LENGTH = 0 +} + +/* higher address of the user mode stack */ +_estack = 0x20008000; + + + +/* include the sections management sub-script for FLASH mode */ + +/* Sections Definitions */ + +SECTIONS +{ + /* for Cortex devices, the beginning of the startup code is stored in the .isr_vector section, which goes to FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + .flashtext : + { + . = ALIGN(4); + *(.flashtext) /* Startup code */ + . = ALIGN(4); + } >FLASH + + + /* the program code is stored in the .text section, which goes to Flash */ + .text : + { + . = ALIGN(4); + + *(.text) /* remaining code */ + *(.text.*) /* remaining code */ + *(.rodata) /* read-only data (constants) */ + *(.rodata*) + *(.glue_7) + *(.glue_7t) + + . = ALIGN(4); + _etext = .; + /* This is used by the startup in order to initialize the .data secion */ + _sidata = _etext; + } >FLASH + + + + /* This is the initialized data section + The program executes knowing that the data is in the RAM + but the loader puts the initial values in the FLASH (inidata). + It is one task of the startup to copy the initial values from FLASH to RAM. */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _sdata = . ; + + *(.data) + *(.data.*) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .data secion */ + _edata = . ; + } >RAM + + + + /* This is the uninitialized data section */ + .bss : + { + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; + + *(.bss) + *(COMMON) + + . = ALIGN(4); + /* This is used by the startup in order to initialize the .bss secion */ + _ebss = . ; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* This is the user stack section + This is just to check that there is enough RAM left for the User mode stack + It should generate an error if it's full. + */ + ._usrstack : + { + . = ALIGN(4); + _susrstack = . ; + + . = . + _Minimum_Stack_Size ; + + . = ALIGN(4); + _eusrstack = . ; + } >RAM + + + + /* this is the FLASH Bank1 */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + .b1text : + { + *(.b1text) /* remaining code */ + *(.b1rodata) /* read-only data (constants) */ + *(.b1rodata*) + } >FLASHB1 + + /* this is the EXTMEM */ + /* the C or assembly source must explicitly place the code or data there + using the "section" attribute */ + + /* EXTMEM Bank0 */ + .eb0text : + { + *(.eb0text) /* remaining code */ + *(.eb0rodata) /* read-only data (constants) */ + *(.eb0rodata*) + } >EXTMEMB0 + + /* EXTMEM Bank1 */ + .eb1text : + { + *(.eb1text) /* remaining code */ + *(.eb1rodata) /* read-only data (constants) */ + *(.eb1rodata*) + } >EXTMEMB1 + + /* EXTMEM Bank2 */ + .eb2text : + { + *(.eb2text) /* remaining code */ + *(.eb2rodata) /* read-only data (constants) */ + *(.eb2rodata*) + } >EXTMEMB2 + + /* EXTMEM Bank0 */ + .eb3text : + { + *(.eb3text) /* remaining code */ + *(.eb3rodata) /* read-only data (constants) */ + *(.eb3rodata*) + } >EXTMEMB3 + + + + /* after that it's only debugging information. */ + + /* remove the debugging information from the standard libraries */ + DISCARD : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32l1xx_hd_flash_offset.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32l1xx_hd_flash_offset.ld new file mode 100644 index 0000000..664b998 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32l1xx_hd_flash_offset.ld @@ -0,0 +1,171 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for stm32l1xx_hd Device with +** 384KByte FLASH, 48KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2000C000; /* end of 16K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x80; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 384K - 0x3000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 48K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32l1xx_md_flash_offset.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32l1xx_md_flash_offset.ld new file mode 100644 index 0000000..865fc02 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/RIDE/stm32l1xx_md_flash_offset.ld @@ -0,0 +1,171 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for stm32l1xx_md Device with +** 128KByte FLASH, 16KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20004000; /* end of 16K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x80; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 128K - 0x3000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 16K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL/.project 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<locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_flash.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_fsmc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_fsmc.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_i2c.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_i2c.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_sdio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_sdio.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_spi.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_spi.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_tim.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_tim.c</locationURI> + </link> + <link> + <name>STM3210x_StdPeriph_Driver/stm32f10x_usart.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-2-PROJECT_LOC/src/stm32_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL_XL/TASKING/STM32F10x_XL.lsl b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL_XL/TASKING/STM32F10x_XL.lsl new file mode 100644 index 0000000..e6e5969 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM3210E-EVAL_XL/TASKING/STM32F10x_XL.lsl @@ -0,0 +1,165 @@ +//////////////////////////////////////////////////////////////////////////// +// +// File : stm32f103_cmsis.lsl +// +// Version : @(#)stm32f103_cmsis.lsl 1.2 09/06/04 +// +// Description : LSL file for the STMicroelectronics STM32F103, CMSIS version +// +// Copyright 2009 Altium BV +// +// NOTE: +// This file is derived from cm3.lsl and stm32f103.lsl. +// It is assumed that the user works with the ARMv7M architecture. +// Other architectures will not work with this lsl file. +// +//////////////////////////////////////////////////////////////////////////// + +// +// We do not want the vectors as defined in arm_arch.lsl +// +#define __NO_DEFAULT_AUTO_VECTORS 1 +#define __NR_OF_VECTORS 76 + + +#ifndef __STACK +# define __STACK 8k +#endif +#ifndef __HEAP +# define __HEAP 2k +#endif +#ifndef __VECTOR_TABLE_ROM_ADDR +# define __VECTOR_TABLE_ROM_ADDR 0x08003000 +#endif +#ifndef __XVWBUF +#define __XVWBUF 256 /* buffer used by CrossView */ +#endif + +#include <arm_arch.lsl> + +//////////////////////////////////////////////////////////////////////////// +// +// In the STM32F10x, 3 different boot modes can be selected +// - User Flash memory is selected as boot space +// - SystemMemory is selected as boot space +// - Embedded SRAM is selected as boot space +// +// This aliases the physical memory associated with each boot mode to Block +// 000 (0x00000000 boot memory). Even when aliased in the boot memory space, +// the related memory (Flash memory or SRAM) is still accessible at its +// original memory space. +// +// If no memory is defined yet use the following memory settings +// +#ifndef __MEMORY + +memory stm32f103flash +{ + mau = 8; + type = rom; + size = 0x100000; + map ( size = 0x100000, dest_offset=0x08003000, dest=bus:ARM:local_bus); +} + +memory stm32f103ram +{ + mau = 8; + type = ram; + size = 96k; + map ( size = 96k, dest_offset=0x20000000, dest=bus:ARM:local_bus); +} + +#endif /* __MEMORY */ + + +// +// Custom vector table defines interrupts according to CMSIS standard +// +# if defined(__CPU_ARMV7M__) +section_setup ::linear +{ + // vector table with handler addresses + vector_table "vector_table" ( vector_size = 4, size = __NR_OF_VECTORS, run_addr = __VECTOR_TABLE_ROM_ADDR, + template = ".text.handler_address", + template_symbol = "_lc_vector_handler", + vector_prefix = "_vector_", + fill = loop, + no_inline + ) + { + vector ( id = 0, fill = "_lc_ub_stack" ); // Top of Stack + vector ( id = 1, fill = "Reset_Handler" ); /* Reset Handler */ + vector ( id = 2, optional, fill = "NMI_Handler" ); + vector ( id = 3, optional, fill = "HardFault_Handler" ); + vector ( id = 4, optional, fill = "MemManage_Handler" ); + vector ( id = 5, optional, fill = "BusFault_Handler" ); + vector ( id = 6, optional, fill = "UsageFault_Handler" ); + vector ( id = 11, optional, fill = "SVC_Handler" ); + vector ( id = 12, optional, fill = "DebugMon_Handler" ); + vector ( id = 14, optional, fill = "PendSV_Handler" ); + vector ( id = 15, optional, fill = "SysTick_Handler" ); + + // External Interrupts : + vector ( id = 16, optional, fill = "WWDG_IRQHandler" ); // Window Watchdog + vector ( id = 17, optional, fill = "PVD_IRQHandler" ); // PVD through EXTI Line detect + vector ( id = 18, optional, fill = "TAMPER_IRQHandler" ); // Tamper + vector ( id = 19, optional, fill = "RTC_IRQHandler" ); // RTC + vector ( id = 20, optional, fill = "FLASH_IRQHandler" ); // Flash + vector ( id = 21, optional, fill = "RCC_IRQHandler" ); // RCC + vector ( id = 22, optional, fill = "EXTI0_IRQHandler" ); // EXTI Line 0 + vector ( id = 23, optional, fill = "EXTI1_IRQHandler" ); // EXTI Line 1 + vector ( id = 24, optional, fill = "EXTI2_IRQHandler" ); // EXTI Line 2 + vector ( id = 25, optional, fill = "EXTI3_IRQHandler" ); // EXTI Line 3 + vector ( id = 26, optional, fill = "EXTI4_IRQHandler" ); // EXTI Line 4 + vector ( id = 27, optional, fill = "DMA1_Channel1_IRQHandler" ); // DMA Channel 1 + vector ( id = 28, optional, fill = "DMA1_Channel2_IRQHandler" ); // DMA Channel 2 + vector ( id = 29, optional, fill = "DMA1_Channel3_IRQHandler" ); // DMA Channel 3 + vector ( id = 30, optional, fill = "DMA1_Channel4_IRQHandler" ); // DMA Channel 4 + vector ( id = 31, optional, fill = "DMA1_Channel5_IRQHandler" ); // DMA Channel 5 + vector ( id = 32, optional, fill = "DMA1_Channel6_IRQHandler" ); // DMA Channel 6 + vector ( id = 33, optional, fill = "DMA1_Channel7_IRQHandler" ); // DMA Channel 7 + vector ( id = 34, optional, fill = "ADC1_2_IRQHandler" ); // ADC1 and ADC2 + vector ( id = 35, optional, fill = "USB_HP_CAN1_TX_IRQHandler" ); // USB High Priority or CAN1 TX + vector ( id = 36, optional, fill = "USB_LP_CAN1_RX0_IRQHandler" ); // USB LowPriority or CAN1 RX0 + vector ( id = 37, optional, fill = "CAN1_RX1_IRQHandler" ); // CAN1 RX1 + vector ( id = 38, optional, fill = "CAN1_SCE_IRQHandler" ); // CAN1 SCE + vector ( id = 39, optional, fill = "EXTI9_5_IRQHandler" ); // EXTI Line 9..5 + vector ( id = 40, optional, fill = "TIM1_BRK_TIM9_IRQHandler" ); // TIM1 Break + vector ( id = 41, optional, fill = "TIM1_UP_TIM10_IRQHandler" ); // TIM1 Update + vector ( id = 42, optional, fill = "TIM1_TRG_COM_TIM11_IRQHandler" ); // TIM1 Trigger and Commutation + vector ( id = 43, optional, fill = "TIM1_CC_IRQHandler" ); // TIM1 Capture Compare + vector ( id = 44, optional, fill = "TIM2_IRQHandler" ); // TIM2 + vector ( id = 45, optional, fill = "TIM3_IRQHandler" ); // TIM3 + vector ( id = 46, optional, fill = "TIM4_IRQHandler" ); // TIM4 + vector ( id = 47, optional, fill = "I2C1_EV_IRQHandler" ); // I2C1 Event + vector ( id = 48, optional, fill = "I2C1_ER_IRQHandler" ); // I2C1 Error + vector ( id = 49, optional, fill = "I2C2_EV_IRQHandler" ); // I2C2 Event + vector ( id = 50, optional, fill = "I2C2_ER_IRQHandler" ); // I2C2 Error + vector ( id = 51, optional, fill = "SPI1_IRQHandler" ); // SPI1 + vector ( id = 52, optional, fill = "SPI2_IRQHandler" ); // SPI2 + vector ( id = 53, optional, fill = "USART1_IRQHandler" ); // USART1 + vector ( id = 54, optional, fill = "USART2_IRQHandler" ); // USART2 + vector ( id = 55, optional, fill = "USART3_IRQHandler" ); // USART3 + vector ( id = 56, optional, fill = "EXTI15_10_IRQHandler" ); // EXTI Line 15..10 + vector ( id = 57, optional, fill = "RTCAlarm_IRQHandler" ); // RTC Alarm through EXTI Line + vector ( id = 58, optional, fill = "USBWakeUp_IRQHandler" ); // USB Wakeup from suspend + vector ( id = 59, optional, fill = "TIM8_BRK_TIM12_IRQHandler" ); // TIM8 Break + vector ( id = 60, optional, fill = "TIM8_UP_TIM13_IRQHandler" ); // TIM8 Update + vector ( id = 61, optional, fill = "TIM8_TRG_COM_TIM14_IRQHandler" ); // TIM8 Trigger and Commutation + vector ( id = 62, optional, fill = "TIM8_CC_IRQHandler" ); // TIM8 Capture Compare + vector ( id = 63, optional, fill = "ADC3_IRQHandler" ); // ADC3 + vector ( id = 64, optional, fill = "FSMC_IRQHandler" ); // FSMC + vector ( id = 65, optional, fill = "SDIO_IRQHandler" ); // SDIO + vector ( id = 66, optional, fill = "TIM5_IRQHandler" ); // TIM5 + vector ( id = 67, optional, fill = "SPI3_IRQHandler" ); // SPI3 + vector ( id = 68, optional, fill = "UART4_IRQHandler" ); // UART4 + vector ( id = 69, optional, fill = "UART5_IRQHandler" ); // UART5 + vector ( id = 70, optional, fill = "TIM6_IRQHandler" ); // TIM6 + vector ( id = 71, optional, fill = "TIM7_IRQHandler" ); // TIM7 + vector ( id = 72, optional, fill = "DMA2_Channel1_IRQHandler" ); // DMA2 Channel1 + vector ( id = 73, optional, fill = "DMA2_Channel2_IRQHandler" ); // DMA2 Channel2 + vector ( id = 74, optional, fill = "DMA2_Channel3_IRQHandler" ); // DMA2 Channel3 + vector ( id = 75, optional, fill = "DMA2_Channel4_5_IRQHandler" ); // DMA2 Channel4 and DMA2 Channel5 + } +} +# endif diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32373C_EVAL/.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32373C_EVAL/.launch new file mode 100644 index 0000000..4635ffb --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TASKING/STM32373C_EVAL/.launch @@ -0,0 +1,44 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no" ?> +<launchConfiguration type="com.tasking.cdt.launch.localCLaunch"> + <booleanAttribute key="com.tasking.debug.cdt.core.BREAK_ON_EXIT" value="true"/> + <booleanAttribute key="com.tasking.debug.cdt.core.CACHE_TARGET_ACCESS" value="false"/> + <stringAttribute key="com.tasking.debug.cdt.core.COMMUNICATION" value="J-Link over USB (JTAG)"/> + <stringAttribute key="com.tasking.debug.cdt.core.CONFIGURATION" value="Default"/> + <stringAttribute key="com.tasking.debug.cdt.core.DILOGCALLBACK_LOG_FILE_NAME" value=""/> + <booleanAttribute key="com.tasking.debug.cdt.core.DOWNLOAD" value="true"/> + <stringAttribute key="com.tasking.debug.cdt.core.FSS_ROOT" value="${project_loc}\${build_config}"/> + <stringAttribute key="com.tasking.debug.cdt.core.GDILOG_FILE_NAME" value=""/> + <booleanAttribute key="com.tasking.debug.cdt.core.GOTO_MAIN" value="true"/> + <booleanAttribute key="com.tasking.debug.cdt.core.HISTORY_BUFFER_ENABLED" value="false"/> + <stringAttribute key="com.tasking.debug.cdt.core.MSGLOG_FILE_NAME" value=""/> + <booleanAttribute key="com.tasking.debug.cdt.core.PROGRAM_FLASH" value="true"/> + <booleanAttribute key="com.tasking.debug.cdt.core.PSM_ENABLED" value="true"/> + <booleanAttribute key="com.tasking.debug.cdt.core.RESET_TARGET" value="true"/> + <stringAttribute key="com.tasking.debug.cdt.core.TARGET" value="STMicroelectronics STM32L152-EVAL"/> + <booleanAttribute key="com.tasking.debug.cdt.core.TARGET_POLLING" value="false"/> + <booleanAttribute key="com.tasking.debug.cdt.core.USE_MDF_FILE" value="false"/> + <booleanAttribute key="com.tasking.debug.cdt.core.VERIFY" value="true"/> + <booleanAttribute key="com.tasking.debug.cdt.core.linkToProject" value="true"/> + <stringAttribute key="debugger_configuration.debug_instrument_module" value="dijlinkarm"/> + <stringAttribute key="debugger_configuration.gdi.flash.flash_mirror_address" value="0x0"/> + <stringAttribute key="debugger_configuration.gdi.flash.flash_monitor" value="fstm32l1xx.sre"/> + <stringAttribute key="debugger_configuration.gdi.flash.flash_sector_buffer_size" value="4096"/> + <stringAttribute key="debugger_configuration.gdi.flash.flash_workspace" value="0x20000000"/> + <stringAttribute key="debugger_configuration.gdi.resource.hwdiarm.protocol" value="JTAG"/> + <stringAttribute key="debugger_configuration.general.kdi_orti_file" value=""/> + <stringAttribute key="debugger_configuration.general.ksm_sharedlib" value=""/> + <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_ID" value="com.tasking.debug.cdt.core.CDebugger"/> + <stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_START_MODE" value="run"/> + <booleanAttribute key="org.eclipse.cdt.launch.DEBUGGER_STOP_AT_MAIN" value="true"/> + <booleanAttribute key="org.eclipse.cdt.launch.ENABLE_REGISTER_BOOKKEEPING" value="false"/> + <booleanAttribute key="org.eclipse.cdt.launch.ENABLE_VARIABLE_BOOKKEEPING" value="false"/> + <stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="${project_loc}\${build_config}\STM32L152-EVAL.abs"/> + <stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32L152-EVAL"/> + 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moduleId="org.eclipse.cdt.core.settings"> + <cconfiguration id="com.tasking.config.arm.abs.debug.2044455393"> + <storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.tasking.config.arm.abs.debug.2044455393" moduleId="org.eclipse.cdt.core.settings" name="Debug"> + <externalSettings/> + <extensions> + <extension id="com.tasking.managedbuilder.TASKING_ELF" point="org.eclipse.cdt.core.BinaryParser"/> + <extension id="com.tasking.managedbuilder.TskRegexErrorParser" point="org.eclipse.cdt.core.ErrorParser"/> + </extensions> + </storageModule> + <storageModule moduleId="cdtBuildSystem" version="4.0.0"> + <configuration artifactExtension="abs" artifactName="STM32L152-EVAL" buildArtefactType="com.tasking.arm.buildArtefactType.elf" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.tasking.arm.buildArtefactType.elf" cleanCommand=""${PRODDIR}/bin/rm" -rf" description="" id="com.tasking.config.arm.abs.debug.2044455393" name="Debug" parent="com.tasking.config.arm.abs.debug"> + <folderInfo id="com.tasking.config.arm.abs.debug.2044455393." name="/" resourcePath=""> + <toolChain id="com.tasking.arm.abs.debug.315882766" name="TASKING VX-toolset for ARM" superClass="com.tasking.arm.abs.debug"> + <option id="com.tasking.arm.pluginVersion.306560835" name="Plugin version" superClass="com.tasking.arm.pluginVersion" value="1.88.0.0" valueType="string"/> + <option id="com.tasking.arm.prodDir.527888595" name="Product directory:" superClass="com.tasking.arm.prodDir" value="${eclipse_home}/.." valueType="string"/> + <option id="com.tasking.arm.cpu.1659227005" name="Processor:" superClass="com.tasking.arm.cpu" value="stm32l152vb" valueType="string"/> + <targetPlatform archList="all" binaryParser="com.tasking.managedbuilder.TASKING_ELF" id="com.tasking.arm.platform.abs.debug.2077143327" name="Debug" osList="" superClass="com.tasking.arm.platform.abs.debug"/> + <builder buildPath="${workspace_loc:/STM3210B-EVAL/Debug}" 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b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/.project new file mode 100644 index 0000000..c5e4fbb --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL/.project @@ -0,0 +1,160 @@ +<?xml version="1.0" encoding="UTF-8"?> +<projectDescription> + <name>STM3210E-EVAL</name> + <comment></comment> + <projects> + </projects> + <buildSpec> + <buildCommand> + <name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name> + <triggers>clean,full,incremental,</triggers> + <arguments> + <dictionary> + <key>?children?</key> + <value>?name?=outputEntries\|?children?=?name?=entry\\\\\\\|\\\|\||</value> + </dictionary> + <dictionary> + <key>?name?</key> + <value></value> + </dictionary> + <dictionary> + <key>org.eclipse.cdt.make.core.append_environment</key> + <value>true</value> + </dictionary> + <dictionary> + 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<name>User</name> + <type>2</type> + <locationURI>virtual:/virtual</locationURI> + </link> + <link> + <name>CMSIS/system_stm32f10x.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f10x.c</locationURI> + </link> + <link> + <name>Doc/readme.txt</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/readme.txt</locationURI> + </link> + <link> + <name>STM3210E_EVAL/stm3210e_eval.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Utilities/STM32_EVAL/STM3210E_EVAL/stm3210e_eval.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/misc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/misc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_exti.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_exti.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_gpio.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_gpio.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_rcc.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_rcc.c</locationURI> + </link> + <link> + <name>STM32F10x_StdPeriph_Driver/stm32f10x_usart.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/STM32F10x_StdPeriph_Driver/src/stm32f10x_usart.c</locationURI> + </link> + <link> + <name>TrueSTUDIO/startup_stm32f10x_hd.s</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Libraries/CMSIS/Device/ST/STM32F10x/Source/Templates/TrueSTUDIO/startup_stm32f10x_hd.s</locationURI> + </link> + <link> + <name>User/main.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/main.c</locationURI> + </link> + <link> + <name>User/stm32_it.c</name> + <type>1</type> + <locationURI>PARENT-5-PROJECT_LOC/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c</locationURI> + </link> + </linkedResources> +</projectDescription> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL_XL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL_XL/stm32_flash.ld new file mode 100644 index 0000000..67a3772 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM3210E-EVAL_XL/stm32_flash.ld @@ -0,0 +1,170 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for STM32F103ZG Device with +** 1MByte FLASH, 96KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x20018000; /* end of 96K RAM */ + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x800; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 1M - 0x3000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 96K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .ARM.attributes : { *(.ARM.attributes) } > FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/STM32373C-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/STM32373C-EVAL.elf.launch new file mode 100644 index 0000000..734d809 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32373C-EVAL/STM32373C-EVAL.elf.launch @@ -0,0 +1,40 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Start the executable continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # Set a breakpoint at main(). tbreak main # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="72"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="72000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Reset to known state monitor reset # Load the program executable load		 # Enable Debug connection in low power modes (DBGMCU->CR) set *0xE0042004 = (*0xE0042004) | 0x7 # The executable starts automatically"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="E:\SVN\STM32_USB-FS-Device_Lib\Projects\Custom_HID\TrueSTUDIO\STM32373C-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32373C-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32373C-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32373C-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +<stringAttribute key="org.eclipse.dsf.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList context="reserved-for-future-use"/> "/> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/STM32L152D-EVAL.elf.launch b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/STM32L152D-EVAL.elf.launch new file mode 100644 index 0000000..06bea70 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/STM32L152D-EVAL.elf.launch @@ -0,0 +1,43 @@ +<?xml version="1.0" encoding="UTF-8" standalone="no"?> +<launchConfiguration type="com.atollic.hardwaredebug.launch.launchConfigurationType"> +<stringAttribute key="com.atollic.hardwaredebug.launch.analyzeCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Reset to known state monitor reset # Start the executable. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.enable_swv" value="false"/> +<intAttribute key="com.atollic.hardwaredebug.launch.formatVersion" value="2"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.initCommands" value=""/> +<stringAttribute key="com.atollic.hardwaredebug.launch.ipAddress" value="localhost"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.jtagDevice" value="ST-LINK"/> +<intAttribute key="com.atollic.hardwaredebug.launch.portNumber" value="61234"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.remoteCommand" value="target extended-remote"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.runCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.serverParam" value="-p 61234 -l 1 -d"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.startServer" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swd_mode" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_port" value="61235"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_div" value="8"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.swv_trace_hclk" value="8000000"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.swv_wait_for_sync" value="true"/> +<booleanAttribute key="com.atollic.hardwaredebug.launch.useRemoteTarget" value="true"/> +<stringAttribute key="com.atollic.hardwaredebug.launch.verifyCommands" value="# Set flash parallelism mode to 32, 16, or 8 bit when using STM32 F2/F4 microcontrollers # Uncomment next line, 2=32 bit, 1=16 bit and 0=8 bit parallelism mode #monitor flash set_parallelism_mode 2 # Load the program executable load # Set a breakpoint at main(). tbreak main # Reset to known state monitor reset # Run to the breakpoint. continue"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.enable_logging" value="false"/> +<stringAttribute key="com.atollic.hardwaredebug.stlink.log_file" value="C:\VSS\BARRACUDA\INTRODUCTION PACKAGE\FIRMWARE\STM32_USB-FS-Device_Lib\Project\Device_Firmware_Upgrade\binary_template\TrueSTUDIO\STM32L152D-EVAL\Debug\st-link_gdbserver_log.txt"/> +<booleanAttribute key="com.atollic.hardwaredebug.stlink.verify_flash" value="false"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.commandFactory" value="Standard (Windows)"/> +<stringAttribute key="org.eclipse.cdt.debug.mi.core.protocol" value="mi"/> +<booleanAttribute key="org.eclipse.cdt.debug.mi.core.verboseMode" value="false"/> +<stringAttribute key="org.eclipse.cdt.dsf.gdb.DEBUG_NAME" value="${TOOLCHAIN_PATH}/arm-atollic-eabi-gdb"/> +<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/> +<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/> +<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?><contentList/>"/> +<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <globalVariableList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="<?xml version="1.0" encoding="UTF-8" standalone="no"?> <memoryBlockExpressionList/> "/> +<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="Debug/STM32L152D-EVAL.elf"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_ATTR" value="STM32L152D-EVAL"/> +<stringAttribute key="org.eclipse.cdt.launch.PROJECT_BUILD_CONFIG_ID_ATTR" value=""/> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_PATHS"> +<listEntry value="/STM32L152D-EVAL"/> +</listAttribute> +<listAttribute key="org.eclipse.debug.core.MAPPED_RESOURCE_TYPES"> +<listEntry value="4"/> +</listAttribute> +</launchConfiguration> diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/stm32_flash.ld b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/stm32_flash.ld new file mode 100644 index 0000000..baf2d84 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/TrueSTUDIO/STM32L152D-EVAL/stm32_flash.ld @@ -0,0 +1,171 @@ +/* +***************************************************************************** +** +** File : stm32_flash.ld +** +** Abstract : Linker script for stm32l1xx_hd Device with +** 384KByte FLASH, 48KByte RAM +** +** Set heap size, stack size and stack location according +** to application requirements. +** +** Set memory bank area and size if external memory is used. +** +** Target : STMicroelectronics STM32 +** +** Environment : Atollic TrueSTUDIO(R) +** +** Distribution: The file is distributed “as is,” without any warranty +** of any kind. +** +** (c)Copyright Atollic AB. +** You may use this file as-is or modify it according to the needs of your +** project. Distribution of this file (unmodified or modified) is not +** permitted. Atollic AB permit registered Atollic TrueSTUDIO(R) users the +** rights to distribute the assembled, compiled & linked contents of this +** file as part of an application binary file, provided that it is built +** using the Atollic TrueSTUDIO(R) toolchain. +** +***************************************************************************** +*/ + +/* Entry Point */ +ENTRY(Reset_Handler) + +/* Highest address of the user mode stack */ +_estack = 0x2000BFF8; + +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0; /* required amount of heap */ +_Min_Stack_Size = 0x800; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x08003000, LENGTH = 384K- 0x3000 + RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 48K + MEMORY_B1 (rx) : ORIGIN = 0x60000000, LENGTH = 0K +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + } >FLASH + + + .ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH + .ARM : { + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + } >FLASH + + .preinit_array : + { + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + } >FLASH + .init_array : + { + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + } >FLASH + .fini_array : + { + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(.fini_array*)) + KEEP (*(SORT(.fini_array.*))) + PROVIDE_HIDDEN (__fini_array_end = .); + } >FLASH + + /* used by the startup to initialize data */ + _sidata = .; + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : AT ( _sidata ) + { + . = ALIGN(4); + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + } >RAM + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + } >RAM + + PROVIDE ( end = _ebss ); + PROVIDE ( _end = _ebss ); + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(4); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(4); + } >RAM + + /* MEMORY_bank1 section, code must be located here explicitly */ + /* Example: extern int foo(void) __attribute__ ((section (".mb1text"))); */ + .memory_b1_text : + { + *(.mb1text) /* .mb1text sections (code) */ + *(.mb1text*) /* .mb1text* sections (code) */ + *(.mb1rodata) /* read-only data (constants) */ + *(.mb1rodata*) + } >MEMORY_B1 + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32f37x_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32f37x_conf.h new file mode 100644 index 0000000..3d39101 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/inc/stm32f37x_conf.h @@ -0,0 +1,83 @@ +/** + ****************************************************************************** + * @file stm32f37x_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Library configuration file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM32F37X_CONF_H +#define __STM32F37X_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Comment the line below to disable peripheral header file inclusion */ +#include "stm32f37x_adc.h" +#include "stm32f37x_can.h" +#include "stm32f37x_cec.h" +#include "stm32f37x_crc.h" +#include "stm32f37x_comp.h" +#include "stm32f37x_dac.h" +#include "stm32f37x_dbgmcu.h" +#include "stm32f37x_dma.h" +#include "stm32f37x_exti.h" +#include "stm32f37x_flash.h" +#include "stm32f37x_gpio.h" +#include "stm32f37x_syscfg.h" +#include "stm32f37x_i2c.h" +#include "stm32f37x_iwdg.h" +#include "stm32f37x_pwr.h" +#include "stm32f37x_rcc.h" +#include "stm32f37x_rtc.h" +#include "stm32f37x_sdadc.h" +#include "stm32f37x_spi.h" +#include "stm32f37x_tim.h" +#include "stm32f37x_usart.h" +#include "stm32f37x_wwdg.h" +#include "stm32f37x_misc.h" /* High level functions for NVIC and SysTick (add-on to CMSIS functions) */ + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Uncomment the line below to expanse the "assert_param" macro in the + Standard Peripheral Library drivers code */ +/* #define USE_FULL_ASSERT 1 */ + +/* Exported macro ------------------------------------------------------------*/ +#ifdef USE_FULL_ASSERT + +/** + * @brief The assert_param macro is used for function's parameters check. + * @param expr: If expr is false, it calls assert_failed function which reports + * the name of the source file and the source line number of the call + * that failed. If expr is true, it returns no value. + * @retval None + */ + #define assert_param(expr) ((expr) ? (void)0 : assert_failed((uint8_t *)__FILE__, __LINE__)) +/* Exported functions ------------------------------------------------------- */ + void assert_failed(uint8_t* file, uint32_t line); +#else + #define assert_param(expr) ((void)0) +#endif /* USE_FULL_ASSERT */ + +#endif /* __STM32F37X_CONF_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c new file mode 100644 index 0000000..b8b7e92 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/stm32_it.c @@ -0,0 +1,180 @@ +/** + ****************************************************************************** + * @file stm32_it.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and peripherals + * interrupt service routine. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "stm32_it.h" +#include "main.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************/ +/* Cortex-M Processor Exceptions Handlers */ +/******************************************************************************/ + +/******************************************************************************* +* Function Name : NMI_Handler +* Description : This function handles NMI exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void NMI_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : HardFault_Handler +* Description : This function handles Hard Fault exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : MemManage_Handler +* Description : This function handles Memory Manage exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : BusFault_Handler +* Description : This function handles Bus Fault exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : UsageFault_Handler +* Description : This function handles Usage Fault exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : SVC_Handler +* Description : This function handles SVCall exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void SVC_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : DebugMon_Handler +* Description : This function handles Debug Monitor exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void DebugMon_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : PendSV_Handler +* Description : This function handles PendSVC exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void PendSV_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : SysTick_Handler +* Description : This function handles SysTick Handler. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void SysTick_Handler(void) +{ + TimingDelay_Decrement(); +} + +/******************************************************************************/ +/* STM32 Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32xxx.s). */ +/******************************************************************************/ + +/******************************************************************************* +* Function Name : PPP_IRQHandler +* Description : This function handles PPP interrupt request. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +/*void PPP_IRQHandler(void) +{ +}*/ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f30x.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f30x.c new file mode 100644 index 0000000..31faf5c --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/binary_template/src/system_stm32f30x.c @@ -0,0 +1,382 @@ +/** + ****************************************************************************** + * @file system_stm32f30x.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32F30x devices, + * and is generated by the clock configuration tool + * stm32f30x_Clock_Configuration_V1.0.0.xls + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f30x.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f30x.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define + * in "stm32f30x.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + * Supported STM32F30x device + *----------------------------------------------------------------------------- + * System Clock source | PLL (HSE) + *----------------------------------------------------------------------------- + * SYSCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * HCLK(Hz) | 72000000 + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 2 + *----------------------------------------------------------------------------- + * HSE Frequency(Hz) | 8000000 + *---------------------------------------------------------------------------- + * PLLMUL | 9 + *----------------------------------------------------------------------------- + * PREDIV | 1 + *----------------------------------------------------------------------------- + * USB Clock | ENABLE + *----------------------------------------------------------------------------- + * Flash Latency(WS) | 2 + *----------------------------------------------------------------------------- + * Prefetch Buffer | ON + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f30x_system + * @{ + */ + +/** @addtogroup STM32F30x_System_Private_Includes + * @{ + */ + +#include "stm32f30x.h" + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_Defines + * @{ + */ +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_Variables + * @{ + */ + + uint32_t SystemCoreClock = 72000000; + + __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +/** + * @} + */ + +/** @addtogroup STM32F30x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemFrequency variable. + * @param None + * @retval None + */ +void SystemInit(void) +{ + /* FPU settings ------------------------------------------------------------*/ + #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) + SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ + #endif + + /* Reset the RCC clock configuration to the default reset state ------------*/ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset CFGR register */ + RCC->CFGR &= 0xF87FC00C; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + + /* Reset PREDIV1[3:0] bits */ + RCC->CFGR2 &= (uint32_t)0xFFFFFFF0; + + /* Reset USARTSW[1:0], I2CSW and TIMs bits */ + RCC->CFGR3 &= (uint32_t)0xFF00FCCC; + + /* Disable all interrupts */ + RCC->CIR = 0x00000000; + + /* Configure the System clock source, PLL Multiplier and Divider factors, + AHB/APBx prescalers and Flash settings ----------------------------------*/ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f30x.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f30x.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0, prediv1factor = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + } + break; + default: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + } + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock source, PLL Multiplier and Divider factors, + * AHB/APBx prescalers and Flash settings + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration -----------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer and set Flash Latency */ + FLASH->ACR = FLASH_ACR_PRFTBE | (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK / 1 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK / 2 */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + /* PLL configuration */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1 | RCC_CFGR_PLLMULL9); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/hw_config.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/hw_config.h new file mode 100644 index 0000000..1c272b0 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/hw_config.h @@ -0,0 +1,63 @@ +/** + ****************************************************************************** + * @file hw_config.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Hardware Configuration & Setup + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __HW_CONFIG_H +#define __HW_CONFIG_H +/* Includes ------------------------------------------------------------------*/ + +#include "platform_config.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Flash memory address from where user application will be loaded */ +#define ApplicationAddress 0x08003000 + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +void Set_System(void); +void Set_USBClock(void); +void Enter_LowPowerMode(void); +void Leave_LowPowerMode(void); +void USB_Cable_Config (FunctionalState NewState); +void USB_Interrupts_Config(void); + +void DFU_Button_Config(void); +uint8_t DFU_Button_Read(void); + +void Reset_Device(void); +void SMI_FLASH_Init(void); +void SMI_FLASH_SectorErase(uint32_t Address); +void SMI_FLASH_WordWrite(uint32_t Address, uint32_t Data); +void SMI_FLASH_PageWrite(uint32_t Address, uint32_t* wBuffer); +void Get_SerialNum(void); + +/* External variables --------------------------------------------------------*/ + +#endif /*__HW_CONFIG_H*/ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/spi_if.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/spi_if.h new file mode 100644 index 0000000..d2badd8 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/spi_if.h @@ -0,0 +1,47 @@ +/** + ****************************************************************************** + * @file spi_if.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Header for dfu_mal.c file. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __SPI_IF_MAL_H +#define __SPI_IF_MAL_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm32f10x.h" +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + +uint16_t SPI_If_Init(void); +uint16_t SPI_If_Erase (uint32_t SectorAddress); +uint16_t SPI_If_Write (uint32_t SectorAddress, uint32_t DataLength); +uint8_t *SPI_If_Read (uint32_t SectorAddress, uint32_t DataLength); + +#endif /* __SPI_IF_MAL_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_conf.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_conf.h new file mode 100644 index 0000000..d997e04 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_conf.h @@ -0,0 +1,121 @@ +/** + ****************************************************************************** + * @file usb_conf.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Device Firmware Upgrade (DFU) configuration file + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_CONF_H +#define __USB_CONF_H + +/* Includes ------------------------------------------------------------------*/ +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ + +/* These timings will be returned to the host when it checks the device + status during a write or erase operation to know how much time the host + should wait before issuing the next get status request. + These defines are set in usb_conf.h file. + The values of this table should be extracted from relative memories + datasheet (Typical or Maximum timming value for Sector Erase and for + 1024 bytes Write). All timings are expressed in millisecond unit (ms). + Note that "Sector" refers here to the memory unit used for Erase/Write + operations. It could be a sector, a page, a block, a word ... + If the erase operation is not supported, it is advised to set the erase + timing to 1 (which means 1ms: one USB frame). */ +#define SPI_FLASH_SECTOR_ERASE_TIME 3000 +#define SPI_FLASH_SECTOR_WRITE_TIME 20 + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + #define INTERN_FLASH_SECTOR_ERASE_TIME 100 + #define INTERN_FLASH_SECTOR_WRITE_TIME 104 +#else + #define INTERN_FLASH_SECTOR_ERASE_TIME 50 + #define INTERN_FLASH_SECTOR_WRITE_TIME 50 +#endif /* STM32L1XX_XD */ + +#define M29W128F_SECTOR_ERASE_TIME 1000 +#define M29W128F_SECTOR_WRITE_TIME 25 + +#define M29W128G_SECTOR_ERASE_TIME 1000 +#define M29W128G_SECTOR_WRITE_TIME 25 + +#define S29GL128_SECTOR_ERASE_TIME 1000 +#define S29GL128_SECTOR_WRITE_TIME 45 + +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ +/* External variables --------------------------------------------------------*/ +/*-------------------------------------------------------------*/ +/* EP_NUM */ +/* defines how many endpoints are used by the device */ +/*-------------------------------------------------------------*/ +#define EP_NUM (1) + +/*-------------------------------------------------------------*/ +/* -------------- Buffer Description Table -----------------*/ +/*-------------------------------------------------------------*/ +/* buffer table base address */ +/* buffer table base address */ +#define BTABLE_ADDRESS (0x00) + +/* EP0 */ +/* rx/tx buffer base address */ +#define ENDP0_RXADDR (0x10) +#define ENDP0_TXADDR (0x50) + + +/*-------------------------------------------------------------*/ +/* ------------------- ISTR events -------------------------*/ +/*-------------------------------------------------------------*/ +/* IMR_MSK */ +/* mask defining which events has to be handled */ +/* by the device application software */ +#define IMR_MSK (CNTR_CTRM | CNTR_WKUPM | CNTR_SUSPM | CNTR_ERRM | CNTR_SOFM \ + | CNTR_ESOFM | CNTR_RESETM ) + +/* CTR service routines */ +/* associated to defined endpoints */ +#define EP1_IN_Callback NOP_Process +#define EP2_IN_Callback NOP_Process +#define EP3_IN_Callback NOP_Process +#define EP4_IN_Callback NOP_Process +#define EP5_IN_Callback NOP_Process +#define EP6_IN_Callback NOP_Process +#define EP7_IN_Callback NOP_Process + + +#define EP1_OUT_Callback NOP_Process +#define EP2_OUT_Callback NOP_Process +#define EP3_OUT_Callback NOP_Process +#define EP4_OUT_Callback NOP_Process +#define EP5_OUT_Callback NOP_Process +#define EP6_OUT_Callback NOP_Process +#define EP7_OUT_Callback NOP_Process + +#endif /*__USB_CONF_H*/ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_istr.h b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_istr.h new file mode 100644 index 0000000..d2a07f6 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/inc/usb_istr.h @@ -0,0 +1,95 @@ +/** + ****************************************************************************** + * @file usb_istr.h + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief This file includes the peripherals header files in the user application. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __USB_ISTR_H +#define __USB_ISTR_H + +/* Includes ------------------------------------------------------------------*/ +#include "usb_conf.h" + +/* Exported types ------------------------------------------------------------*/ +/* Exported constants --------------------------------------------------------*/ +/* Exported macro ------------------------------------------------------------*/ +/* Exported functions ------------------------------------------------------- */ + + void USB_Istr(void); + +/* function prototypes Automatically built defining related macros */ + +void EP1_IN_Callback(void); +void EP2_IN_Callback(void); +void EP3_IN_Callback(void); +void EP4_IN_Callback(void); +void EP5_IN_Callback(void); +void EP6_IN_Callback(void); +void EP7_IN_Callback(void); + +void EP1_OUT_Callback(void); +void EP2_OUT_Callback(void); +void EP3_OUT_Callback(void); +void EP4_OUT_Callback(void); +void EP5_OUT_Callback(void); +void EP6_OUT_Callback(void); +void EP7_OUT_Callback(void); + +#ifdef CTR_CALLBACK +void CTR_Callback(void); +#endif + +#ifdef DOVR_CALLBACK +void DOVR_Callback(void); +#endif + +#ifdef ERR_CALLBACK +void ERR_Callback(void); +#endif + +#ifdef WKUP_CALLBACK +void WKUP_Callback(void); +#endif + +#ifdef SUSP_CALLBACK +void SUSP_Callback(void); +#endif + +#ifdef RESET_CALLBACK +void RESET_Callback(void); +#endif + +#ifdef SOF_CALLBACK +void SOF_Callback(void); +#endif + +#ifdef ESOF_CALLBACK +void ESOF_Callback(void); +#endif + +#endif /*__USB_ISTR_H*/ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/hw_config.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/hw_config.c new file mode 100644 index 0000000..a2098f9 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/hw_config.c @@ -0,0 +1,406 @@ +/** + ****************************************************************************** + * @file hw_config.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Hardware Configuration & Setup + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ + +#include "hw_config.h" +#include "dfu_mal.h" +#include "usb_lib.h" +#include "usb_desc.h" +#include "usb_pwr.h" + + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +ErrorStatus HSEStartUpStatus; +EXTI_InitTypeDef EXTI_InitStructure; +/* Extern variables ----------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +static void IntToUnicode (uint32_t value , uint8_t *pbuf , uint8_t len); +/* Private functions ---------------------------------------------------------*/ +/******************************************************************************* +* Function Name : Set_System. +* Description : Configures Main system clocks & power. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Set_System(void) +{ +#if !defined(STM32L1XX_MD) && !defined(STM32L1XX_HD) && !defined (STM32L1XX_MD_PLUS) + GPIO_InitTypeDef GPIO_InitStructure; +#endif /* STM32L1XX_XD*/ + +#if defined(USB_USE_EXTERNAL_PULLUP) + GPIO_InitTypeDef GPIO_InitStructure; +#endif /* USB_USE_EXTERNAL_PULLUP */ + + /*!< At this stage the microcontroller clock setting is already configured, + this is done through SystemInit() function which is called from startup + file (startup_stm32f10x_xx.s) before to branch to application main. + To reconfigure the default setting of SystemInit() function, refer to + system_stm32f10x.c file + */ + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) || defined(STM32F37X) || defined(STM32F30X) + /* Enable the SYSCFG module clock */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_SYSCFG, ENABLE); +#endif /* STM32L1XX_XD */ + +FLASH_Unlock(); + +#ifdef USE_STM3210E_EVAL + /* Enable the FSMC Clock */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); +#endif /* USE_STM3210E_EVAL */ +#if defined (USE_STM3210E_EVAL) + /* Enable the FSMC Clock */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE); +#endif /* USE_STM3210E_EVAL */ + +#if defined(STM32F37X) || defined(STM32F30X) + /* Enable the USB disconnect GPIO clock */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIO_DISCONNECT, ENABLE); + + /*Set PA11,12 as IN - USB_DM,DP*/ + + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE); + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11 | GPIO_Pin_12; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(GPIOA, &GPIO_InitStructure); + + /*SET PA11,12 for USB: USB_DM,DP*/ + GPIO_PinAFConfig(GPIOA, GPIO_PinSource11, GPIO_AF_14); + GPIO_PinAFConfig(GPIOA, GPIO_PinSource12, GPIO_AF_14); + + /* USB_DISCONNECT used as USB pull-up */ + GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_InitStructure.GPIO_OType = GPIO_OType_OD; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure); + + /*Output low level on USB_Disconnect Pin to enable 1.5k ohm pull-up resistor*/ + GPIO_WriteBit(USB_DISCONNECT, USB_DISCONNECT_PIN, Bit_RESET); + +#endif /* STM32F37X && STM32F30X */ + +#if !defined(STM32L1XX_MD) && !defined(STM32L1XX_HD) && !defined(STM32L1XX_MD_PLUS) && !defined(STM32F37X) && !defined(STM32F30X) + /* Enable "DISCONNECT" GPIO clock */ + RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIO_DISCONNECT, ENABLE); + + /* Configure USB pull-up */ + GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_OD; + GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure); + + /* Disable the USB connection till initialization phase end */ + USB_Cable_Config(DISABLE); +#endif /* STM32L1XX_XD */ + +#if defined(USB_USE_EXTERNAL_PULLUP) + /* Enable the USB disconnect GPIO clock */ + RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIO_DISCONNECT, ENABLE); + + /* USB_DISCONNECT used as USB pull-up */ + GPIO_InitStructure.GPIO_Pin = USB_DISCONNECT_PIN; + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_OUT; + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz; + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; + GPIO_Init(USB_DISCONNECT, &GPIO_InitStructure); +#endif /* USB_USE_EXTERNAL_PULLUP */ + + /* Init the media interface */ + MAL_Init(); + USB_Cable_Config(ENABLE); + + /* Configure the EXTI line 18 connected internally to the USB IP */ + EXTI_ClearITPendingBit(EXTI_Line18); + EXTI_InitStructure.EXTI_Line = EXTI_Line18; + EXTI_InitStructure.EXTI_Trigger = EXTI_Trigger_Rising; + EXTI_InitStructure.EXTI_LineCmd = ENABLE; + EXTI_Init(&EXTI_InitStructure); +} + +/******************************************************************************* +* Function Name : Set_USBClock. +* Description : Configures USB Clock input (48MHz). +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Set_USBClock(void) +{ +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE); + +#else + /* Select USBCLK source */ + RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_1Div5); + + /* Enable the USB clock */ + RCC_APB1PeriphClockCmd(RCC_APB1Periph_USB, ENABLE); +#endif /* STM32L1XX_MD */ +} + +/******************************************************************************* +* Function Name : Enter_LowPowerMode. +* Description : Power-off system clocks and power while entering suspend mode. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Enter_LowPowerMode(void) +{ + /* Set the device state to suspend */ + bDeviceState = SUSPENDED; +} + +/******************************************************************************* +* Function Name : Leave_LowPowerMode. +* Description : Restores system clocks and power while exiting suspend mode. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Leave_LowPowerMode(void) +{ + DEVICE_INFO *pInfo = &Device_Info; + + /* Set the device state to the correct state */ + if (pInfo->Current_Configuration != 0) + { + /* Device configured */ + bDeviceState = CONFIGURED; + } + else + { + bDeviceState = ATTACHED; + } + /*Enable SystemCoreClock*/ + SystemInit(); +} + +/******************************************************************************* +* Function Name : USB_Cable_Config. +* Description : Software Connection/Disconnection of USB Cable. +* Input : NewState: new state. +* Output : None. +* Return : None. +*******************************************************************************/ +void USB_Cable_Config (FunctionalState NewState) +{ +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + if (NewState != DISABLE) + { + STM32L15_USB_CONNECT; + } + else + { + STM32L15_USB_DISCONNECT; + } +#else + if (NewState != DISABLE) + { + GPIO_ResetBits(USB_DISCONNECT, USB_DISCONNECT_PIN); + } + else + { + GPIO_SetBits(USB_DISCONNECT, USB_DISCONNECT_PIN); + } +#endif /* STM32L1XX_XD */ +} + +/******************************************************************************* +* Function Name : DFU_Button_Config. +* Description : Configures the DFU selector Button to enter DFU Mode. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void DFU_Button_Config(void) +{ +#if defined (USE_STM32L152_EVAL) + /* Configure "DFU enter" button */ + STM_EVAL_PBInit(Button_UP, Mode_GPIO); +#else + /* Configure "DFU enter" button */ + STM_EVAL_PBInit(Button_KEY, Mode_GPIO); +#endif /* USE_STM32L152_EVAL */ +} + +/******************************************************************************* +* Function Name : DFU_Button_Read. +* Description : Reads the DFU selector Button to enter DFU Mode. +* Input : None. +* Output : None. +* Return : Status +*******************************************************************************/ +uint8_t DFU_Button_Read (void) +{ +#if defined (USE_STM32L152_EVAL) + return STM_EVAL_PBGetState(Button_UP); +#elif defined (USE_STM32L152D_EVAL) + return !STM_EVAL_PBGetState(Button_KEY); +#else + return STM_EVAL_PBGetState(Button_KEY); +#endif /* USE_STM32L152_EVAL */ +} + +/******************************************************************************* +* Function Name : USB_Interrupts_Config. +* Description : Configures the USB interrupts. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void USB_Interrupts_Config(void) +{ + NVIC_InitTypeDef NVIC_InitStructure; + + /* 2 bit for pre-emption priority, 2 bits for subpriority */ + NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2); + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) + NVIC_InitStructure.NVIC_IRQChannel = USB_LP_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Enable the USB Wake-up interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USB_FS_WKUP_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + +#elif defined(STM32F37X) + /* Enable the USB interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USB_LP_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Enable the USB Wake-up interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USBWakeUp_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + +#else + /* Enable the USB interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USB_LP_CAN1_RX0_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 2; + NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + + /* Enable the USB Wake-up interrupt */ + NVIC_InitStructure.NVIC_IRQChannel = USBWakeUp_IRQn; + NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; + NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; + NVIC_Init(&NVIC_InitStructure); + +#endif /* STM32L1XX_XD */ +} + +/******************************************************************************* +* Function Name : Reset_Device. +* Description : Reset the device. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Reset_Device(void) +{ + USB_Cable_Config(DISABLE); + NVIC_SystemReset(); +} + +/******************************************************************************* +* Function Name : Get_SerialNum. +* Description : Create the serial number string descriptor. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void Get_SerialNum(void) +{ + uint32_t Device_Serial0, Device_Serial1, Device_Serial2; + + Device_Serial0 = *(uint32_t*)ID1; + Device_Serial1 = *(uint32_t*)ID2; + Device_Serial2 = *(uint32_t*)ID3; + + Device_Serial0 += Device_Serial2; + + if (Device_Serial0 != 0) + { + IntToUnicode (Device_Serial0, &DFU_StringSerial[2] , 8); + IntToUnicode (Device_Serial1, &DFU_StringSerial[18], 4); + } +} + +/******************************************************************************* +* Function Name : HexToChar. +* Description : Convert Hex 32Bits value into char. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +static void IntToUnicode (uint32_t value , uint8_t *pbuf , uint8_t len) +{ + uint8_t idx = 0; + + for( idx = 0 ; idx < len ; idx ++) + { + if( ((value >> 28)) < 0xA ) + { + pbuf[ 2* idx] = (value >> 28) + '0'; + } + else + { + pbuf[2* idx] = (value >> 28) + 'A' - 10; + } + + value = value << 4; + + pbuf[ 2* idx + 1] = 0; + } +} + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/main.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/main.c new file mode 100644 index 0000000..f4daeec --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/main.c @@ -0,0 +1,118 @@ +/** + ****************************************************************************** + * @file main.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Device Firmware Upgrade(DFU) demo main file + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ + +#include "hw_config.h" +#include "usb_lib.h" +#include "usb_conf.h" +#include "usb_prop.h" +#include "usb_pwr.h" +#include "dfu_mal.h" + +/* Private typedef -----------------------------------------------------------*/ +typedef void (*pFunction)(void); + +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Extern variables ----------------------------------------------------------*/ +uint8_t DeviceState; +uint8_t DeviceStatus[6]; +pFunction Jump_To_Application; +uint32_t JumpAddress; + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : main. +* Description : main routine. +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +int main(void) +{ + +#if defined (USE_STM32L152D_EVAL) + FLASH_Unlock(); + FLASH_ClearFlag(FLASH_FLAG_OPTVERRUSR); +#endif + DFU_Button_Config(); + + /* Check if the Key push-button on STM3210x-EVAL Board is pressed */ + if (DFU_Button_Read() != 0x00) + { /* Test if user code is programmed starting from address 0x8003000 */ + if (((*(__IO uint32_t*)ApplicationAddress) & 0x2FFE0000 ) == 0x20000000) + { /* Jump to user application */ + + JumpAddress = *(__IO uint32_t*) (ApplicationAddress + 4); + Jump_To_Application = (pFunction) JumpAddress; + /* Initialize user application's Stack Pointer */ + __set_MSP(*(__IO uint32_t*) ApplicationAddress); + Jump_To_Application(); + } + } /* Otherwise enters DFU mode to allow user to program his application */ + + /* Enter DFU mode */ + DeviceState = STATE_dfuERROR; + DeviceStatus[0] = STATUS_ERRFIRMWARE; + DeviceStatus[4] = DeviceState; + + Set_System(); + Set_USBClock(); + USB_Init(); + + /* Main loop */ + while (1) + {} +} + + +#ifdef USE_FULL_ASSERT +/******************************************************************************* +* Function Name : assert_failed +* Description : Reports the name of the source file and the source line number +* where the assert_param error has occurred. +* Input : - file: pointer to the source file name +* - line: assert_param error line source number +* Output : None +* Return : None +*******************************************************************************/ +void assert_failed(uint8_t* file, uint32_t line) +{ + /* User can add his own implementation to report the file name and line number, + ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */ + + /* Infinite loop */ + while (1) + {} +} +#endif +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/nor_if.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/nor_if.c new file mode 100644 index 0000000..3b7f7a4 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/nor_if.c @@ -0,0 +1,114 @@ +/** + ****************************************************************************** + * @file nor_if.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief specific media access Layer for NOR flash + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +#include "platform_config.h" + +#ifdef USE_STM3210E_EVAL + +/* Includes ------------------------------------------------------------------*/ +#include "fsmc_nor.h" +#include "nor_if.h" +#include "dfu_mal.h" +#include "stm32f10x_fsmc.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +extern NOR_IDTypeDef NOR_ID; + +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************* +* Function Name : NOR_If_Init +* Description : Initializes the Media on the STM32 +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t NOR_If_Init(void) +{ + /* Configure FSMC Bank1 NOR/SRAM2 */ + FSMC_NOR_Init(); + + /* Enable FSMC Bank1 NOR/SRAM2 */ + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM2, ENABLE); + + return MAL_OK; +} + +/******************************************************************************* +* Function Name : NOR_If_Erase +* Description : Erase sector +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t NOR_If_Erase(uint32_t Address) +{ + /* Erase the destination memory */ + FSMC_NOR_EraseBlock(Address & 0x00FFFFFF); + + return MAL_OK; +} + +/******************************************************************************* +* Function Name : NOR_If_Write +* Description : Write sectors +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +uint16_t NOR_If_Write(uint32_t Address, uint32_t DataLength) +{ + if ((DataLength & 1) == 1) /* Not an aligned data */ + { + DataLength += 1; + MAL_Buffer[DataLength-1] = 0xFF; + } + + FSMC_NOR_WriteBuffer((uint16_t *)MAL_Buffer, (Address&0x00FFFFFF), DataLength >> 1); + + return MAL_OK; +} + +/******************************************************************************* +* Function Name : NOR_If_Read +* Description : Read sectors +* Input : None +* Output : None +* Return : buffer address pointer +*******************************************************************************/ +uint8_t *NOR_If_Read(uint32_t Address, uint32_t DataLength) +{ + return (uint8_t*)(Address); +} + +#endif + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/stm32_it.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/stm32_it.c new file mode 100644 index 0000000..eb64264 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/stm32_it.c @@ -0,0 +1,246 @@ +/** + ****************************************************************************** + * @file stm32_it.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief Main Interrupt Service Routines. + * This file provides template for all exceptions handler and peripherals + * interrupt service routine. + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "hw_config.h" +#include "stm32_it.h" +#include "usb_lib.h" +#include "usb_istr.h" +#include "usb_prop.h" +#include "usb_pwr.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ + +/******************************************************************************/ +/* Cortex-M Processor Exceptions Handlers */ +/******************************************************************************/ + +/******************************************************************************* +* Function Name : NMI_Handler +* Description : This function handles NMI exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void NMI_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : HardFault_Handler +* Description : This function handles Hard Fault exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void HardFault_Handler(void) +{ + /* Go to infinite loop when Hard Fault exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : MemManage_Handler +* Description : This function handles Memory Manage exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void MemManage_Handler(void) +{ + /* Go to infinite loop when Memory Manage exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : BusFault_Handler +* Description : This function handles Bus Fault exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void BusFault_Handler(void) +{ + /* Go to infinite loop when Bus Fault exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : UsageFault_Handler +* Description : This function handles Usage Fault exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void UsageFault_Handler(void) +{ + /* Go to infinite loop when Usage Fault exception occurs */ + while (1) + { + } +} + +/******************************************************************************* +* Function Name : SVC_Handler +* Description : This function handles SVCall exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void SVC_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : DebugMon_Handler +* Description : This function handles Debug Monitor exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void DebugMon_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : PendSV_Handler +* Description : This function handles PendSVC exception. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void PendSV_Handler(void) +{ +} + +/******************************************************************************* +* Function Name : SysTick_Handler +* Description : This function handles SysTick Handler. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +void SysTick_Handler(void) +{ +} + +/******************************************************************************/ +/* STM32 Peripherals Interrupt Handlers */ +/******************************************************************************* +* Function Name : USB_IRQHandler +* Description : This function handles USB Low Priority interrupts +* requests. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS)|| defined (STM32F37X) +void USB_LP_IRQHandler(void) +#else +void USB_LP_CAN1_RX0_IRQHandler(void) +#endif +{ + USB_Istr(); +} +/******************************************************************************* +* Function Name : EXTI15_10_IRQHandler +* Description : This function handles External lines 9 to 5 interrupt request. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ + +#if defined (USE_STM32L152D_EVAL) +void EXTI0_IRQHandler(void) +#elif defined (STM32F37X) +void EXTI2_TS_IRQHandler(void) +#else +void EXTI15_10_IRQHandler(void) +#endif +{ + if (EXTI_GetITStatus(KEY_BUTTON_EXTI_LINE) != RESET) + { + if (pInformation->Current_Feature & 0x20) //Remote wake-up enabled + { + Resume(RESUME_INTERNAL); + } + + /* Clear the EXTI line 9 pending bit */ + EXTI_ClearITPendingBit(KEY_BUTTON_EXTI_LINE); + } +} + +/******************************************************************************* +* Function Name : USB_FS_WKUP_IRQHandler +* Description : This function handles USB WakeUp interrupt request. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ + +#if defined(STM32L1XX_MD) || defined(STM32L1XX_HD)|| defined(STM32L1XX_MD_PLUS) +void USB_FS_WKUP_IRQHandler(void) +#else +void USBWakeUp_IRQHandler(void) +#endif +{ + EXTI_ClearITPendingBit(EXTI_Line18); +} + +/******************************************************************************/ +/* STM32 Peripherals Interrupt Handlers */ +/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */ +/* available peripheral interrupt handler's name please refer to the startup */ +/* file (startup_stm32xxx.s). */ +/******************************************************************************/ + +/******************************************************************************* +* Function Name : PPP_IRQHandler +* Description : This function handles PPP interrupt request. +* Input : None +* Output : None +* Return : None +*******************************************************************************/ +/*void PPP_IRQHandler(void) +{ +}*/ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32f10x.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32f10x.c new file mode 100644 index 0000000..3686a2f --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32f10x.c @@ -0,0 +1,917 @@ +/** + ****************************************************************************** + * @file system_stm32f10x.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * factors, AHB/APBx prescalers and Flash settings). + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32f10x_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the HSI (8 MHz) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32f10x_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and HSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depedning on + * the product used), refer to "HSE_VALUE" define in "stm32f10x.h" file. + * When HSE is used as system clock source, directly or through PLL, and you + * are using different crystal you have to adapt the HSE value to your own + * configuration. + * + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32f10x_system + * @{ + */ + +/** @addtogroup STM32F10x_System_Private_Includes + * @{ + */ + +#include "stm32f10x.h" + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Defines + * @{ + */ + +/*!< Uncomment the line corresponding to the desired System clock (SYSCLK) + frequency (after reset the HSI is used as SYSCLK source) + + IMPORTANT NOTE: + ============== + 1. After each device reset the HSI is used as System clock source. + + 2. Please make sure that the selected System clock doesn't exceed your device's + maximum frequency. + + 3. If none of the define below is enabled, the HSI is used as System clock + source. + + 4. The System clock configuration functions provided within this file assume that: + - For Low, Medium and High density Value line devices an external 8MHz + crystal is used to drive the System clock. + - For Low, Medium and High density devices an external 8MHz crystal is + used to drive the System clock. + - For Connectivity line devices an external 25MHz crystal is used to drive + the System clock. + If you are using different crystal you have to adapt those functions accordingly. + */ + +#if defined (STM32F10X_LD_VL) || (defined STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ + #define SYSCLK_FREQ_24MHz 24000000 +#else +/* #define SYSCLK_FREQ_HSE HSE_VALUE */ +/* #define SYSCLK_FREQ_24MHz 24000000 */ +/* #define SYSCLK_FREQ_36MHz 36000000 */ +/* #define SYSCLK_FREQ_48MHz 48000000 */ +/* #define SYSCLK_FREQ_56MHz 56000000 */ +#define SYSCLK_FREQ_72MHz 72000000 +#endif + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM3210E-EVAL board (STM32 High density and XL-density devices) or on + STM32100E-EVAL board (STM32 High-density value line devices) as data memory */ +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) +/* #define DATA_IN_ExtSRAM */ +#endif + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ + + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Variables + * @{ + */ + +/******************************************************************************* +* Clock Definitions +*******************************************************************************/ +#ifdef SYSCLK_FREQ_HSE + uint32_t SystemCoreClock = SYSCLK_FREQ_HSE; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_24MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_24MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_36MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_36MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_48MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_48MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_56MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_56MHz; /*!< System Clock Frequency (Core Clock) */ +#elif defined SYSCLK_FREQ_72MHz + uint32_t SystemCoreClock = SYSCLK_FREQ_72MHz; /*!< System Clock Frequency (Core Clock) */ +#else /*!< HSI Selected as System Clock source */ + uint32_t SystemCoreClock = HSI_VALUE; /*!< System Clock Frequency (Core Clock) */ +#endif + +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); + +#ifdef SYSCLK_FREQ_HSE + static void SetSysClockToHSE(void); +#elif defined SYSCLK_FREQ_24MHz + static void SetSysClockTo24(void); +#elif defined SYSCLK_FREQ_36MHz + static void SetSysClockTo36(void); +#elif defined SYSCLK_FREQ_48MHz + static void SetSysClockTo48(void); +#elif defined SYSCLK_FREQ_56MHz + static void SetSysClockTo56(void); +#elif defined SYSCLK_FREQ_72MHz + static void SetSysClockTo72(void); +#endif + +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32F10x_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /* Reset the RCC clock configuration to the default reset state(for debug purpose) */ + /* Set HSION bit */ + RCC->CR |= (uint32_t)0x00000001; + + /* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */ + + RCC->CFGR &= (uint32_t)0xF8FF0000; + + /* Reset HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xFEF6FFFF; + + /* Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */ + RCC->CFGR &= (uint32_t)0xFF80FFFF; + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; + + /* Reset CFGR2 register */ + RCC->CFGR2 = 0x00000000; +#else + /* Disable all interrupts and clear pending bits */ + RCC->CIR = 0x009F0000; +#endif /* STM32F10X_XX */ + +#if defined (STM32F10X_HD) || (defined STM32F10X_XL) || (defined STM32F10X_HD_VL) + #ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); + #endif /* DATA_IN_ExtSRAM */ +#endif + + /* Configure the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers */ + /* Configure the Flash Latency cycles and enable prefetch buffer */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock variable according to Clock Register Values. + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value + * 8 MHz or 25 MHz, depending on the product used), user has to ensure + * that HSE_VALUE is same as the real frequency of the crystal used. + * Otherwise, this function may have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmull = 0, pllsource = 0; + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + uint32_t prediv1factor = 0; +#endif /* STM32F10X_LD_VL or STM32F10X_MD_VL or STM32F10X_HD_VL */ + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x04: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x08: /* PLL used as system clock */ + + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmull = RCC->CFGR & RCC_CFGR_PLLMULL; + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + + pllmull = ( pllmull >> 18) + 2; + + if (pllsource == 0x00) + { + /* HSI oscillator clock divided by 2 selected as PLL clock entry */ + SystemCoreClock = (HSI_VALUE >> 1) * pllmull; + } + else + { + #if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || (defined STM32F10X_HD_VL) + prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1; + /* HSE oscillator clock selected as PREDIV1 clock entry */ + SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull; + #else + /* HSE selected as PLL clock entry */ + if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET) + {/* HSE oscillator clock divided by 2 */ + SystemCoreClock = (HSE_VALUE >> 1) * pllmull; + } + else + { + SystemCoreClock = HSE_VALUE * pllmull; + } + #endif + } + + break; + + default: + SystemCoreClock = HSI_VALUE; + break; + } + + /* Compute HCLK clock frequency ----------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, HCLK, PCLK2 and PCLK1 prescalers. + * @param None + * @retval None + */ +static void SetSysClock(void) +{ +#ifdef SYSCLK_FREQ_HSE + SetSysClockToHSE(); +#elif defined SYSCLK_FREQ_24MHz + SetSysClockTo24(); +#elif defined SYSCLK_FREQ_36MHz + SetSysClockTo36(); +#elif defined SYSCLK_FREQ_48MHz + SetSysClockTo48(); +#elif defined SYSCLK_FREQ_56MHz + SetSysClockTo56(); +#elif defined SYSCLK_FREQ_72MHz + SetSysClockTo72(); +#endif + + /* If none of the define above is enabled, the HSI is used as System clock + source (default after reset) */ +} + +/** + * @brief Setup the external memory controller. Called in startup_stm32f10x.s + * before jump to __main + * @param None + * @retval None + */ +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in startup_stm32f10x_xx.s/.c before jump to main. + * This function configures the external SRAM mounted on STM3210E-EVAL + * board (STM32 High density devices). This SRAM will be used as program + * data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is + required, then adjust the Register Addresses */ + + /* Enable FSMC clock */ + RCC->AHBENR = 0x00000114; + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */ + RCC->APB2ENR = 0x000001E0; + +/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/ +/*---------------- SRAM Address lines configuration -------------------------*/ +/*---------------- NOE and NWE configuration --------------------------------*/ +/*---------------- NE3 configuration ----------------------------------------*/ +/*---------------- NBL0, NBL1 configuration ---------------------------------*/ + + GPIOD->CRL = 0x44BB44BB; + GPIOD->CRH = 0xBBBBBBBB; + + GPIOE->CRL = 0xB44444BB; + GPIOE->CRH = 0xBBBBBBBB; + + GPIOF->CRL = 0x44BBBBBB; + GPIOF->CRH = 0xBBBB4444; + + GPIOG->CRL = 0x44BBBBBB; + GPIOG->CRH = 0x44444B44; + +/*---------------- FSMC Configuration ---------------------------------------*/ +/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/ + + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000200; +} +#endif /* DATA_IN_ExtSRAM */ + +#ifdef SYSCLK_FREQ_HSE +/** + * @brief Selects HSE as System clock source and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockToHSE(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* Select HSE as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_HSE; + + /* Wait till HSE is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x04) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_24MHz +/** + * @brief Sets System clock frequency to 24MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo24(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { +#if !defined STM32F10X_LD_VL && !defined STM32F10X_MD_VL && !defined STM32F10X_HD_VL + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 0 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_0; +#endif + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + +#if defined (STM32F10X_LD_VL) || defined (STM32F10X_MD_VL) || defined (STM32F10X_HD_VL) + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_PREDIV1 | RCC_CFGR_PLLXTPRE_PREDIV1_Div2 | RCC_CFGR_PLLMULL6); +#else + /* PLL configuration: = (HSE / 2) * 6 = 24 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL6); +#endif /* STM32F10X_XX */ + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_36MHz +/** + * @brief Sets System clock frequency to 36MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo36(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* PLL configuration: PLLCLK = (HSE / 2) * 9 = 36 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLXTPRE_HSE_Div2 | RCC_CFGR_PLLMULL9); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#elif defined SYSCLK_FREQ_48MHz +/** + * @brief Sets System clock frequency to 48MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo48(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 1 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_1; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 6 = 48 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL6); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_56MHz +/** + * @brief Sets System clock frequency to 56MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo56(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + + /* PLL configuration: PLLCLK = HSE * 7 = 56 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL7); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#elif defined SYSCLK_FREQ_72MHz +/** + * @brief Sets System clock frequency to 72MHz and configure HCLK, PCLK2 + * and PCLK1 prescalers. + * @note This function should be used only after reset. + * @param None + * @retval None + */ +static void SetSysClockTo72(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTBE; + + /* Flash 2 wait state */ + FLASH->ACR &= (uint32_t)((uint32_t)~FLASH_ACR_LATENCY); + FLASH->ACR |= (uint32_t)FLASH_ACR_LATENCY_2; + + + /* HCLK = SYSCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK */ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV2; + + /* PLL configuration: PLLCLK = HSE * 9 = 72 MHz */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLXTPRE | + RCC_CFGR_PLLMULL)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMULL9); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)0x08) + { + } + } + else + { /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} +#endif + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32l1xx.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32l1xx.c new file mode 100644 index 0000000..1be659d --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/system_stm32l1xx.c @@ -0,0 +1,533 @@ +/** + ****************************************************************************** + * @file system_stm32l1xx.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File. + * This file contains the system clock configuration for STM32L1xx Ultra + * Low Power devices, and is generated by the clock configuration + * tool "STM32L1xx_Clock_Configuration_V1.1.0.xls". + * + * 1. This file provides two functions and one global variable to be called from + * user application: + * - SystemInit(): Setups the system clock (System clock source, PLL Multiplier + * and Divider factors, AHB/APBx prescalers and Flash settings), + * depending on the configuration made in the clock xls tool. + * This function is called at startup just after reset and + * before branch to main program. This call is made inside + * the "startup_stm32l1xx_xx.s" file. + * + * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used + * by the user application to setup the SysTick + * timer or configure other parameters. + * + * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must + * be called whenever the core clock is changed + * during program execution. + * + * 2. After each device reset the MSI (2.1 MHz Range) is used as system clock source. + * Then SystemInit() function is called, in "startup_stm32l1xx_xx.s" file, to + * configure the system clock before to branch to main program. + * + * 3. If the system clock source selected by user fails to startup, the SystemInit() + * function will do nothing and MSI still used as system clock source. User can + * add some code to deal with this issue inside the SetSysClock() function. + * + * 4. The default value of HSE crystal is set to 8MHz, refer to "HSE_VALUE" define + * in "stm32l1xx.h" file. When HSE is used as system clock source, directly or + * through PLL, and you are using different crystal you have to adapt the HSE + * value to your own configuration. + * + * 5. This file configures the system clock as follows: + *============================================================================= + * System Clock Configuration + *============================================================================= + * System Clock source | PLL(HSE) + *----------------------------------------------------------------------------- + * SYSCLK | 32000000 Hz + *----------------------------------------------------------------------------- + * HCLK | 32000000 Hz + *----------------------------------------------------------------------------- + * AHB Prescaler | 1 + *----------------------------------------------------------------------------- + * APB1 Prescaler | 1 + *----------------------------------------------------------------------------- + * APB2 Prescaler | 1 + *----------------------------------------------------------------------------- + * HSE Frequency | 8000000 Hz + *----------------------------------------------------------------------------- + * PLL DIV | 3 + *----------------------------------------------------------------------------- + * PLL MUL | 12 + *----------------------------------------------------------------------------- + * VDD | 3.3 V + *----------------------------------------------------------------------------- + * Vcore | 1.8 V (Range 1) + *----------------------------------------------------------------------------- + * Flash Latency | 1 WS + *----------------------------------------------------------------------------- + * SDIO clock (SDIOCLK) | 48000000 Hz + *----------------------------------------------------------------------------- + * Require 48MHz for USB clock | Disabled + *----------------------------------------------------------------------------- + *============================================================================= + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/** @addtogroup CMSIS + * @{ + */ + +/** @addtogroup stm32l1xx_system + * @{ + */ + +/** @addtogroup STM32L1xx_System_Private_Includes + * @{ + */ + +#include "stm32l1xx.h" + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_TypesDefinitions + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Defines + * @{ + */ + +/*!< Uncomment the following line if you need to use external SRAM mounted + on STM32L152D_EVAL board as data memory */ +/* #define DATA_IN_ExtSRAM */ + +/*!< Uncomment the following line if you need to relocate your vector Table in + Internal SRAM. */ +/* #define VECT_TAB_SRAM */ +#define VECT_TAB_OFFSET 0x0 /*!< Vector Table base offset field. + This value must be a multiple of 0x200. */ +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Macros + * @{ + */ + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Variables + * @{ + */ +uint32_t SystemCoreClock = 32000000; +__I uint8_t PLLMulTable[9] = {3, 4, 6, 8, 12, 16, 24, 32, 48}; +__I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9}; + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_FunctionPrototypes + * @{ + */ + +static void SetSysClock(void); +#ifdef DATA_IN_ExtSRAM + static void SystemInit_ExtMemCtl(void); +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** @addtogroup STM32L1xx_System_Private_Functions + * @{ + */ + +/** + * @brief Setup the microcontroller system. + * Initialize the Embedded Flash Interface, the PLL and update the + * SystemCoreClock variable. + * @param None + * @retval None + */ +void SystemInit (void) +{ + /*!< Set MSION bit */ + RCC->CR |= (uint32_t)0x00000100; + + /*!< Reset SW[1:0], HPRE[3:0], PPRE1[2:0], PPRE2[2:0], MCOSEL[2:0] and MCOPRE[2:0] bits */ + RCC->CFGR &= (uint32_t)0x88FFC00C; + + /*!< Reset HSION, HSEON, CSSON and PLLON bits */ + RCC->CR &= (uint32_t)0xEEFEFFFE; + + /*!< Reset HSEBYP bit */ + RCC->CR &= (uint32_t)0xFFFBFFFF; + + /*!< Reset PLLSRC, PLLMUL[3:0] and PLLDIV[1:0] bits */ + RCC->CFGR &= (uint32_t)0xFF02FFFF; + + /*!< Disable all interrupts */ + RCC->CIR = 0x00000000; + +#ifdef DATA_IN_ExtSRAM + SystemInit_ExtMemCtl(); +#endif /* DATA_IN_ExtSRAM */ + + /* Configure the System clock frequency, AHB/APBx prescalers and Flash settings */ + SetSysClock(); + +#ifdef VECT_TAB_SRAM + SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */ +#else + SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */ +#endif +} + +/** + * @brief Update SystemCoreClock according to Clock Register Values + * The SystemCoreClock variable contains the core clock (HCLK), it can + * be used by the user application to setup the SysTick timer or configure + * other parameters. + * + * @note Each time the core clock (HCLK) changes, this function must be called + * to update SystemCoreClock variable value. Otherwise, any configuration + * based on this variable will be incorrect. + * + * @note - The system frequency computed by this function is not the real + * frequency in the chip. It is calculated based on the predefined + * constant and the selected clock source: + * + * - If SYSCLK source is MSI, SystemCoreClock will contain the MSI + * value as defined by the MSI range. + * + * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*) + * + * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**) + * + * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**) + * or HSI_VALUE(*) multiplied/divided by the PLL factors. + * + * (*) HSI_VALUE is a constant defined in stm32l1xx.h file (default value + * 16 MHz) but the real value may vary depending on the variations + * in voltage and temperature. + * + * (**) HSE_VALUE is a constant defined in stm32l1xx.h file (default value + * 8 MHz), user has to ensure that HSE_VALUE is same as the real + * frequency of the crystal used. Otherwise, this function may + * have wrong result. + * + * - The result of this function could be not correct when using fractional + * value for HSE crystal. + * @param None + * @retval None + */ +void SystemCoreClockUpdate (void) +{ + uint32_t tmp = 0, pllmul = 0, plldiv = 0, pllsource = 0, msirange = 0; + + /* Get SYSCLK source -------------------------------------------------------*/ + tmp = RCC->CFGR & RCC_CFGR_SWS; + + switch (tmp) + { + case 0x00: /* MSI used as system clock */ + msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13; + SystemCoreClock = (32768 * (1 << (msirange + 1))); + break; + case 0x04: /* HSI used as system clock */ + SystemCoreClock = HSI_VALUE; + break; + case 0x08: /* HSE used as system clock */ + SystemCoreClock = HSE_VALUE; + break; + case 0x0C: /* PLL used as system clock */ + /* Get PLL clock source and multiplication factor ----------------------*/ + pllmul = RCC->CFGR & RCC_CFGR_PLLMUL; + plldiv = RCC->CFGR & RCC_CFGR_PLLDIV; + pllmul = PLLMulTable[(pllmul >> 18)]; + plldiv = (plldiv >> 22) + 1; + + pllsource = RCC->CFGR & RCC_CFGR_PLLSRC; + + if (pllsource == 0x00) + { + /* HSI oscillator clock selected as PLL clock entry */ + SystemCoreClock = (((HSI_VALUE) * pllmul) / plldiv); + } + else + { + /* HSE selected as PLL clock entry */ + SystemCoreClock = (((HSE_VALUE) * pllmul) / plldiv); + } + break; + default: /* MSI used as system clock */ + msirange = (RCC->ICSCR & RCC_ICSCR_MSIRANGE) >> 13; + SystemCoreClock = (32768 * (1 << (msirange + 1))); + break; + } + /* Compute HCLK clock frequency --------------------------------------------*/ + /* Get HCLK prescaler */ + tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)]; + /* HCLK clock frequency */ + SystemCoreClock >>= tmp; +} + +/** + * @brief Configures the System clock frequency, AHB/APBx prescalers and Flash + * settings. + * @note This function should be called only once the RCC clock configuration + * is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ +static void SetSysClock(void) +{ + __IO uint32_t StartUpCounter = 0, HSEStatus = 0; + + /* SYSCLK, HCLK, PCLK2 and PCLK1 configuration ---------------------------*/ + /* Enable HSE */ + RCC->CR |= ((uint32_t)RCC_CR_HSEON); + + /* Wait till HSE is ready and if Time out is reached exit */ + do + { + HSEStatus = RCC->CR & RCC_CR_HSERDY; + StartUpCounter++; + } while((HSEStatus == 0) && (StartUpCounter != HSE_STARTUP_TIMEOUT)); + + if ((RCC->CR & RCC_CR_HSERDY) != RESET) + { + HSEStatus = (uint32_t)0x01; + } + else + { + HSEStatus = (uint32_t)0x00; + } + + if (HSEStatus == (uint32_t)0x01) + { + /* Enable 64-bit access */ + FLASH->ACR |= FLASH_ACR_ACC64; + + /* Enable Prefetch Buffer */ + FLASH->ACR |= FLASH_ACR_PRFTEN; + + /* Flash 1 wait state */ + FLASH->ACR |= FLASH_ACR_LATENCY; + + /* Power enable */ + RCC->APB1ENR |= RCC_APB1ENR_PWREN; + + /* Select the Voltage Range 1 (1.8 V) */ + PWR->CR = PWR_CR_VOS_0; + + /* Wait Until the Voltage Regulator is ready */ + while((PWR->CSR & PWR_CSR_VOSF) != RESET) + { + } + + /* HCLK = SYSCLK /1*/ + RCC->CFGR |= (uint32_t)RCC_CFGR_HPRE_DIV1; + + /* PCLK2 = HCLK /1*/ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE2_DIV1; + + /* PCLK1 = HCLK /1*/ + RCC->CFGR |= (uint32_t)RCC_CFGR_PPRE1_DIV1; + + /* PLL configuration */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_PLLSRC | RCC_CFGR_PLLMUL | + RCC_CFGR_PLLDIV)); + RCC->CFGR |= (uint32_t)(RCC_CFGR_PLLSRC_HSE | RCC_CFGR_PLLMUL12 | RCC_CFGR_PLLDIV3); + + /* Enable PLL */ + RCC->CR |= RCC_CR_PLLON; + + /* Wait till PLL is ready */ + while((RCC->CR & RCC_CR_PLLRDY) == 0) + { + } + + /* Select PLL as system clock source */ + RCC->CFGR &= (uint32_t)((uint32_t)~(RCC_CFGR_SW)); + RCC->CFGR |= (uint32_t)RCC_CFGR_SW_PLL; + + /* Wait till PLL is used as system clock source */ + while ((RCC->CFGR & (uint32_t)RCC_CFGR_SWS) != (uint32_t)RCC_CFGR_SWS_PLL) + { + } + } + else + { + /* If HSE fails to start-up, the application will have wrong clock + configuration. User can add here some code to deal with this error */ + } +} + +#ifdef DATA_IN_ExtSRAM +/** + * @brief Setup the external memory controller. + * Called in SystemInit() function before jump to main. + * This function configures the external SRAM mounted on STM32L152D_EVAL board + * This SRAM will be used as program data memory (including heap and stack). + * @param None + * @retval None + */ +void SystemInit_ExtMemCtl(void) +{ +/*-- GPIOs Configuration -----------------------------------------------------*/ +/* + +-------------------+--------------------+------------------+------------------+ + + SRAM pins assignment + + +-------------------+--------------------+------------------+------------------+ + | PD0 <-> FSMC_D2 | PE0 <-> FSMC_NBL0 | PF0 <-> FSMC_A0 | PG0 <-> FSMC_A10 | + | PD1 <-> FSMC_D3 | PE1 <-> FSMC_NBL1 | PF1 <-> FSMC_A1 | PG1 <-> FSMC_A11 | + | PD4 <-> FSMC_NOE | PE7 <-> FSMC_D4 | PF2 <-> FSMC_A2 | PG2 <-> FSMC_A12 | + | PD5 <-> FSMC_NWE | PE8 <-> FSMC_D5 | PF3 <-> FSMC_A3 | PG3 <-> FSMC_A13 | + | PD8 <-> FSMC_D13 | PE9 <-> FSMC_D6 | PF4 <-> FSMC_A4 | PG4 <-> FSMC_A14 | + | PD9 <-> FSMC_D14 | PE10 <-> FSMC_D7 | PF5 <-> FSMC_A5 | PG5 <-> FSMC_A15 | + | PD10 <-> FSMC_D15 | PE11 <-> FSMC_D8 | PF12 <-> FSMC_A6 | PG10<-> FSMC_NE2 | + | PD11 <-> FSMC_A16 | PE12 <-> FSMC_D9 | PF13 <-> FSMC_A7 |------------------+ + | PD12 <-> FSMC_A17 | PE13 <-> FSMC_D10 | PF14 <-> FSMC_A8 | + | PD13 <-> FSMC_A18 | PE14 <-> FSMC_D11 | PF15 <-> FSMC_A9 | + | PD14 <-> FSMC_D0 | PE15 <-> FSMC_D12 |------------------+ + | PD15 <-> FSMC_D1 |--------------------+ + +-------------------+ +*/ + + /* Enable GPIOD, GPIOE, GPIOF and GPIOG interface clock */ + RCC->AHBENR = 0x000080D8; + + /* Connect PDx pins to FSMC Alternate function */ + GPIOD->AFR[0] = 0x00CC00CC; + GPIOD->AFR[1] = 0xCCCCCCCC; + /* Configure PDx pins in Alternate function mode */ + GPIOD->MODER = 0xAAAA0A0A; + /* Configure PDx pins speed to 40 MHz */ + GPIOD->OSPEEDR = 0xFFFF0F0F; + /* Configure PDx pins Output type to push-pull */ + GPIOD->OTYPER = 0x00000000; + /* No pull-up, pull-down for PDx pins */ + GPIOD->PUPDR = 0x00000000; + + /* Connect PEx pins to FSMC Alternate function */ + GPIOE->AFR[0] = 0xC00000CC; + GPIOE->AFR[1] = 0xCCCCCCCC; + /* Configure PEx pins in Alternate function mode */ + GPIOE->MODER = 0xAAAA800A; + /* Configure PEx pins speed to 40 MHz */ + GPIOE->OSPEEDR = 0xFFFFC00F; + /* Configure PEx pins Output type to push-pull */ + GPIOE->OTYPER = 0x00000000; + /* No pull-up, pull-down for PEx pins */ + GPIOE->PUPDR = 0x00000000; + + /* Connect PFx pins to FSMC Alternate function */ + GPIOF->AFR[0] = 0x00CCCCCC; + GPIOF->AFR[1] = 0xCCCC0000; + /* Configure PFx pins in Alternate function mode */ + GPIOF->MODER = 0xAA000AAA; + /* Configure PFx pins speed to 40 MHz */ + GPIOF->OSPEEDR = 0xFF000FFF; + /* Configure PFx pins Output type to push-pull */ + GPIOF->OTYPER = 0x00000000; + /* No pull-up, pull-down for PFx pins */ + GPIOF->PUPDR = 0x00000000; + + /* Connect PGx pins to FSMC Alternate function */ + GPIOG->AFR[0] = 0x00CCCCCC; + GPIOG->AFR[1] = 0x00000C00; + /* Configure PGx pins in Alternate function mode */ + GPIOG->MODER = 0x00200AAA; + /* Configure PGx pins speed to 40 MHz */ + GPIOG->OSPEEDR = 0x00300FFF; + /* Configure PGx pins Output type to push-pull */ + GPIOG->OTYPER = 0x00000000; + /* No pull-up, pull-down for PGx pins */ + GPIOG->PUPDR = 0x00000000; + +/*-- FSMC Configuration ------------------------------------------------------*/ + /* Enable the FSMC interface clock */ + RCC->AHBENR = 0x400080D8; + + /* Configure and enable Bank1_SRAM3 */ + FSMC_Bank1->BTCR[4] = 0x00001011; + FSMC_Bank1->BTCR[5] = 0x00000300; + FSMC_Bank1E->BWTR[4] = 0x0FFFFFFF; +/* + Bank1_SRAM3 is configured as follow: + + p.FSMC_AddressSetupTime = 0; + p.FSMC_AddressHoldTime = 0; + p.FSMC_DataSetupTime = 3; + p.FSMC_BusTurnAroundDuration = 0; + p.FSMC_CLKDivision = 0; + p.FSMC_DataLatency = 0; + p.FSMC_AccessMode = FSMC_AccessMode_A; + + FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM3; + FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable; + FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM; + FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b; + FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low; + FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState; + FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable; + FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable; + FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable; + FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable; + FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p; + FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p; + + FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); + + FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM3, ENABLE); +*/ + +} +#endif /* DATA_IN_ExtSRAM */ + +/** + * @} + */ + +/** + * @} + */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_istr.c b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_istr.c new file mode 100644 index 0000000..c863226 --- /dev/null +++ b/thirdparty/STM32_USB-FS-Device_Lib_V4.0.0/Projects/Device_Firmware_Upgrade/src/usb_istr.c @@ -0,0 +1,231 @@ +/** + ****************************************************************************** + * @file usb_istr.c + * @author MCD Application Team + * @version V4.0.0 + * @date 21-January-2013 + * @brief ISTR events interrupt service routines + ****************************************************************************** + * @attention + * + * <h2><center>© COPYRIGHT 2013 STMicroelectronics</center></h2> + * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Includes ------------------------------------------------------------------*/ +#include "usb_lib.h" +#include "usb_prop.h" +#include "usb_pwr.h" +#include "usb_istr.h" + +/* Private typedef -----------------------------------------------------------*/ +/* Private define ------------------------------------------------------------*/ +/* Private macro -------------------------------------------------------------*/ +/* Private variables ---------------------------------------------------------*/ +__IO uint16_t wIstr; /* ISTR register last read value */ +__IO uint8_t bIntPackSOF = 0; /* SOFs received between 2 consecutive packets */ +__IO uint32_t esof_counter =0; /* expected SOF counter */ +__IO uint32_t wCNTR=0; + +/* Extern variables ----------------------------------------------------------*/ +/* Private function prototypes -----------------------------------------------*/ +/* Private functions ---------------------------------------------------------*/ +/* function pointers to non-control endpoints service routines */ +void (*pEpInt_IN[7])(void) = + { + EP1_IN_Callback, + EP2_IN_Callback, + EP3_IN_Callback, + EP4_IN_Callback, + EP5_IN_Callback, + EP6_IN_Callback, + EP7_IN_Callback, + }; + +void (*pEpInt_OUT[7])(void) = + { + EP1_OUT_Callback, + EP2_OUT_Callback, + EP3_OUT_Callback, + EP4_OUT_Callback, + EP5_OUT_Callback, + EP6_OUT_Callback, + EP7_OUT_Callback, + }; + +/******************************************************************************* +* Function Name : USB_Istr +* Description : ISTR events interrupt service routine +* Input : None. +* Output : None. +* Return : None. +*******************************************************************************/ +void USB_Istr(void) +{ + uint32_t i=0; + __IO uint32_t EP[8]; + + wIstr = _GetISTR(); + +#if (IMR_MSK & ISTR_CTR) + if (wIstr & ISTR_CTR & wInterrupt_Mask) + { + /* servicing of the endpoint correct transfer interrupt */ + /* clear of the CTR flag into the sub */ + CTR_LP(); +#ifdef CTR_CALLBACK + CTR_Callback(); +#endif + } +#endif + /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +#if (IMR_MSK & ISTR_RESET) + if (wIstr & ISTR_RESET & wInterrupt_Mask) + { + _SetISTR((uint16_t)CLR_RESET); + Device_Property.Reset(); +#ifdef RESET_CALLBACK + RESET_Callback(); +#endif + } +#endif + /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +#if (IMR_MSK & ISTR_DOVR) + if (wIstr & ISTR_DOVR & wInterrupt_Mask) + { + _SetISTR((uint16_t)CLR_DOVR); +#ifdef DOVR_CALLBACK + DOVR_Callback(); +#endif + } +#endif + /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +#if (IMR_MSK & ISTR_ERR) + if (wIstr & ISTR_ERR & wInterrupt_Mask) + { + _SetISTR((uint16_t)CLR_ERR); +#ifdef ERR_CALLBACK + ERR_Callback(); +#endif + } +#endif + /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +#if (IMR_MSK & ISTR_WKUP) + if (wIstr & ISTR_WKUP & wInterrupt_Mask) + { + _SetISTR((uint16_t)CLR_WKUP); + Resume(RESUME_EXTERNAL); +#ifdef WKUP_CALLBACK + WKUP_Callback(); +#endif + } +#endif + /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +#if (IMR_MSK & ISTR_SUSP) + if (wIstr & ISTR_SUSP & wInterrupt_Mask) + { + + /* check if SUSPEND is possible */ + if (fSuspendEnabled) + { + Suspend(); + } + else + { + /* if not possible then resume after xx ms */ + Resume(RESUME_LATER); + } + /* clear of the ISTR bit must be done after setting of CNTR_FSUSP */ + _SetISTR((uint16_t)CLR_SUSP); +#ifdef SUSP_CALLBACK + SUSP_Callback(); +#endif + } +#endif + /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +#if (IMR_MSK & ISTR_SOF) + if (wIstr & ISTR_SOF & wInterrupt_Mask) + { + _SetISTR((uint16_t)CLR_SOF); + bIntPackSOF++; + +#ifdef SOF_CALLBACK + SOF_Callback(); +#endif + } +#endif + /*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/ +#if (IMR_MSK & ISTR_ESOF) + if (wIstr & ISTR_ESOF & wInterrupt_Mask) + { + /* clear ESOF flag in ISTR */ + _SetISTR((uint16_t)CLR_ESOF); + + if ((_GetFNR()&FNR_RXDP)!=0) + { + /* increment ESOF counter */ + esof_counter ++; + + /* test if we enter in ESOF more than 3 times with FSUSP =0 and RXDP =1=>> possible missing SUSP flag*/ + if ((esof_counter >3)&&((_GetCNTR()&CNTR_FSUSP)==0)) + { + /* this a sequence to apply a force RESET*/ + + /*Store CNTR value */ + wCNTR = _GetCNTR(); + + /*Store endpoints registers status */ + for (i=0;i<8;i++) EP[i] = _GetENDPOINT(i); + + /*apply FRES */ + wCNTR|=CNTR_FRES; + _SetCNTR(wCNTR); + + /*clear FRES*/ + wCNTR&=~CNTR_FRES; + _SetCNTR(wCNTR); + + /*poll for RESET flag in ISTR*/ + while((_GetISTR()&ISTR_RESET) == 0); + + /* clear RESET flag in ISTR */ + _SetISTR((uint16_t)CLR_RESET); + + /*restore Enpoints*/ + for (i=0;i<8;i++) + _SetENDPOINT(i, EP[i]); + + esof_counter = 0; + } + } + else + { + esof_counter = 0; + } + + /* resume handling timing is made with ESOFs */ + Resume(RESUME_ESOF); /* request without change of the machine state */ + +#ifdef ESOF_CALLBACK + ESOF_Callback(); +#endif + } +#endif +} /* USB_Istr */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + |