wip: Parsing schematics.

7 files changed, 2936 insertions, 0 deletions

diff --git a/test/parser/foo.pro b/test/parser/foo.pro
new file mode 100644
index 0000000..52c16a1
--- /dev/null
+++ b/test/parser/foo.pro
@@ -0,0 +1,63 @@
+update=ti. 29. aug. 2017 kl. 21.41 +0200
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=foo-rescue
+LibName2=power
+LibName3=device
+LibName4=transistors
+LibName5=conn
+LibName6=linear
+LibName7=regul
+LibName8=74xx
+LibName9=cmos4000
+LibName10=adc-dac
+LibName11=memory
+LibName12=xilinx
+LibName13=microcontrollers
+LibName14=dsp
+LibName15=microchip
+LibName16=analog_switches
+LibName17=motorola
+LibName18=texas
+LibName19=intel
+LibName20=audio
+LibName21=interface
+LibName22=digital-audio
+LibName23=philips
+LibName24=display
+LibName25=cypress
+LibName26=siliconi
+LibName27=opto
+LibName28=atmel
+LibName29=contrib
+LibName30=valves
diff --git a/test/parser/foo.sch b/test/parser/foo.sch
new file mode 100644
index 0000000..cfedec7
--- /dev/null
+++ b/test/parser/foo.sch
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+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:sweetzpot_misc
+LIBS:mcp6421_mcp6422_mcp6424
+LIBS:mcp6041_mcp6042_mcp6043_mcp6044
+LIBS:sweetzpot_power_symbols
+LIBS:mcp4018
+LIBS:sweetzpot_nrf52832
+LIBS:max30003
+LIBS:em7180sfp
+LIBS:MMBD4148
+LIBS:ASTMKH
+LIBS:TCR2LF
+LIBS:rateboard-2_b-cache
+EELAYER 25 0
+EELAYER END
+$Descr A3 16535 11693
+encoding utf-8
+Sheet 1 1
+Title "SweetZpot Sensor"
+Date "2017-08-04"
+Rev "2_b"
+Comp "SweetZpot AS"
+Comment1 ""
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+	1    14200 2850
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+Wire Wire Line
+	11000 7900 11000 8500
+Wire Wire Line
+	11400 7600 11400 7500
+Wire Wire Line
+	11200 7600 11400 7600
+Connection ~ 10700 7600
+Wire Wire Line
+	10500 7600 10800 7600
+Wire Wire Line
+	10500 7500 10500 7600
+Wire Wire Line
+	10700 7500 10700 7600
+Wire Wire Line
+	11300 7600 11300 7700
+Connection ~ 11300 7600
+Wire Wire Line
+	11300 8000 11300 8100
+Wire Notes Line
+	9400 8700 12300 8700
+Wire Wire Line
+	10100 9700 10200 9700
+Wire Wire Line
+	10200 9700 10200 10100
+Wire Wire Line
+	10200 10000 10500 10000
+Wire Wire Line
+	10500 10000 10500 9900
+Connection ~ 10200 10000
+Wire Wire Line
+	10300 9600 10100 9600
+Wire Wire Line
+	10700 9600 11400 9600
+Connection ~ 11000 9600
+Wire Wire Line
+	13100 600  13100 1100
+Wire Wire Line
+	13100 600  11550 600 
+Wire Wire Line
+	12700 900  12700 1100
+Wire Bus Line
+	7750 2700 7750 3050
+Wire Wire Line
+	5700 4300 5700 4500
+Wire Wire Line
+	5700 4900 5700 4800
+Connection ~ 5400 4900
+Wire Wire Line
+	3900 4300 3900 4500
+Wire Wire Line
+	3900 4800 3900 4900
+Connection ~ 4200 4900
+Wire Wire Line
+	1600 1600 1600 1800
+Wire Wire Line
+	1600 1700 2000 1700
+Wire Wire Line
+	2000 1700 2000 1800
+Connection ~ 1600 1700
+Wire Wire Line
+	1600 1200 1600 1300
+Wire Wire Line
+	1200 1200 2200 1200
+Wire Wire Line
+	1600 2200 1600 2100
+Wire Wire Line
+	1300 2200 1300 1800
+Connection ~ 1600 2200
+Wire Wire Line
+	1300 1200 1300 1500
+Connection ~ 1600 1200
+Connection ~ 1300 1200
+Connection ~ 1300 2200
+Wire Wire Line
+	900  1200 600  1200
+Wire Wire Line
+	900  2200 600  2200
+Wire Wire Line
+	2200 1200 2200 2100
+Wire Wire Line
+	2200 2100 2400 2100
+Wire Wire Line
+	1800 3800 2200 3800
+Wire Wire Line
+	2200 3800 2200 2950
+Wire Wire Line
+	2200 2950 2400 2950
+$Comp
+L GND #PWR043
+U 1 1 598E6B65
+P 2850 3850
+F 0 "#PWR043" H 2850 3600 50  0001 C CNN
+F 1 "GND" H 2850 3700 50  0000 C CNN
+F 2 "" H 2850 3850 50  0000 C CNN
+F 3 "" H 2850 3850 50  0000 C CNN
+	1    2850 3850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2850 3750 2850 3850
+$Comp
+L GND #PWR044
+U 1 1 598E6DD6
+P 3050 3850
+F 0 "#PWR044" H 3050 3600 50  0001 C CNN
+F 1 "GND" H 3050 3700 50  0000 C CNN
+F 2 "" H 3050 3850 50  0000 C CNN
+F 3 "" H 3050 3850 50  0000 C CNN
+	1    3050 3850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3050 3750 3050 3850
+$Comp
+L GND #PWR045
+U 1 1 598E6F13
+P 3250 3850
+F 0 "#PWR045" H 3250 3600 50  0001 C CNN
+F 1 "GND" H 3250 3700 50  0000 C CNN
+F 2 "" H 3250 3850 50  0000 C CNN
+F 3 "" H 3250 3850 50  0000 C CNN
+	1    3250 3850
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3250 3750 3250 3850
+Text Label 800  3400 0    60   ~ 0
+HR_ENABLE
+Wire Wire Line
+	9850 6750 9750 6750
+Connection ~ 9750 6750
+Connection ~ 9650 6550
+$Comp
+L C C9
+U 1 1 599B9B2C
+P 3250 3600
+F 0 "C9" H 3275 3700 50  0000 L CNN
+F 1 "1u" H 3275 3500 50  0000 L CNN
+F 2 "Capacitors_SMD:C_0402" H 3288 3450 50  0001 C CNN
+F 3 "" H 3250 3600 50  0000 C CNN
+F 4 "490-10694-2-ND" H 3250 3600 60  0001 C CNN "digikey"
+F 5 "GRM155R61C105KA12D" H 3250 3600 60  0001 C CNN "part"
+	1    3250 3600
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	9750 6650 9750 6850
+Wire Wire Line
+	9650 6550 9650 6450
+Wire Wire Line
+	11600 6550 11600 6350
+Wire Wire Line
+	11800 6350 11800 6650
+Wire Wire Line
+	11000 8500 11600 8500
+$EndSCHEMATC
diff --git a/test/parser/parser-demo-1-cache.lib b/test/parser/parser-demo-1-cache.lib
new file mode 100644
index 0000000..c46e7b1
--- /dev/null
+++ b/test/parser/parser-demo-1-cache.lib
@@ -0,0 +1,47 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# NE5534
+#
+DEF NE5534 U 0 20 Y Y 1 F N
+F0 "U" 50 250 50 H V L CNN
+F1 "NE5534" 50 150 50 H V L CNN
+F2 "" 50 50 50 H I C CNN
+F3 "" 50 150 50 H I C CNN
+ALIAS SA5534 LM101 LM201 LM301
+$FPLIST
+ DIP*W7.62mm*
+ SOIC*3.9x4.9mm*Pitch1.27mm*
+$ENDFPLIST
+DRAW
+P 4 0 1 10 -200 200 200 0 -200 -200 -200 200 f
+X ~ 1 0 -300 200 U 50 50 1 1 I
+X - 2 -300 -100 100 R 50 50 1 1 I
+X + 3 -300 100 100 R 50 50 1 1 I
+X V- 4 -100 -300 150 U 50 50 1 1 W
+X ~ 5 100 -300 250 U 50 50 1 1 I
+X ~ 6 300 0 100 L 50 50 1 1 O
+X V+ 7 -100 300 150 D 50 50 1 1 W
+X ~ 8 0 300 200 D 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# R
+#
+DEF R R 0 0 N Y 1 F N
+F0 "R" 80 0 50 V V C CNN
+F1 "R" 0 0 50 V V C CNN
+F2 "" -70 0 50 V I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ R_*
+ R_*
+$ENDFPLIST
+DRAW
+S -40 -100 40 100 0 1 10 N
+X ~ 1 0 150 50 D 50 50 1 1 P
+X ~ 2 0 -150 50 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/test/parser/parser-demo-1.kicad_pcb b/test/parser/parser-demo-1.kicad_pcb
new file mode 100644
index 0000000..02c8ecb
--- /dev/null
+++ b/test/parser/parser-demo-1.kicad_pcb
@@ -0,0 +1 @@
+(kicad_pcb (version 4) (host kicad "dummy file") )
diff --git a/test/parser/parser-demo-1.pro b/test/parser/parser-demo-1.pro
new file mode 100644
index 0000000..355a8cb
--- /dev/null
+++ b/test/parser/parser-demo-1.pro
@@ -0,0 +1,60 @@
+update=sø. 27. aug. 2017 kl. 00.42 +0200
+version=1
+last_client=kicad
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=device
+LibName3=transistors
+LibName4=conn
+LibName5=linear
+LibName6=regul
+LibName7=74xx
+LibName8=cmos4000
+LibName9=adc-dac
+LibName10=memory
+LibName11=xilinx
+LibName12=microcontrollers
+LibName13=dsp
+LibName14=microchip
+LibName15=analog_switches
+LibName16=motorola
+LibName17=texas
+LibName18=intel
+LibName19=audio
+LibName20=interface
+LibName21=digital-audio
+LibName22=philips
+LibName23=display
+LibName24=cypress
+LibName25=siliconi
+LibName26=opto
+LibName27=atmel
+LibName28=contrib
+LibName29=valves
+[general]
+version=1
diff --git a/test/parser/parser-demo-1.sch b/test/parser/parser-demo-1.sch
new file mode 100644
index 0000000..0dad706
--- /dev/null
+++ b/test/parser/parser-demo-1.sch
@@ -0,0 +1,68 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:device
+LIBS:transistors
+LIBS:conn
+LIBS:linear
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L LM101 U101
+U 1 1 59A1FBDB
+P 3400 2400
+F 0 "U101" H 3450 2650 50  0000 L CNN
+F 1 "LM101 \"X\"" H 3450 2550 50  0000 L CNN
+F 2 "" H 3450 2450 50  0001 C CNN
+F 3 "" H 3450 2550 50  0001 C CNN
+F 4 "1234" H 3400 2400 60  0001 C CNN "mpn"
+	1    3400 2400
+	1    0    0    -1  
+$EndComp
+$Comp
+L R R101
+U 1 1 59A2E082
+P 4300 2200
+F 0 "R101" V 4380 2200 50  0000 C CNN
+F 1 "10k" V 4300 2200 50  0000 C CNN
+F 2 "" V 4230 2200 50  0001 C CNN
+F 3 "" H 4300 2200 50  0001 C CNN
+	1    4300 2200
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC
diff --git a/test/test_sch.py b/test/test_sch.py
new file mode 100644
index 0000000..a3c6915
--- /dev/null
+++ b/test/test_sch.py
@@ -0,0 +1,34 @@
+import pytest
+import sys
+import os.path
+from ee.kicad import read_schematic
+ 
+basedir = os.path.dirname(os.path.abspath(__file__))
+
+def dump_schema(sch):
+  print("Libraries")
+  for l in sch.libraries:
+    print("name: {}".format(l.name))
+
+  print("Components")
+  for c in sch.components:
+    if c.unit != 1:
+      continue
+    print("REF: {}, fields={}".format(c.ref if c.unit == 1 else "{}/{}".format(c.ref, c.unit), len(c.fields)))
+    for f in c.fields:
+      print(" {}={}".format(f.name, f.value))
+
+def load(path):
+    p = basedir + "/parser/" + path
+    print("p={}".format(p))
+    return read_schematic(p)
+
+def test_demo_1():
+    sch = load("parser-demo-1.sch")
+    dump_schema(sch)
+    r101 = sch.get_component("R101")
+    assert r101
+
+def test_sch():
+    sch = load("foo.sch")
+    dump_schema(sch)