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| author | Trygve Laugstøl <trygvis@inamo.no> | 2018-08-15 12:35:43 +0200 |
|---|---|---|
| committer | Trygve Laugstøl <trygvis@inamo.no> | 2018-08-15 12:35:43 +0200 |
| commit | 73275bb5b82f990d5201d2eb151321f7774c2041 (patch) | |
| tree | 47e2b5e9c0f85f35088c1a399783a5f3945abf6b /Artix-7/mw.j2 | |
| parent | 7d4b5b7a123bf98fd89a4607a0d18946db7caf36 (diff) | |
| download | semantic-sandbox-73275bb5b82f990d5201d2eb151321f7774c2041.tar.gz semantic-sandbox-73275bb5b82f990d5201d2eb151321f7774c2041.tar.bz2 semantic-sandbox-73275bb5b82f990d5201d2eb151321f7774c2041.tar.xz semantic-sandbox-73275bb5b82f990d5201d2eb151321f7774c2041.zip | |
o Better categories.
Diffstat (limited to 'Artix-7/mw.j2')
| -rw-r--r-- | Artix-7/mw.j2 | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Artix-7/mw.j2 b/Artix-7/mw.j2 index 79691a4..6a0cb90 100644 --- a/Artix-7/mw.j2 +++ b/Artix-7/mw.j2 @@ -1,7 +1,6 @@ = Overview = -[[Part number::{{ part["Part number"] }}]] is an FPGA from [[Manufacturer::Xilinx]]. -It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. +[[Part number::{{ part["Part number"] }}]] is an FPGA in the [[Chip family::Artix-7]] family from [[Manufacturer::Xilinx]]. {|class='wikitable' !Logic Cells @@ -50,5 +49,6 @@ It belongs to the [[Category:Xilinx Artix-7 family chip|Artix-7]] family. {% endif %} [[Category:Generated]] +[[Category:Xilinx Artix-7 family chip|Artix-7]] [[Category:Artix-7 generated data set]] |