summaryrefslogtreecommitdiff
path: root/Artix-7/mw.j2
diff options
context:
space:
mode:
Diffstat (limited to 'Artix-7/mw.j2')
-rw-r--r--Artix-7/mw.j242
1 files changed, 24 insertions, 18 deletions
diff --git a/Artix-7/mw.j2 b/Artix-7/mw.j2
index 5fce575..79768db 100644
--- a/Artix-7/mw.j2
+++ b/Artix-7/mw.j2
@@ -1,5 +1,7 @@
= {{ part["Part number"] }} =
+== Overview ==
+
{|class='wikitable'
!Part number
|[[Part number::{{ part["Part number"] }}]]
@@ -13,38 +15,42 @@
!Distributed RAM
|[[Distributed RAM::{{ part["Max Distributed RAM (Kb)"] }} kB]]
|-
-!DSP48E1 Slices
-|[[DSP48E1 Slices::{{ part["DSP48E1 Slices"] }}]]
-|-
!RAM blocks
|[[RAM blocks::{{ part["36 Kb"] }}]]
|-
-!RAM
+!RAM block size
+|[[RAM block size::36 kB]]
+|-
+!Total RAM
|[[RAM::{{ part["Max (Kb)"] }} kB]]
|-
!Clock management tiles
|[[Xilix clock management tiles::{{ part["CMTs"] }}]]
|-
-!PCIe
-|[[PCIe::{{ part["PCIe"] }}]]
-|-
-!GTPs
-|[[GTPs::{{ part["GTPs"] }}]]
-|-
-!XADC Blocks
-|[[XADC Blocks::{{ part["XADC Blocks"] }}]]
-|-
-!IO banks
-|[[IO banks::{{ part["Total I/O Banks"] }}]]
-|-
!Available IO
|[[Available IO::{{ part["Max User I/O"] }}]]
|-
-!RAM block size
-|[[RAM block size::36 kB]]
+!IO banks
+|[[IO banks::{{ part["Total I/O Banks"] }}]]
|-
|}
+== Hard cores ==
+
+{% if part["GTPs"] %}
+* [[Has hard core::Gigabit transceiver;{{ part["GTPs"] }}]]
+{% endif %}
+{% if part["PCIe"] %}
+* [[Has hard core::PCIe;{{ part["PCIe"] }}]]
+* [[Has hard core::PCIe Gen 2;{{ part["PCIe"] }}]]
+{% endif %}
+{% if part["XADC Blocks"] %}
+* [[Has hard core::XADC;{{ part["XADC Blocks"] }}]]
+{% endif %}
+{% if part["DSP48E1 Slices"] %}
+* [[Has hard core::DSP48E1 slice;{{ part["DSP48E1 Slices"] }}]]
+{% endif %}
+
[[Category:Generated]]
[[Category:FPGA Chip]]
[[Category:Artix-7 generated data set]]