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| author | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-11 21:57:44 -0800 |
|---|---|---|
| committer | David Brownell <dbrownell@users.sourceforge.net> | 2009-11-11 21:57:44 -0800 |
| commit | 5723e54fa9875dabe1a183ee59336cebe74d1516 (patch) | |
| tree | 947cf21c645c866069ca88ca1e13948a37790cc8 /src/target/etm_dummy.c | |
| parent | e740536568f5943748f2159f0ef8baa4ab37dcb9 (diff) | |
| download | openocd+libswd-5723e54fa9875dabe1a183ee59336cebe74d1516.tar.gz openocd+libswd-5723e54fa9875dabe1a183ee59336cebe74d1516.tar.bz2 openocd+libswd-5723e54fa9875dabe1a183ee59336cebe74d1516.tar.xz openocd+libswd-5723e54fa9875dabe1a183ee59336cebe74d1516.zip | |
ETM: remove old mid-level ETM handle
Now that nothing uses the old ETM handle any more, remove it.
Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
access ETM facilities.
Now ARM11 could support standard ETM (and ETB) access as soon as
it derives from "struct arm" ... its scanchain 6 is used access
the ETM, just like ARM7 and ARM9.
The Cortex parts (both M3 and A8) will need modified access methods
(via ETM init parameters), so they use the DAP. Our first A8 target
(OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
useful without SWO trace support (it's painfully stripped down), so
that support won't be worth adding for a while.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Diffstat (limited to 'src/target/etm_dummy.c')
| -rw-r--r-- | src/target/etm_dummy.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/etm_dummy.c b/src/target/etm_dummy.c index eba1865e..0c5fc111 100644 --- a/src/target/etm_dummy.c +++ b/src/target/etm_dummy.c @@ -21,8 +21,8 @@ #include "config.h" #endif +#include "armv4_5.h" #include "etm_dummy.h" -#include "arm7_9_common.h" static int handle_etm_dummy_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) |