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| author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-01 22:00:13 +0000 |
|---|---|---|
| committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2008-03-01 22:00:13 +0000 |
| commit | 72abcddbeb5ff2eb0cb259b0f4680fc0a77b9b3a (patch) | |
| tree | 5d429abe02fb9cc738e8be51fbbc204af4106ef2 /src/target/event | |
| parent | 9a53295862e376415e3802dfa643fa642d5f83e5 (diff) | |
| download | openocd+libswd-72abcddbeb5ff2eb0cb259b0f4680fc0a77b9b3a.tar.gz openocd+libswd-72abcddbeb5ff2eb0cb259b0f4680fc0a77b9b3a.tar.bz2 openocd+libswd-72abcddbeb5ff2eb0cb259b0f4680fc0a77b9b3a.tar.xz openocd+libswd-72abcddbeb5ff2eb0cb259b0f4680fc0a77b9b3a.zip | |
target scripts for test suite.
git-svn-id: svn://svn.berlios.de/openocd/trunk@429 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'src/target/event')
| -rw-r--r-- | src/target/event/at91eb40a_reset.script (renamed from src/target/event/at91eb40a_reset.cfg) | 0 | ||||
| -rw-r--r-- | src/target/event/at91r40008_reset.script | 7 | ||||
| -rw-r--r-- | src/target/event/sam7s256_reset.script | 17 | ||||
| -rw-r--r-- | src/target/event/sam7x256_reset.script | 17 |
4 files changed, 41 insertions, 0 deletions
diff --git a/src/target/event/at91eb40a_reset.cfg b/src/target/event/at91eb40a_reset.script index c6da2ef1..c6da2ef1 100644 --- a/src/target/event/at91eb40a_reset.cfg +++ b/src/target/event/at91eb40a_reset.script diff --git a/src/target/event/at91r40008_reset.script b/src/target/event/at91r40008_reset.script new file mode 100644 index 00000000..4cda1c58 --- /dev/null +++ b/src/target/event/at91r40008_reset.script @@ -0,0 +1,7 @@ +wait_halt +sleep 10 +poll +# Ethernut 3 remapping is required to access external flash memory. +mww 0xffe00000 0x1000213d +mww 0xffe00004 0x20003e3d +mww 0xffe00020 0x00000001 diff --git a/src/target/event/sam7s256_reset.script b/src/target/event/sam7s256_reset.script new file mode 100644 index 00000000..456341d6 --- /dev/null +++ b/src/target/event/sam7s256_reset.script @@ -0,0 +1,17 @@ +# +# Init - taken form the script openocd_at91sam7_ecr.script +# +# I take this script from the following page: +# +# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html +# +mww 0xfffffd44 0x00008000 # disable watchdog +mww 0xfffffd08 0xa5000001 # enable user reset +mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator +sleep 10 +mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz +sleep 10 +mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz +sleep 10 +mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) +sleep 100 diff --git a/src/target/event/sam7x256_reset.script b/src/target/event/sam7x256_reset.script new file mode 100644 index 00000000..456341d6 --- /dev/null +++ b/src/target/event/sam7x256_reset.script @@ -0,0 +1,17 @@ +# +# Init - taken form the script openocd_at91sam7_ecr.script +# +# I take this script from the following page: +# +# http://www.siwawi.arubi.uni-kl.de/avr_projects/arm_projects/openocd_intro/index.html +# +mww 0xfffffd44 0x00008000 # disable watchdog +mww 0xfffffd08 0xa5000001 # enable user reset +mww 0xfffffc20 0x00000601 # CKGR_MOR : enable the main oscillator +sleep 10 +mww 0xfffffc2c 0x00481c0e # CKGR_PLLR: 96.1097 MHz +sleep 10 +mww 0xfffffc30 0x00000007 # PMC_MCKR : MCK = PLL / 2 ~= 48 MHz +sleep 10 +mww 0xffffff60 0x003c0100 # MC_FMR: flash mode (FWS=1,FMCN=60) +sleep 100 |