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authorDavid Claffey <dnclaffey@gmail.com>2009-12-16 11:23:52 +0000
committerSpencer Oliver <ntfreak@users.sourceforge.net>2010-01-05 19:54:35 +0000
commit03e8649bc699053ccdbbd4a3c2eaf05241e22a5b (patch)
treefda73d0fd96b2d64d42ba0dac81ea564b4ea233a /src/target/mips_m4k.c
parent95f86e8e0525fc93093cc2bc060df5017d2f504e (diff)
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MIPS: merge mips fast_data patch from David N. Claffey
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Diffstat (limited to 'src/target/mips_m4k.c')
-rw-r--r--src/target/mips_m4k.c47
1 files changed, 45 insertions, 2 deletions
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c
index a83217ff..f3191ae6 100644
--- a/src/target/mips_m4k.c
+++ b/src/target/mips_m4k.c
@@ -4,6 +4,8 @@
* *
* Copyright (C) 2008 by David T.L. Wong *
* *
+ * Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com> *
+ * *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
@@ -30,7 +32,6 @@
#include "target_type.h"
#include "register.h"
-
/* cli handling */
/* forward declarations */
@@ -962,7 +963,49 @@ int mips_m4k_examine(struct target *target)
int mips_m4k_bulk_write_memory(struct target *target, uint32_t address, uint32_t count, uint8_t *buffer)
{
- return mips_m4k_write_memory(target, address, 4, count, buffer);
+ struct mips32_common *mips32 = target->arch_info;
+ struct mips_ejtag *ejtag_info = &mips32->ejtag_info;
+ struct working_area *source;
+ int retval;
+ int write = 1;
+
+ LOG_DEBUG("address: 0x%8.8x, count: 0x%8.8x", address, count);
+
+ if (target->state != TARGET_HALTED)
+ {
+ LOG_WARNING("target not halted");
+ return ERROR_TARGET_NOT_HALTED;
+ }
+
+ /* check alignment */
+ if (address & 0x3u)
+ return ERROR_TARGET_UNALIGNED_ACCESS;
+
+ /* Get memory for block write handler */
+ retval = target_alloc_working_area(target, MIPS32_FASTDATA_HANDLER_SIZE, &source);
+ if (retval != ERROR_OK)
+ {
+ LOG_WARNING("No working area available, falling back to non-bulk write");
+ return mips_m4k_write_memory(target, address, 4, count, buffer);
+ }
+
+ /* TAP data register is loaded LSB first (little endian) */
+ if (target->endianness == TARGET_BIG_ENDIAN)
+ {
+ uint32_t i, t32;
+ for(i = 0; i < (count*4); i+=4)
+ {
+ t32 = be_to_h_u32((uint8_t *) &buffer[i]);
+ h_u32_to_le(&buffer[i], t32);
+ }
+ }
+
+ retval = mips32_pracc_fastdata_xfer(ejtag_info, source, write, address, count, (uint32_t *) buffer);
+
+ if (source)
+ target_free_working_area(target, source);
+
+ return retval;
}
int mips_m4k_checksum_memory(struct target *target, uint32_t address, uint32_t size, uint32_t *checksum)